// Copyright 2014 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#ifndef V8_COMPILER_INSTRUCTION_SELECTOR_IMPL_H_
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#define V8_COMPILER_INSTRUCTION_SELECTOR_IMPL_H_
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#include "src/compiler/instruction-selector.h"
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#include "src/compiler/instruction.h"
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#include "src/compiler/linkage.h"
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#include "src/compiler/schedule.h"
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#include "src/macro-assembler.h"
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namespace v8 {
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namespace internal {
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namespace compiler {
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struct CaseInfo {
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int32_t value; // The case value.
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int32_t order; // The order for lowering to comparisons (less means earlier).
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BasicBlock* branch; // The basic blocks corresponding to the case value.
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};
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inline bool operator<(const CaseInfo& l, const CaseInfo& r) {
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return l.order < r.order;
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}
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// Helper struct containing data about a table or lookup switch.
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class SwitchInfo {
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public:
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SwitchInfo(ZoneVector<CaseInfo>& cases, int32_t min_value, int32_t max_value,
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BasicBlock* default_branch)
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: cases_(cases),
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min_value_(min_value),
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max_value_(min_value),
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default_branch_(default_branch) {
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if (cases.size() != 0) {
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DCHECK_LE(min_value, max_value);
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// Note that {value_range} can be 0 if {min_value} is -2^31 and
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// {max_value} is 2^31-1, so don't assume that it's non-zero below.
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value_range_ =
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1u + bit_cast<uint32_t>(max_value) - bit_cast<uint32_t>(min_value);
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} else {
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value_range_ = 0;
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}
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}
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// Ensure that comparison order of if-cascades is preserved.
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std::vector<CaseInfo> CasesSortedByOriginalOrder() const {
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std::vector<CaseInfo> result(cases_.begin(), cases_.end());
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std::stable_sort(result.begin(), result.end());
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return result;
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}
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std::vector<CaseInfo> CasesSortedByValue() const {
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std::vector<CaseInfo> result(cases_.begin(), cases_.end());
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std::stable_sort(result.begin(), result.end(),
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[](CaseInfo a, CaseInfo b) { return a.value < b.value; });
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return result;
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}
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const ZoneVector<CaseInfo>& CasesUnsorted() const { return cases_; }
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int32_t min_value() const { return min_value_; }
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int32_t max_value() const { return max_value_; }
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size_t value_range() const { return value_range_; }
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size_t case_count() const { return cases_.size(); }
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BasicBlock* default_branch() const { return default_branch_; }
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private:
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const ZoneVector<CaseInfo>& cases_;
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int32_t min_value_; // minimum value of {cases_}
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int32_t max_value_; // maximum value of {cases_}
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size_t value_range_; // |max_value - min_value| + 1
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BasicBlock* default_branch_;
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};
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// A helper class for the instruction selector that simplifies construction of
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// Operands. This class implements a base for architecture-specific helpers.
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class OperandGenerator {
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public:
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explicit OperandGenerator(InstructionSelector* selector)
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: selector_(selector) {}
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InstructionOperand NoOutput() {
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return InstructionOperand(); // Generates an invalid operand.
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}
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InstructionOperand DefineAsRegister(Node* node) {
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return Define(node,
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UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER,
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GetVReg(node)));
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}
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InstructionOperand DefineSameAsFirst(Node* node) {
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return Define(node,
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UnallocatedOperand(UnallocatedOperand::SAME_AS_FIRST_INPUT,
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GetVReg(node)));
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}
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InstructionOperand DefineAsFixed(Node* node, Register reg) {
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return Define(node, UnallocatedOperand(UnallocatedOperand::FIXED_REGISTER,
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reg.code(), GetVReg(node)));
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}
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template <typename FPRegType>
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InstructionOperand DefineAsFixed(Node* node, FPRegType reg) {
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return Define(node,
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UnallocatedOperand(UnallocatedOperand::FIXED_FP_REGISTER,
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reg.code(), GetVReg(node)));
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}
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InstructionOperand DefineAsConstant(Node* node) {
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return DefineAsConstant(node, ToConstant(node));
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}
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InstructionOperand DefineAsConstant(Node* node, Constant constant) {
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selector()->MarkAsDefined(node);
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int virtual_register = GetVReg(node);
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sequence()->AddConstant(virtual_register, constant);
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return ConstantOperand(virtual_register);
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}
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InstructionOperand DefineAsLocation(Node* node, LinkageLocation location) {
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return Define(node, ToUnallocatedOperand(location, GetVReg(node)));
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}
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InstructionOperand DefineAsDualLocation(Node* node,
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LinkageLocation primary_location,
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LinkageLocation secondary_location) {
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return Define(node,
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ToDualLocationUnallocatedOperand(
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primary_location, secondary_location, GetVReg(node)));
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}
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InstructionOperand Use(Node* node) {
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return Use(node, UnallocatedOperand(UnallocatedOperand::NONE,
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UnallocatedOperand::USED_AT_START,
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GetVReg(node)));
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}
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InstructionOperand UseAnyAtEnd(Node* node) {
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return Use(node, UnallocatedOperand(UnallocatedOperand::REGISTER_OR_SLOT,
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UnallocatedOperand::USED_AT_END,
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GetVReg(node)));
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}
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InstructionOperand UseAny(Node* node) {
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return Use(node, UnallocatedOperand(UnallocatedOperand::REGISTER_OR_SLOT,
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UnallocatedOperand::USED_AT_START,
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GetVReg(node)));
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}
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InstructionOperand UseRegisterOrSlotOrConstant(Node* node) {
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return Use(node, UnallocatedOperand(
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UnallocatedOperand::REGISTER_OR_SLOT_OR_CONSTANT,
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UnallocatedOperand::USED_AT_START, GetVReg(node)));
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}
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InstructionOperand UseRegister(Node* node) {
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return Use(node, UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER,
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UnallocatedOperand::USED_AT_START,
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GetVReg(node)));
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}
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InstructionOperand UseUniqueSlot(Node* node) {
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return Use(node, UnallocatedOperand(UnallocatedOperand::MUST_HAVE_SLOT,
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GetVReg(node)));
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}
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// Use register or operand for the node. If a register is chosen, it won't
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// alias any temporary or output registers.
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InstructionOperand UseUnique(Node* node) {
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return Use(node,
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UnallocatedOperand(UnallocatedOperand::NONE, GetVReg(node)));
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}
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// Use a unique register for the node that does not alias any temporary or
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// output registers.
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InstructionOperand UseUniqueRegister(Node* node) {
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return Use(node, UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER,
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GetVReg(node)));
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}
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InstructionOperand UseFixed(Node* node, Register reg) {
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return Use(node, UnallocatedOperand(UnallocatedOperand::FIXED_REGISTER,
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reg.code(), GetVReg(node)));
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}
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template <typename FPRegType>
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InstructionOperand UseFixed(Node* node, FPRegType reg) {
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return Use(node, UnallocatedOperand(UnallocatedOperand::FIXED_FP_REGISTER,
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reg.code(), GetVReg(node)));
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}
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InstructionOperand UseExplicit(LinkageLocation location) {
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MachineRepresentation rep = InstructionSequence::DefaultRepresentation();
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if (location.IsRegister()) {
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return ExplicitOperand(LocationOperand::REGISTER, rep,
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location.AsRegister());
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} else {
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return ExplicitOperand(LocationOperand::STACK_SLOT, rep,
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location.GetLocation());
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}
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}
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InstructionOperand UseImmediate(int immediate) {
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return sequence()->AddImmediate(Constant(immediate));
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}
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InstructionOperand UseImmediate(Node* node) {
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return sequence()->AddImmediate(ToConstant(node));
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}
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InstructionOperand UseNegatedImmediate(Node* node) {
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return sequence()->AddImmediate(ToNegatedConstant(node));
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}
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InstructionOperand UseLocation(Node* node, LinkageLocation location) {
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return Use(node, ToUnallocatedOperand(location, GetVReg(node)));
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}
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// Used to force gap moves from the from_location to the to_location
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// immediately before an instruction.
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InstructionOperand UsePointerLocation(LinkageLocation to_location,
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LinkageLocation from_location) {
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UnallocatedOperand casted_from_operand =
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UnallocatedOperand::cast(TempLocation(from_location));
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selector_->Emit(kArchNop, casted_from_operand);
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return ToUnallocatedOperand(to_location,
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casted_from_operand.virtual_register());
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}
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InstructionOperand TempRegister() {
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return UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER,
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UnallocatedOperand::USED_AT_START,
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sequence()->NextVirtualRegister());
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}
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int AllocateVirtualRegister() { return sequence()->NextVirtualRegister(); }
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InstructionOperand DefineSameAsFirstForVreg(int vreg) {
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return UnallocatedOperand(UnallocatedOperand::SAME_AS_FIRST_INPUT, vreg);
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}
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InstructionOperand DefineAsRegistertForVreg(int vreg) {
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return UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER, vreg);
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}
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InstructionOperand UseRegisterForVreg(int vreg) {
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return UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER,
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UnallocatedOperand::USED_AT_START, vreg);
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}
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InstructionOperand TempDoubleRegister() {
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UnallocatedOperand op = UnallocatedOperand(
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UnallocatedOperand::MUST_HAVE_REGISTER,
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UnallocatedOperand::USED_AT_START, sequence()->NextVirtualRegister());
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sequence()->MarkAsRepresentation(MachineRepresentation::kFloat64,
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op.virtual_register());
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return op;
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}
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InstructionOperand TempSimd128Register() {
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UnallocatedOperand op = UnallocatedOperand(
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UnallocatedOperand::MUST_HAVE_REGISTER,
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UnallocatedOperand::USED_AT_START, sequence()->NextVirtualRegister());
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sequence()->MarkAsRepresentation(MachineRepresentation::kSimd128,
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op.virtual_register());
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return op;
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}
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InstructionOperand TempRegister(Register reg) {
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return UnallocatedOperand(UnallocatedOperand::FIXED_REGISTER, reg.code(),
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InstructionOperand::kInvalidVirtualRegister);
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}
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InstructionOperand TempImmediate(int32_t imm) {
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return sequence()->AddImmediate(Constant(imm));
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}
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InstructionOperand TempLocation(LinkageLocation location) {
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return ToUnallocatedOperand(location, sequence()->NextVirtualRegister());
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}
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InstructionOperand Label(BasicBlock* block) {
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return sequence()->AddImmediate(
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Constant(RpoNumber::FromInt(block->rpo_number())));
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}
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protected:
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InstructionSelector* selector() const { return selector_; }
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InstructionSequence* sequence() const { return selector()->sequence(); }
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Zone* zone() const { return selector()->instruction_zone(); }
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private:
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int GetVReg(Node* node) const { return selector_->GetVirtualRegister(node); }
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static Constant ToConstant(const Node* node) {
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switch (node->opcode()) {
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case IrOpcode::kInt32Constant:
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return Constant(OpParameter<int32_t>(node->op()));
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case IrOpcode::kInt64Constant:
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return Constant(OpParameter<int64_t>(node->op()));
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case IrOpcode::kFloat32Constant:
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return Constant(OpParameter<float>(node->op()));
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case IrOpcode::kRelocatableInt32Constant:
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case IrOpcode::kRelocatableInt64Constant:
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return Constant(OpParameter<RelocatablePtrConstantInfo>(node->op()));
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case IrOpcode::kFloat64Constant:
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case IrOpcode::kNumberConstant:
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return Constant(OpParameter<double>(node->op()));
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case IrOpcode::kExternalConstant:
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return Constant(OpParameter<ExternalReference>(node->op()));
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case IrOpcode::kComment: {
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// We cannot use {intptr_t} here, since the Constant constructor would
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// be ambiguous on some architectures.
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using ptrsize_int_t =
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std::conditional<kPointerSize == 8, int64_t, int32_t>::type;
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return Constant(reinterpret_cast<ptrsize_int_t>(
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OpParameter<const char*>(node->op())));
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}
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case IrOpcode::kHeapConstant:
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return Constant(HeapConstantOf(node->op()));
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case IrOpcode::kDeadValue: {
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switch (DeadValueRepresentationOf(node->op())) {
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case MachineRepresentation::kBit:
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case MachineRepresentation::kWord32:
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case MachineRepresentation::kTagged:
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case MachineRepresentation::kTaggedSigned:
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case MachineRepresentation::kTaggedPointer:
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return Constant(static_cast<int32_t>(0));
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case MachineRepresentation::kFloat64:
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return Constant(static_cast<double>(0));
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case MachineRepresentation::kFloat32:
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return Constant(static_cast<float>(0));
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default:
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UNREACHABLE();
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}
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break;
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}
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default:
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break;
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}
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UNREACHABLE();
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}
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static Constant ToNegatedConstant(const Node* node) {
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switch (node->opcode()) {
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case IrOpcode::kInt32Constant:
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return Constant(-OpParameter<int32_t>(node->op()));
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case IrOpcode::kInt64Constant:
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return Constant(-OpParameter<int64_t>(node->op()));
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default:
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break;
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}
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UNREACHABLE();
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}
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UnallocatedOperand Define(Node* node, UnallocatedOperand operand) {
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DCHECK_NOT_NULL(node);
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DCHECK_EQ(operand.virtual_register(), GetVReg(node));
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selector()->MarkAsDefined(node);
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return operand;
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}
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UnallocatedOperand Use(Node* node, UnallocatedOperand operand) {
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DCHECK_NOT_NULL(node);
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DCHECK_EQ(operand.virtual_register(), GetVReg(node));
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selector()->MarkAsUsed(node);
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return operand;
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}
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UnallocatedOperand ToDualLocationUnallocatedOperand(
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LinkageLocation primary_location, LinkageLocation secondary_location,
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int virtual_register) {
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// We only support the primary location being a register and the secondary
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// one a slot.
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DCHECK(primary_location.IsRegister() &&
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secondary_location.IsCalleeFrameSlot());
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int reg_id = primary_location.AsRegister();
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int slot_id = secondary_location.AsCalleeFrameSlot();
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return UnallocatedOperand(reg_id, slot_id, virtual_register);
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}
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UnallocatedOperand ToUnallocatedOperand(LinkageLocation location,
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int virtual_register) {
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if (location.IsAnyRegister()) {
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// any machine register.
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return UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER,
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virtual_register);
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}
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if (location.IsCallerFrameSlot()) {
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// a location on the caller frame.
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return UnallocatedOperand(UnallocatedOperand::FIXED_SLOT,
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location.AsCallerFrameSlot(), virtual_register);
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}
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if (location.IsCalleeFrameSlot()) {
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// a spill location on this (callee) frame.
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return UnallocatedOperand(UnallocatedOperand::FIXED_SLOT,
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location.AsCalleeFrameSlot(), virtual_register);
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}
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// a fixed register.
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if (IsFloatingPoint(location.GetType().representation())) {
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return UnallocatedOperand(UnallocatedOperand::FIXED_FP_REGISTER,
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location.AsRegister(), virtual_register);
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}
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return UnallocatedOperand(UnallocatedOperand::FIXED_REGISTER,
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location.AsRegister(), virtual_register);
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}
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InstructionSelector* selector_;
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};
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} // namespace compiler
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} // namespace internal
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} // namespace v8
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#endif // V8_COMPILER_INSTRUCTION_SELECTOR_IMPL_H_
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