/*
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* Copyright (C) 2015 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef ART_LIBELFFILE_DWARF_REGISTER_H_
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#define ART_LIBELFFILE_DWARF_REGISTER_H_
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namespace art {
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namespace dwarf {
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// Represents DWARF register.
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class Reg {
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public:
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explicit Reg(int reg_num) : num_(reg_num) { }
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int num() const { return num_; }
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// TODO: Arm S0–S31 register mapping is obsolescent.
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// We should use VFP-v3/Neon D0-D31 mapping instead.
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// However, D0 is aliased to pair of S0 and S1, so using that
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// mapping we cannot easily say S0 is spilled and S1 is not.
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// There are ways around this in DWARF but they are complex.
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// It would be much simpler to always spill whole D registers.
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// Arm64 mapping is correct since we already do this there.
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// libunwind might struggle with the new mapping as well.
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static Reg ArmCore(int num) { return Reg(num); } // R0-R15.
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static Reg ArmFp(int num) { return Reg(64 + num); } // S0–S31.
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static Reg ArmDp(int num) { return Reg(256 + num); } // D0–D31.
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static Reg Arm64Core(int num) { return Reg(num); } // X0-X31.
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static Reg Arm64Fp(int num) { return Reg(64 + num); } // V0-V31.
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static Reg MipsCore(int num) { return Reg(num); }
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static Reg Mips64Core(int num) { return Reg(num); }
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static Reg MipsFp(int num) { return Reg(32 + num); }
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static Reg Mips64Fp(int num) { return Reg(32 + num); }
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static Reg X86Core(int num) { return Reg(num); }
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static Reg X86Fp(int num) { return Reg(21 + num); }
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static Reg X86_64Core(int num) {
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static const int map[8] = {0, 2, 1, 3, 7, 6, 4, 5};
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return Reg(num < 8 ? map[num] : num);
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}
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static Reg X86_64Fp(int num) { return Reg(17 + num); }
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private:
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int num_;
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};
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} // namespace dwarf
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} // namespace art
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#endif // ART_LIBELFFILE_DWARF_REGISTER_H_
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