/*
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* Copyright (C) 2015 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <memory>
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#include <vector>
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#include "arch/instruction_set.h"
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#include "base/runtime_debug.h"
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#include "cfi_test.h"
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#include "driver/compiler_options.h"
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#include "gtest/gtest.h"
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#include "optimizing/code_generator.h"
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#include "optimizing/optimizing_unit_test.h"
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#include "read_barrier_config.h"
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#include "utils/arm/assembler_arm_vixl.h"
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#include "utils/assembler.h"
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#include "utils/mips/assembler_mips.h"
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#include "utils/mips64/assembler_mips64.h"
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#include "optimizing/optimizing_cfi_test_expected.inc"
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namespace vixl32 = vixl::aarch32;
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namespace art {
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// Run the tests only on host.
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#ifndef ART_TARGET_ANDROID
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class OptimizingCFITest : public CFITest, public OptimizingUnitTestHelper {
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public:
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// Enable this flag to generate the expected outputs.
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static constexpr bool kGenerateExpected = false;
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OptimizingCFITest()
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: graph_(nullptr),
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code_gen_(),
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blocks_(GetAllocator()->Adapter()) {}
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void SetUpFrame(InstructionSet isa) {
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OverrideInstructionSetFeatures(isa, "default");
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// Ensure that slow-debug is off, so that there is no unexpected read-barrier check emitted.
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SetRuntimeDebugFlagsEnabled(false);
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// Setup simple context.
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graph_ = CreateGraph();
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// Generate simple frame with some spills.
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code_gen_ = CodeGenerator::Create(graph_, *compiler_options_);
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code_gen_->GetAssembler()->cfi().SetEnabled(true);
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code_gen_->InitializeCodeGenerationData();
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const int frame_size = 64;
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int core_reg = 0;
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int fp_reg = 0;
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for (int i = 0; i < 2; i++) { // Two registers of each kind.
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for (; core_reg < 32; core_reg++) {
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if (code_gen_->IsCoreCalleeSaveRegister(core_reg)) {
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auto location = Location::RegisterLocation(core_reg);
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code_gen_->AddAllocatedRegister(location);
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core_reg++;
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break;
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}
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}
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for (; fp_reg < 32; fp_reg++) {
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if (code_gen_->IsFloatingPointCalleeSaveRegister(fp_reg)) {
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auto location = Location::FpuRegisterLocation(fp_reg);
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code_gen_->AddAllocatedRegister(location);
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fp_reg++;
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break;
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}
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}
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}
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code_gen_->block_order_ = &blocks_;
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code_gen_->ComputeSpillMask();
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code_gen_->SetFrameSize(frame_size);
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code_gen_->GenerateFrameEntry();
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}
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void Finish() {
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code_gen_->GenerateFrameExit();
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code_gen_->Finalize(&code_allocator_);
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}
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void Check(InstructionSet isa,
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const char* isa_str,
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const std::vector<uint8_t>& expected_asm,
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const std::vector<uint8_t>& expected_cfi) {
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// Get the outputs.
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ArrayRef<const uint8_t> actual_asm = code_allocator_.GetMemory();
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Assembler* opt_asm = code_gen_->GetAssembler();
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ArrayRef<const uint8_t> actual_cfi(*(opt_asm->cfi().data()));
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if (kGenerateExpected) {
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GenerateExpected(stdout, isa, isa_str, actual_asm, actual_cfi);
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} else {
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EXPECT_EQ(ArrayRef<const uint8_t>(expected_asm), actual_asm);
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EXPECT_EQ(ArrayRef<const uint8_t>(expected_cfi), actual_cfi);
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}
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}
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void TestImpl(InstructionSet isa, const char*
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isa_str,
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const std::vector<uint8_t>& expected_asm,
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const std::vector<uint8_t>& expected_cfi) {
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SetUpFrame(isa);
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Finish();
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Check(isa, isa_str, expected_asm, expected_cfi);
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}
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CodeGenerator* GetCodeGenerator() {
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return code_gen_.get();
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}
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private:
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class InternalCodeAllocator : public CodeAllocator {
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public:
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InternalCodeAllocator() {}
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uint8_t* Allocate(size_t size) override {
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memory_.resize(size);
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return memory_.data();
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}
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ArrayRef<const uint8_t> GetMemory() const override { return ArrayRef<const uint8_t>(memory_); }
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private:
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std::vector<uint8_t> memory_;
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DISALLOW_COPY_AND_ASSIGN(InternalCodeAllocator);
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};
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HGraph* graph_;
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std::unique_ptr<CodeGenerator> code_gen_;
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ArenaVector<HBasicBlock*> blocks_;
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InternalCodeAllocator code_allocator_;
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};
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#define TEST_ISA(isa) \
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TEST_F(OptimizingCFITest, isa) { \
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std::vector<uint8_t> expected_asm( \
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expected_asm_##isa, \
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expected_asm_##isa + arraysize(expected_asm_##isa)); \
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std::vector<uint8_t> expected_cfi( \
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expected_cfi_##isa, \
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expected_cfi_##isa + arraysize(expected_cfi_##isa)); \
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TestImpl(InstructionSet::isa, #isa, expected_asm, expected_cfi); \
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}
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#ifdef ART_ENABLE_CODEGEN_arm
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TEST_ISA(kThumb2)
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#endif
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#ifdef ART_ENABLE_CODEGEN_arm64
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// Run the tests for ARM64 only with Baker read barriers, as the
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// expected generated code saves and restore X21 and X22 (instead of
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// X20 and X21), as X20 is used as Marking Register in the Baker read
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// barrier configuration, and as such is removed from the set of
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// callee-save registers in the ARM64 code generator of the Optimizing
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// compiler.
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#if defined(USE_READ_BARRIER) && defined(USE_BAKER_READ_BARRIER)
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TEST_ISA(kArm64)
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#endif
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#endif
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#ifdef ART_ENABLE_CODEGEN_x86
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TEST_ISA(kX86)
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#endif
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#ifdef ART_ENABLE_CODEGEN_x86_64
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TEST_ISA(kX86_64)
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#endif
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#ifdef ART_ENABLE_CODEGEN_mips
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TEST_ISA(kMips)
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#endif
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#ifdef ART_ENABLE_CODEGEN_mips64
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TEST_ISA(kMips64)
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#endif
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#ifdef ART_ENABLE_CODEGEN_arm
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TEST_F(OptimizingCFITest, kThumb2Adjust) {
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using vixl32::r0;
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std::vector<uint8_t> expected_asm(
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expected_asm_kThumb2_adjust,
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expected_asm_kThumb2_adjust + arraysize(expected_asm_kThumb2_adjust));
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std::vector<uint8_t> expected_cfi(
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expected_cfi_kThumb2_adjust,
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expected_cfi_kThumb2_adjust + arraysize(expected_cfi_kThumb2_adjust));
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SetUpFrame(InstructionSet::kThumb2);
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#define __ down_cast<arm::ArmVIXLAssembler*>(GetCodeGenerator() \
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->GetAssembler())->GetVIXLAssembler()->
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vixl32::Label target;
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__ CompareAndBranchIfZero(r0, &target);
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// Push the target out of range of CBZ.
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for (size_t i = 0; i != 65; ++i) {
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__ Ldr(r0, vixl32::MemOperand(r0));
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}
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__ Bind(&target);
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#undef __
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Finish();
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Check(InstructionSet::kThumb2, "kThumb2_adjust", expected_asm, expected_cfi);
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}
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#endif
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#ifdef ART_ENABLE_CODEGEN_mips
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TEST_F(OptimizingCFITest, kMipsAdjust) {
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// One NOP in delay slot, 1 << 15 NOPS have size 1 << 17 which exceeds 18-bit signed maximum.
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static constexpr size_t kNumNops = 1u + (1u << 15);
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std::vector<uint8_t> expected_asm(
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expected_asm_kMips_adjust_head,
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expected_asm_kMips_adjust_head + arraysize(expected_asm_kMips_adjust_head));
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expected_asm.resize(expected_asm.size() + kNumNops * 4u, 0u);
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expected_asm.insert(
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expected_asm.end(),
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expected_asm_kMips_adjust_tail,
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expected_asm_kMips_adjust_tail + arraysize(expected_asm_kMips_adjust_tail));
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std::vector<uint8_t> expected_cfi(
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expected_cfi_kMips_adjust,
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expected_cfi_kMips_adjust + arraysize(expected_cfi_kMips_adjust));
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SetUpFrame(InstructionSet::kMips);
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#define __ down_cast<mips::MipsAssembler*>(GetCodeGenerator()->GetAssembler())->
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mips::MipsLabel target;
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__ Beqz(mips::A0, &target);
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// Push the target out of range of BEQZ.
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for (size_t i = 0; i != kNumNops; ++i) {
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__ Nop();
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}
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__ Bind(&target);
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#undef __
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Finish();
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Check(InstructionSet::kMips, "kMips_adjust", expected_asm, expected_cfi);
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}
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#endif
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#ifdef ART_ENABLE_CODEGEN_mips64
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TEST_F(OptimizingCFITest, kMips64Adjust) {
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// One NOP in forbidden slot, 1 << 15 NOPS have size 1 << 17 which exceeds 18-bit signed maximum.
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static constexpr size_t kNumNops = 1u + (1u << 15);
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std::vector<uint8_t> expected_asm(
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expected_asm_kMips64_adjust_head,
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expected_asm_kMips64_adjust_head + arraysize(expected_asm_kMips64_adjust_head));
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expected_asm.resize(expected_asm.size() + kNumNops * 4u, 0u);
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expected_asm.insert(
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expected_asm.end(),
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expected_asm_kMips64_adjust_tail,
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expected_asm_kMips64_adjust_tail + arraysize(expected_asm_kMips64_adjust_tail));
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std::vector<uint8_t> expected_cfi(
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expected_cfi_kMips64_adjust,
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expected_cfi_kMips64_adjust + arraysize(expected_cfi_kMips64_adjust));
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SetUpFrame(InstructionSet::kMips64);
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#define __ down_cast<mips64::Mips64Assembler*>(GetCodeGenerator()->GetAssembler())->
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mips64::Mips64Label target;
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__ Beqc(mips64::A1, mips64::A2, &target);
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// Push the target out of range of BEQC.
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for (size_t i = 0; i != kNumNops; ++i) {
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__ Nop();
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}
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__ Bind(&target);
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#undef __
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Finish();
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Check(InstructionSet::kMips64, "kMips64_adjust", expected_asm, expected_cfi);
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}
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#endif
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#endif // ART_TARGET_ANDROID
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} // namespace art
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