/*
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* Allwinner SoCs tv driver.
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*
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* Copyright (C) 2016 Allwinner.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include "tv_ac200.h"
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#include "tv_ac200_lowlevel.h"
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static s32 aw1683_wr_reg(u16 addr, u16 val)
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{
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return acx00_reg_write(tv_priv.acx00, addr, val);
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}
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static s32 aw1683_rd_reg(u16 addr, u16 *val)
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{
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*val = acx00_reg_read(tv_priv.acx00, addr);
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return 0;
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}
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s32 aw1683_tve_init(const u16 *p_dac_cali)
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{
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u16 data;
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if (p_dac_cali == NULL)
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return -1;
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/* clk for tve */
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aw1683_wr_reg(0x001a, 0x0003);
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aw1683_wr_reg(0x0040, 0x0702);
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aw1683_wr_reg(0x000c, 0x4e01);
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aw1683_wr_reg(0x000c, 0xce01);
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aw1683_wr_reg(0x0018, 0x0001);
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aw1683_wr_reg(0x0018, 0x000f);
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/* sid for tve */
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if (*p_dac_cali == 0)
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aw1683_rd_reg(0x8002, &data);
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else
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data = *p_dac_cali;
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if (data == 0)
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aw1683_wr_reg(0x4306, 0x28f);
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else if (data < 0x3f5 && data > 0)
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aw1683_wr_reg(0x4306, data + 10);
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else
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aw1683_wr_reg(0x4306, data);
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/* tve anto check */
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aw1683_wr_reg(0x4008, 0x12a0);
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aw1683_wr_reg(0x400a, 0x4300);
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aw1683_wr_reg(0x40f4, 0x0230);
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aw1683_wr_reg(0x40f8, 0x0064);
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aw1683_wr_reg(0x40fa, 0x0c80);
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aw1683_wr_reg(0x4040, 0x0002);
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aw1683_wr_reg(0x4030, 0x0001);
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return 0;
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}
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s32 aw1683_tve_plug_status(void)
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{
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u16 data;
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aw1683_rd_reg(0x4038, &data);
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return (data & 0x3);
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}
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s32 aw1683_tve_set_mode(u32 mode)
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{
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u32 inter = 0;
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u32 ccir = 1;
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u32 m = (mode == 11) ? 1:0;
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u32 c = ccir ? 2:3;
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u32 i = inter;
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u32 x = tv_video_timing[m].x_res;
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u32 y = tv_video_timing[m].y_res/(i+1);
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u32 hbp = (tv_video_timing[m].hor_back_porch
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+tv_video_timing[m].hor_sync_time) * c;
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u32 vbp = (tv_video_timing[m].ver_back_porch
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+tv_video_timing[m].ver_sync_time);
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u32 syuv = ccir ? 0:1;
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/* u32 resync_pixels = 0x7b*c; */
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aw1683_wr_reg(0x5000, syuv);
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aw1683_wr_reg(0x5008, hbp-1);
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aw1683_wr_reg(0x500a, x*c-1);
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aw1683_wr_reg(0x500c, vbp-1);
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aw1683_wr_reg(0x500e, y-1);
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aw1683_wr_reg(0x5016, vbp-1+i);
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aw1683_wr_reg(0x5010, 0x0000);
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aw1683_wr_reg(0x5012, 0x0004);
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if (mode == 14) {
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aw1683_wr_reg(0x4002, 0x8000);
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aw1683_wr_reg(0x4004, 0x0000);
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aw1683_wr_reg(0x4006, 0x0707);
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/* aw1683_wr_reg(0x4008, 0x0001); */
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aw1683_wr_reg(0x400a, 0x4300);
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aw1683_wr_reg(0x400c, 0x1400);
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aw1683_wr_reg(0x400e, 0x3000);
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aw1683_wr_reg(0x4010, 0x7c1f);
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aw1683_wr_reg(0x4012, 0x21f0);
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aw1683_wr_reg(0x4014, 0x0020);
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aw1683_wr_reg(0x4016, 0x0076);
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aw1683_wr_reg(0x4018, 0x0016);
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aw1683_wr_reg(0x401a, 0x0000);
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aw1683_wr_reg(0x401c, 0x020d);
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aw1683_wr_reg(0x401e, 0x0016);
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aw1683_wr_reg(0x4020, 0x011a);
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aw1683_wr_reg(0x4022, 0x00f0);
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aw1683_wr_reg(0x4100, 0x0001);
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aw1683_wr_reg(0x4102, 0x0000);
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aw1683_wr_reg(0x4104, 0x0000);
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aw1683_wr_reg(0x4106, 0x0000);
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aw1683_wr_reg(0x4108, 0x0002);
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aw1683_wr_reg(0x410a, 0x0000);
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aw1683_wr_reg(0x410c, 0x004f);
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aw1683_wr_reg(0x410e, 0x0000);
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aw1683_wr_reg(0x4110, 0x0000);
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aw1683_wr_reg(0x4112, 0x0000);
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aw1683_wr_reg(0x4114, 0x447e);
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aw1683_wr_reg(0x4116, 0x0016);
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aw1683_wr_reg(0x4118, 0xa0a0);
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aw1683_wr_reg(0x411a, 0x0000);
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aw1683_wr_reg(0x411c, 0x00f0);
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aw1683_wr_reg(0x411e, 0x0010);
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aw1683_wr_reg(0x4120, 0x0320);
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aw1683_wr_reg(0x4122, 0x01e8);
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aw1683_wr_reg(0x4124, 0x05a0);
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aw1683_wr_reg(0x4126, 0x0000);
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aw1683_wr_reg(0x4128, 0x0000);
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aw1683_wr_reg(0x412a, 0x0001);
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aw1683_wr_reg(0x412c, 0x0101);
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aw1683_wr_reg(0x412e, 0x0000);
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/* aw1683_wr_reg(0x4130, 0x0000); */
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/* aw1683_wr_reg(0x4132, 0x3016); */
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aw1683_wr_reg(0x4134, 0x0000);
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aw1683_wr_reg(0x4136, 0x0000);
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aw1683_wr_reg(0x4138, 0x0000);
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aw1683_wr_reg(0x413a, 0x0000);
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aw1683_wr_reg(0x413c, 0x0000);
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aw1683_wr_reg(0x413e, 0x0000);
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aw1683_wr_reg(0x5014, 0x0100);
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aw1683_wr_reg(0x4130, 0x0000);
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aw1683_wr_reg(0x4132, 0x2004); /* 2004 */
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aw1683_wr_reg(0x4000, 0x0300);
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} else {
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aw1683_wr_reg(0x4002, 0x8000);
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aw1683_wr_reg(0x4004, 0x0001);
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aw1683_wr_reg(0x4006, 0x0707);
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/* aw1683_wr_reg(0x4008, 0x0001); */
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aw1683_wr_reg(0x400a, 0x4300);
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aw1683_wr_reg(0x400c, 0x1400);
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aw1683_wr_reg(0x400e, 0x3000);
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aw1683_wr_reg(0x4010, 0x8acb);
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aw1683_wr_reg(0x4012, 0x2a09);
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aw1683_wr_reg(0x4014, 0x0018);
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aw1683_wr_reg(0x4016, 0x008a);
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aw1683_wr_reg(0x4018, 0x0016);
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aw1683_wr_reg(0x401a, 0x0000);
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aw1683_wr_reg(0x401c, 0x0271);
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aw1683_wr_reg(0x401e, 0x0016);
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aw1683_wr_reg(0x4020, 0x00fc);
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aw1683_wr_reg(0x4022, 0x00fc);
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aw1683_wr_reg(0x4100, 0x0000);
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aw1683_wr_reg(0x4102, 0x0000);
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aw1683_wr_reg(0x4104, 0x0001);
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aw1683_wr_reg(0x4106, 0x0000);
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aw1683_wr_reg(0x4108, 0x0005);
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aw1683_wr_reg(0x410a, 0x0000);
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aw1683_wr_reg(0x410c, 0x2929);
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aw1683_wr_reg(0x410e, 0x0000);
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aw1683_wr_reg(0x4110, 0x0000);
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aw1683_wr_reg(0x4112, 0x0000);
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aw1683_wr_reg(0x4114, 0x447e);
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aw1683_wr_reg(0x4116, 0x0016);
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aw1683_wr_reg(0x4118, 0xabab);
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aw1683_wr_reg(0x411a, 0x0000);
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aw1683_wr_reg(0x411c, 0x00fc);
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aw1683_wr_reg(0x411e, 0x0010);
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aw1683_wr_reg(0x4120, 0x0320);
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aw1683_wr_reg(0x4122, 0x01e8);
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aw1683_wr_reg(0x4124, 0x05a0);
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aw1683_wr_reg(0x4126, 0x0000);
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aw1683_wr_reg(0x4128, 0x0000);
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aw1683_wr_reg(0x412a, 0x0001);
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aw1683_wr_reg(0x412c, 0x0101);
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aw1683_wr_reg(0x412e, 0x0000);
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/* aw1683_wr_reg(0x4130, 0x0380); */
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/* aw1683_wr_reg(0x4132, 0x3009); */
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aw1683_wr_reg(0x4134, 0x0000);
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aw1683_wr_reg(0x4136, 0x0000);
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aw1683_wr_reg(0x4138, 0x0000);
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aw1683_wr_reg(0x413a, 0x0000);
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aw1683_wr_reg(0x413c, 0x0000);
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aw1683_wr_reg(0x413e, 0x0000);
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aw1683_wr_reg(0x43a0, 0x0001);
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aw1683_wr_reg(0x43a2, 0x0003);
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aw1683_wr_reg(0x5014, 0x2149);
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aw1683_wr_reg(0x4130, 0x0380);
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aw1683_wr_reg(0x4132, 0x2009); /* 2004 */
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aw1683_wr_reg(0x4000, 0x0300);
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}
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/* aw1683_wr_bits(0x4000,0x0,0x1); */
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/* aw1683_wr_reg(0x4000,0x0301); */
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return 0;
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}
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s32 aw1683_tve_open(void)
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{
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u16 data;
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aw1683_wr_reg(0x4008, 0x02a1);
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aw1683_wr_reg(0x4000, 0x0301);
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aw1683_rd_reg(0x4008, &data);
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if (data != 0x02a1)
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return -1;
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aw1683_rd_reg(0x4000, &data);
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if (data != 0x0301)
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return -1;
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return 0;
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}
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s32 aw1683_tve_close(void)
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{
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aw1683_wr_reg(0x4000, 0x0300);
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aw1683_wr_reg(0x4008, 0x02a0);
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return 0;
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}
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#if 0
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s32 aw1683_tve(void)
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{
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s32 mode = 1;
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s32 inter = 0;
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s32 ccir = 1;
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aw1673_video_rgb(mode, inter, ccir);
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aw1683_tve_init();
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aw1683_tve_set_mode(mode);
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aw1683_tve_open();
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while (1) {
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aw1683_tve_close();
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mode = 0;
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aw1673_video_rgb(mode, inter, ccir);
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aw1683_tve_set_mode(mode);
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aw1683_tve_open();
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aw1683_tve_close();
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mode = 1;
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aw1673_video_rgb(mode, inter, ccir);
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aw1683_tve_set_mode(mode);
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aw1683_tve_open();
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}
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return RET_OK;
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}
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#endif
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s32 aw1683_enable_chip(void)
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{
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aw1683_wr_reg(0x0002, 0x0001);
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return 0;
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}
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