/* Copyright 2017 The TensorFlow Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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==============================================================================*/
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#ifdef INTEL_MKL
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#include "tensorflow/core/util/mkl_util.h"
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#include "tensorflow/core/platform/test.h"
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namespace tensorflow {
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namespace {
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#ifndef INTEL_MKL_ML_ONLY
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TEST(MklUtilTest, MklDnnTfShape) {
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auto cpu_engine = engine(engine::cpu, 0);
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MklDnnData<float> a(&cpu_engine);
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const int N = 1, C = 2, H = 3, W = 4;
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memory::dims a_dims = {N, C, H, W};
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MklDnnShape a_mkldnn_shape;
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a_mkldnn_shape.SetMklTensor(true);
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// Create TF layout in NCHW.
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a_mkldnn_shape.SetTfLayout(a_dims.size(), a_dims, memory::format::nchw);
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TensorShape a_tf_shape_nchw({N, C, H, W});
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TensorShape a_tf_shape_nhwc({N, H, W, C});
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TensorShape a_mkldnn_tf_shape = a_mkldnn_shape.GetTfShape();
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// Check that returned shape is in NCHW format.
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EXPECT_EQ(a_tf_shape_nchw, a_mkldnn_tf_shape);
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EXPECT_NE(a_tf_shape_nhwc, a_mkldnn_tf_shape);
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memory::dims b_dims = {N, C, H, W};
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MklDnnShape b_mkldnn_shape;
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b_mkldnn_shape.SetMklTensor(true);
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// Create TF layout in NHWC.
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b_mkldnn_shape.SetTfLayout(b_dims.size(), b_dims, memory::format::nhwc);
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TensorShape b_tf_shape_nhwc({N, H, W, C});
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TensorShape b_tf_shape_nchw({N, C, H, W});
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TensorShape b_mkldnn_tf_shape = b_mkldnn_shape.GetTfShape();
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// Check that returned shape is in NHWC format.
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EXPECT_EQ(b_tf_shape_nhwc, b_mkldnn_tf_shape);
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EXPECT_NE(b_tf_shape_nchw, b_mkldnn_tf_shape);
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}
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TEST(MklUtilTest, MklDnnBlockedFormatTest) {
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// Let's create 2D tensor of shape {3, 4} with 3 being innermost dimension
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// first (case 1) and then it being outermost dimension (case 2).
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auto cpu_engine = engine(engine::cpu, 0);
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// Setting for case 1
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MklDnnData<float> a(&cpu_engine);
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memory::dims dim1 = {3, 4};
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memory::dims strides1 = {1, 3};
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a.SetUsrMem(dim1, strides1);
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memory::desc a_md1 = a.GetUsrMemDesc();
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EXPECT_EQ(a_md1.data.ndims, 2);
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EXPECT_EQ(a_md1.data.dims[0], 3);
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EXPECT_EQ(a_md1.data.dims[1], 4);
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EXPECT_EQ(a_md1.data.format, mkldnn_blocked);
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// Setting for case 2
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MklDnnData<float> b(&cpu_engine);
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memory::dims dim2 = {3, 4};
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memory::dims strides2 = {4, 1};
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b.SetUsrMem(dim2, strides2);
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memory::desc b_md2 = b.GetUsrMemDesc();
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EXPECT_EQ(b_md2.data.ndims, 2);
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EXPECT_EQ(b_md2.data.dims[0], 3);
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EXPECT_EQ(b_md2.data.dims[1], 4);
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EXPECT_EQ(b_md2.data.format, mkldnn_blocked);
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}
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TEST(MklUtilTest, LRUCacheTest) {
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// The cached objects are of type int*
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size_t capacity = 100;
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size_t num_objects = capacity + 10;
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LRUCache<int> lru_cache(capacity);
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// Test SetOp: be able to set more ops than the capacity
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for (int k = 0; k < num_objects; k++) {
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lru_cache.SetOp(std::to_string(k), new int(k));
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}
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// Test GetOp and capacity:
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// Least recently accessed objects should not be in cache any more.
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for (int k = 0; k < num_objects - capacity; ++k) {
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EXPECT_EQ(nullptr, lru_cache.GetOp(std::to_string(k)));
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}
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// Test GetOp and capacity:
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// Most recently accessed objects should still be in cache.
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for (int k = num_objects - capacity; k < num_objects; ++k) {
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int* int_ptr = lru_cache.GetOp(std::to_string(k));
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EXPECT_NE(nullptr, int_ptr);
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EXPECT_EQ(*int_ptr, k);
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}
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// Clean up the cache
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lru_cache.Clear();
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// After clean up, there should be no cached object.
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for (int k = 0; k < num_objects; ++k) {
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EXPECT_EQ(nullptr, lru_cache.GetOp(std::to_string(k)));
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}
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}
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#endif // INTEL_MKL_ML_ONLY
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} // namespace
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} // namespace tensorflow
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#endif // INTEL_MKL
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