/**
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******************************************************************************
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*
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* rwnx_cmds.c
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*
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* Handles queueing (push to IPC, ack/cfm from IPC) of commands issued to
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* LMAC FW
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*
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* Copyright (C) RivieraWaves 2014-2019
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*
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******************************************************************************
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*/
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#include <linux/list.h>
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#include <linux/version.h>
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#include <linux/firmware.h>
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#include "aicsdio_txrxif.h"
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#include "aicsdio.h"
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#include "aic_bsp_driver.h"
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static u8 binding_enc_data[16];
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static bool need_binding_verify;
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int wcn_bind_verify_calculate_verify_data(uint8_t *din, uint8_t *dout);
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#ifndef CONFIG_PLATFORM_ALLWINNER
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int wcn_bind_verify_calculate_verify_data(uint8_t *din, uint8_t *dout)
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{
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return 0;
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}
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#endif
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static void cmd_dump(const struct rwnx_cmd *cmd)
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{
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printk(KERN_CRIT "tkn[%d] flags:%04x result:%3d cmd:%4d - reqcfm(%4d)\n",
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cmd->tkn, cmd->flags, cmd->result, cmd->id, cmd->reqid);
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}
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static void cmd_complete(struct rwnx_cmd_mgr *cmd_mgr, struct rwnx_cmd *cmd)
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{
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//printk("cmdcmp\n");
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lockdep_assert_held(&cmd_mgr->lock);
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list_del(&cmd->list);
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cmd_mgr->queue_sz--;
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cmd->flags |= RWNX_CMD_FLAG_DONE;
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if (cmd->flags & RWNX_CMD_FLAG_NONBLOCK) {
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kfree(cmd);
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} else {
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if (RWNX_CMD_WAIT_COMPLETE(cmd->flags)) {
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cmd->result = 0;
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complete(&cmd->complete);
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}
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}
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}
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static int cmd_mgr_queue(struct rwnx_cmd_mgr *cmd_mgr, struct rwnx_cmd *cmd)
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{
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bool defer_push = false;
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int err = 0;
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spin_lock_bh(&cmd_mgr->lock);
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if (cmd_mgr->state == RWNX_CMD_MGR_STATE_CRASHED) {
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printk(KERN_CRIT"cmd queue crashed\n");
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cmd->result = -EPIPE;
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spin_unlock_bh(&cmd_mgr->lock);
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return -EPIPE;
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}
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if (!list_empty(&cmd_mgr->cmds)) {
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struct rwnx_cmd *last;
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if (cmd_mgr->queue_sz == cmd_mgr->max_queue_sz) {
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printk(KERN_CRIT"Too many cmds (%d) already queued\n",
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cmd_mgr->max_queue_sz);
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cmd->result = -ENOMEM;
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spin_unlock_bh(&cmd_mgr->lock);
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return -ENOMEM;
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}
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last = list_entry(cmd_mgr->cmds.prev, struct rwnx_cmd, list);
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if (last->flags & (RWNX_CMD_FLAG_WAIT_ACK | RWNX_CMD_FLAG_WAIT_PUSH)) {
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cmd->flags |= RWNX_CMD_FLAG_WAIT_PUSH;
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defer_push = true;
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}
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}
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if (cmd->flags & RWNX_CMD_FLAG_REQ_CFM)
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cmd->flags |= RWNX_CMD_FLAG_WAIT_CFM;
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cmd->tkn = cmd_mgr->next_tkn++;
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cmd->result = -EINTR;
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if (!(cmd->flags & RWNX_CMD_FLAG_NONBLOCK))
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init_completion(&cmd->complete);
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list_add_tail(&cmd->list, &cmd_mgr->cmds);
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cmd_mgr->queue_sz++;
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spin_unlock_bh(&cmd_mgr->lock);
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if (!defer_push) {
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//printk("queue:id=%x, param_len=%u\n", cmd->a2e_msg->id, cmd->a2e_msg->param_len);
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rwnx_set_cmd_tx((void *)(cmd_mgr->sdiodev), cmd->a2e_msg, sizeof(struct lmac_msg) + cmd->a2e_msg->param_len);
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//rwnx_ipc_msg_push(rwnx_hw, cmd, RWNX_CMD_A2EMSG_LEN(cmd->a2e_msg));
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kfree(cmd->a2e_msg);
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} else {
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//WAKE_CMD_WORK(cmd_mgr);
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printk("ERR: never defer push!!!!");
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return 0;
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}
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if (!(cmd->flags & RWNX_CMD_FLAG_NONBLOCK)) {
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unsigned long tout = msecs_to_jiffies(RWNX_80211_CMD_TIMEOUT_MS * cmd_mgr->queue_sz);
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if (!wait_for_completion_timeout(&cmd->complete, tout)) {
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printk(KERN_CRIT"cmd timed-out\n");
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cmd_dump(cmd);
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spin_lock_bh(&cmd_mgr->lock);
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cmd_mgr->state = RWNX_CMD_MGR_STATE_CRASHED;
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if (!(cmd->flags & RWNX_CMD_FLAG_DONE)) {
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cmd->result = -ETIMEDOUT;
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cmd_complete(cmd_mgr, cmd);
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}
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spin_unlock_bh(&cmd_mgr->lock);
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err = -ETIMEDOUT;
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} else {
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kfree(cmd);
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}
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} else {
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cmd->result = 0;
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}
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return err;
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}
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static int cmd_mgr_run_callback(struct rwnx_cmd_mgr *cmd_mgr, struct rwnx_cmd *cmd,
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struct rwnx_cmd_e2amsg *msg, msg_cb_fct cb)
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{
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int res;
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if (!cb) {
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return 0;
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}
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spin_lock(&cmd_mgr->cb_lock);
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res = cb(cmd, msg);
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spin_unlock(&cmd_mgr->cb_lock);
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return res;
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}
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static int cmd_mgr_msgind(struct rwnx_cmd_mgr *cmd_mgr, struct rwnx_cmd_e2amsg *msg,
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msg_cb_fct cb)
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{
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struct rwnx_cmd *cmd;
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bool found = false;
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//printk("cmd->id=%x\n", msg->id);
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spin_lock(&cmd_mgr->lock);
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list_for_each_entry(cmd, &cmd_mgr->cmds, list) {
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if (cmd->reqid == msg->id &&
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(cmd->flags & RWNX_CMD_FLAG_WAIT_CFM)) {
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if (!cmd_mgr_run_callback(cmd_mgr, cmd, msg, cb)) {
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found = true;
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cmd->flags &= ~RWNX_CMD_FLAG_WAIT_CFM;
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if (WARN((msg->param_len > RWNX_CMD_E2AMSG_LEN_MAX),
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"Unexpect E2A msg len %d > %d\n", msg->param_len,
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RWNX_CMD_E2AMSG_LEN_MAX)) {
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msg->param_len = RWNX_CMD_E2AMSG_LEN_MAX;
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}
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if (cmd->e2a_msg && msg->param_len)
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memcpy(cmd->e2a_msg, &msg->param, msg->param_len);
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if (RWNX_CMD_WAIT_COMPLETE(cmd->flags))
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cmd_complete(cmd_mgr, cmd);
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break;
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}
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}
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}
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spin_unlock(&cmd_mgr->lock);
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if (!found)
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cmd_mgr_run_callback(cmd_mgr, NULL, msg, cb);
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return 0;
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}
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static void cmd_mgr_print(struct rwnx_cmd_mgr *cmd_mgr)
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{
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struct rwnx_cmd *cur;
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spin_lock_bh(&cmd_mgr->lock);
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list_for_each_entry(cur, &cmd_mgr->cmds, list) {
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cmd_dump(cur);
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}
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spin_unlock_bh(&cmd_mgr->lock);
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}
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static void cmd_mgr_drain(struct rwnx_cmd_mgr *cmd_mgr)
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{
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struct rwnx_cmd *cur, *nxt;
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spin_lock_bh(&cmd_mgr->lock);
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list_for_each_entry_safe(cur, nxt, &cmd_mgr->cmds, list) {
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list_del(&cur->list);
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cmd_mgr->queue_sz--;
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if (!(cur->flags & RWNX_CMD_FLAG_NONBLOCK))
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complete(&cur->complete);
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}
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spin_unlock_bh(&cmd_mgr->lock);
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}
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void rwnx_cmd_mgr_init(struct rwnx_cmd_mgr *cmd_mgr)
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{
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cmd_mgr->max_queue_sz = RWNX_CMD_MAX_QUEUED;
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INIT_LIST_HEAD(&cmd_mgr->cmds);
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cmd_mgr->state = RWNX_CMD_MGR_STATE_INITED;
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spin_lock_init(&cmd_mgr->lock);
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spin_lock_init(&cmd_mgr->cb_lock);
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cmd_mgr->queue = &cmd_mgr_queue;
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cmd_mgr->print = &cmd_mgr_print;
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cmd_mgr->drain = &cmd_mgr_drain;
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cmd_mgr->llind = NULL;//&cmd_mgr_llind;
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cmd_mgr->msgind = &cmd_mgr_msgind;
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#if 0
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INIT_WORK(&cmd_mgr->cmdWork, cmd_mgr_task_process);
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cmd_mgr->cmd_wq = create_singlethread_workqueue("cmd_wq");
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if (!cmd_mgr->cmd_wq) {
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txrx_err("insufficient memory to create cmd workqueue.\n");
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return;
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}
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#endif
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}
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void rwnx_cmd_mgr_deinit(struct rwnx_cmd_mgr *cmd_mgr)
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{
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cmd_mgr->print(cmd_mgr);
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cmd_mgr->drain(cmd_mgr);
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cmd_mgr->print(cmd_mgr);
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memset(cmd_mgr, 0, sizeof(*cmd_mgr));
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}
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void rwnx_set_cmd_tx(void *dev, struct lmac_msg *msg, uint len)
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{
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struct aic_sdio_dev *sdiodev = (struct aic_sdio_dev *)dev;
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struct aicwf_bus *bus = sdiodev->bus_if;
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u8 *buffer = bus->cmd_buf;
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u16 index = 0;
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memset(buffer, 0, CMD_BUF_MAX);
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buffer[0] = (len+4) & 0x00ff;
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buffer[1] = ((len+4) >> 8) &0x0f;
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buffer[2] = 0x11;
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buffer[3] = 0x0;
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index += 4;
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//there is a dummy word
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index += 4;
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//make sure little endian
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put_u16(&buffer[index], msg->id);
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index += 2;
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put_u16(&buffer[index], msg->dest_id);
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index += 2;
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put_u16(&buffer[index], msg->src_id);
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index += 2;
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put_u16(&buffer[index], msg->param_len);
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index += 2;
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memcpy(&buffer[index], (u8 *)msg->param, msg->param_len);
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aicwf_bus_txmsg(bus, buffer, len + 8);
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}
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static inline void *rwnx_msg_zalloc(lmac_msg_id_t const id,
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lmac_task_id_t const dest_id,
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lmac_task_id_t const src_id,
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uint16_t const param_len)
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{
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struct lmac_msg *msg;
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gfp_t flags;
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if (in_softirq())
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flags = GFP_ATOMIC;
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else
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flags = GFP_KERNEL;
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msg = (struct lmac_msg *)kzalloc(sizeof(struct lmac_msg) + param_len,
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flags);
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if (msg == NULL) {
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printk(KERN_CRIT "%s: msg allocation failed\n", __func__);
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return NULL;
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}
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msg->id = id;
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msg->dest_id = dest_id;
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msg->src_id = src_id;
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msg->param_len = param_len;
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return msg->param;
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}
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static void rwnx_msg_free(struct lmac_msg *msg, const void *msg_params)
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{
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kfree(msg);
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}
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static int rwnx_send_msg(struct aic_sdio_dev *sdiodev, const void *msg_params,
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int reqcfm, lmac_msg_id_t reqid, void *cfm)
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{
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struct lmac_msg *msg;
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struct rwnx_cmd *cmd;
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bool nonblock;
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int ret = 0;
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msg = container_of((void *)msg_params, struct lmac_msg, param);
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if (sdiodev->bus_if->state == BUS_DOWN_ST) {
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rwnx_msg_free(msg, msg_params);
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printk("bus is down\n");
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return 0;
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}
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nonblock = 0;
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cmd = kzalloc(sizeof(struct rwnx_cmd), nonblock ? GFP_ATOMIC : GFP_KERNEL);
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cmd->result = -EINTR;
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cmd->id = msg->id;
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cmd->reqid = reqid;
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cmd->a2e_msg = msg;
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cmd->e2a_msg = cfm;
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if (nonblock)
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cmd->flags = RWNX_CMD_FLAG_NONBLOCK;
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if (reqcfm)
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cmd->flags |= RWNX_CMD_FLAG_REQ_CFM;
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if (reqcfm) {
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cmd->flags &= ~RWNX_CMD_FLAG_WAIT_ACK; // we don't need ack any more
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ret = sdiodev->cmd_mgr.queue(&sdiodev->cmd_mgr, cmd);
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} else {
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rwnx_set_cmd_tx((void *)(sdiodev), cmd->a2e_msg, sizeof(struct lmac_msg) + cmd->a2e_msg->param_len);
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}
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if (!reqcfm)
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kfree(cmd);
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return ret;
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}
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int rwnx_send_dbg_mem_block_write_req(struct aic_sdio_dev *sdiodev, u32 mem_addr,
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u32 mem_size, u32 *mem_data)
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{
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struct dbg_mem_block_write_req *mem_blk_write_req;
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/* Build the DBG_MEM_BLOCK_WRITE_REQ message */
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mem_blk_write_req = rwnx_msg_zalloc(DBG_MEM_BLOCK_WRITE_REQ, TASK_DBG, DRV_TASK_ID,
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sizeof(struct dbg_mem_block_write_req));
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if (!mem_blk_write_req)
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return -ENOMEM;
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/* Set parameters for the DBG_MEM_BLOCK_WRITE_REQ message */
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mem_blk_write_req->memaddr = mem_addr;
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mem_blk_write_req->memsize = mem_size;
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memcpy(mem_blk_write_req->memdata, mem_data, mem_size);
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/* Send the DBG_MEM_BLOCK_WRITE_REQ message to LMAC FW */
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return rwnx_send_msg(sdiodev, mem_blk_write_req, 1, DBG_MEM_BLOCK_WRITE_CFM, NULL);
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}
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int rwnx_send_dbg_mem_read_req(struct aic_sdio_dev *sdiodev, u32 mem_addr,
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struct dbg_mem_read_cfm *cfm)
|
{
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struct dbg_mem_read_req *mem_read_req;
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/* Build the DBG_MEM_READ_REQ message */
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mem_read_req = rwnx_msg_zalloc(DBG_MEM_READ_REQ, TASK_DBG, DRV_TASK_ID,
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sizeof(struct dbg_mem_read_req));
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if (!mem_read_req)
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return -ENOMEM;
|
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/* Set parameters for the DBG_MEM_READ_REQ message */
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mem_read_req->memaddr = mem_addr;
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/* Send the DBG_MEM_READ_REQ message to LMAC FW */
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return rwnx_send_msg(sdiodev, mem_read_req, 1, DBG_MEM_READ_CFM, cfm);
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}
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|
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int rwnx_send_dbg_mem_write_req(struct aic_sdio_dev *sdiodev, u32 mem_addr, u32 mem_data)
|
{
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struct dbg_mem_write_req *mem_write_req;
|
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/* Build the DBG_MEM_WRITE_REQ message */
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mem_write_req = rwnx_msg_zalloc(DBG_MEM_WRITE_REQ, TASK_DBG, DRV_TASK_ID,
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sizeof(struct dbg_mem_write_req));
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if (!mem_write_req)
|
return -ENOMEM;
|
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/* Set parameters for the DBG_MEM_WRITE_REQ message */
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mem_write_req->memaddr = mem_addr;
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mem_write_req->memdata = mem_data;
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/* Send the DBG_MEM_WRITE_REQ message to LMAC FW */
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return rwnx_send_msg(sdiodev, mem_write_req, 1, DBG_MEM_WRITE_CFM, NULL);
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}
|
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int rwnx_send_dbg_mem_mask_write_req(struct aic_sdio_dev *sdiodev, u32 mem_addr,
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u32 mem_mask, u32 mem_data)
|
{
|
struct dbg_mem_mask_write_req *mem_mask_write_req;
|
|
/* Build the DBG_MEM_MASK_WRITE_REQ message */
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mem_mask_write_req = rwnx_msg_zalloc(DBG_MEM_MASK_WRITE_REQ, TASK_DBG, DRV_TASK_ID,
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sizeof(struct dbg_mem_mask_write_req));
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if (!mem_mask_write_req)
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return -ENOMEM;
|
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/* Set parameters for the DBG_MEM_MASK_WRITE_REQ message */
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mem_mask_write_req->memaddr = mem_addr;
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mem_mask_write_req->memmask = mem_mask;
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mem_mask_write_req->memdata = mem_data;
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/* Send the DBG_MEM_MASK_WRITE_REQ message to LMAC FW */
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return rwnx_send_msg(sdiodev, mem_mask_write_req, 1, DBG_MEM_MASK_WRITE_CFM, NULL);
|
}
|
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int rwnx_send_dbg_binding_req(struct aic_sdio_dev *sdiodev, u8 *dout, u8 *binding_status)
|
{
|
struct dbg_binding_req *binding_req;
|
|
/* Build the DBG_BINDING_REQ message */
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binding_req = rwnx_msg_zalloc(DBG_BINDING_REQ, TASK_DBG, DRV_TASK_ID,
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sizeof(struct dbg_binding_req));
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if (!binding_req)
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return -ENOMEM;
|
|
memcpy(binding_req->driver_data, dout, 16);
|
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/* Send the DBG_MEM_MASK_WRITE_REQ message to LMAC FW */
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return rwnx_send_msg(sdiodev, binding_req, 1, DBG_BINDING_CFM, binding_status);
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}
|
|
int rwnx_send_dbg_start_app_req(struct aic_sdio_dev *sdiodev, u32 boot_addr, u32 boot_type, struct dbg_start_app_cfm *start_app_cfm)
|
{
|
struct dbg_start_app_req *start_app_req;
|
|
/* Build the DBG_START_APP_REQ message */
|
start_app_req = rwnx_msg_zalloc(DBG_START_APP_REQ, TASK_DBG, DRV_TASK_ID,
|
sizeof(struct dbg_start_app_req));
|
if (!start_app_req) {
|
printk("start app nomen\n");
|
return -ENOMEM;
|
}
|
|
/* Set parameters for the DBG_START_APP_REQ message */
|
start_app_req->bootaddr = boot_addr;
|
start_app_req->boottype = boot_type;
|
|
/* Send the DBG_START_APP_REQ message to LMAC FW */
|
return rwnx_send_msg(sdiodev, start_app_req, 1, DBG_START_APP_CFM, start_app_cfm);
|
}
|
|
static inline int dbg_binding_ind(struct rwnx_cmd *cmd, struct ipc_e2a_msg *msg)
|
{
|
struct dbg_binding_ind *ind = (struct dbg_binding_ind *)msg->param;
|
memcpy(binding_enc_data, ind->enc_data, 16);
|
need_binding_verify = true;
|
|
return 0;
|
}
|
|
static msg_cb_fct dbg_hdlrs[MSG_I(DBG_MAX)] = {
|
[MSG_I(DBG_BINDING_IND)] = (msg_cb_fct)dbg_binding_ind,
|
};
|
|
static msg_cb_fct *msg_hdlrs[] = {
|
[TASK_DBG] = dbg_hdlrs,
|
};
|
|
void rwnx_rx_handle_msg(struct aic_sdio_dev *sdiodev, struct ipc_e2a_msg *msg)
|
{
|
sdiodev->cmd_mgr.msgind(&sdiodev->cmd_mgr, msg,
|
msg_hdlrs[MSG_T(msg->id)][MSG_I(msg->id)]);
|
}
|
|
int rwnx_plat_bin_fw_upload_android(struct aic_sdio_dev *sdiodev, u32 fw_addr,
|
const char *filename)
|
{
|
unsigned int i = 0;
|
int size;
|
u32 *dst = NULL;
|
int err = 0;
|
|
const struct firmware *fw = NULL;
|
int ret = request_firmware(&fw, filename, NULL);
|
|
printk("rwnx_request_firmware, name: %s\n", filename);
|
if (ret < 0) {
|
printk("Load %s fail\n", filename);
|
return ret;
|
}
|
|
size = fw->size;
|
dst = (u32 *)fw->data;
|
|
if (size <= 0) {
|
printk("wrong size of firmware file\n");
|
release_firmware(fw);
|
return -1;
|
}
|
|
/* Copy the file on the Embedded side */
|
if (size > 1024) {// > 1KB data
|
for (i = 0; i < (size - 1024); i += 1024) {//each time write 1KB
|
err = rwnx_send_dbg_mem_block_write_req(sdiodev, fw_addr + i, 1024, dst + i / 4);
|
if (err) {
|
printk("bin upload fail: %x, err:%d\r\n", fw_addr + i, err);
|
break;
|
}
|
}
|
}
|
|
if (!err && (i < size)) {// <1KB data
|
err = rwnx_send_dbg_mem_block_write_req(sdiodev, fw_addr + i, size - i, dst + i / 4);
|
if (err) {
|
printk("bin upload fail: %x, err:%d\r\n", fw_addr + i, err);
|
}
|
}
|
|
release_firmware(fw);
|
return err;
|
}
|
|
int aicbt_patch_table_free(struct aicbt_patch_table **head)
|
{
|
struct aicbt_patch_table *p = *head, *n = NULL;
|
while (p) {
|
n = p->next;
|
kfree(p->name);
|
kfree(p->data);
|
kfree(p);
|
p = n;
|
}
|
*head = NULL;
|
return 0;
|
}
|
|
struct aicbt_patch_table *aicbt_patch_table_alloc(const char *filename)
|
{
|
uint8_t *rawdata = NULL, *p;
|
int size;
|
struct aicbt_patch_table *head = NULL, *new = NULL, *cur = NULL;
|
|
const struct firmware *fw = NULL;
|
int ret = request_firmware(&fw, filename, NULL);
|
|
printk("rwnx_request_firmware, name: %s\n", filename);
|
if (ret < 0) {
|
printk("Load %s fail\n", filename);
|
return NULL;
|
}
|
|
rawdata = (uint8_t *)fw->data;
|
size = fw->size;
|
|
if (size <= 0) {
|
printk("wrong size of firmware file\n");
|
goto err;
|
}
|
|
p = rawdata;
|
if (memcmp(p, AICBT_PT_TAG, sizeof(AICBT_PT_TAG) < 16 ? sizeof(AICBT_PT_TAG) : 16)) {
|
printk("TAG err\n");
|
goto err;
|
}
|
p += 16;
|
|
while (p - rawdata < size) {
|
new = (struct aicbt_patch_table *)kzalloc(sizeof(struct aicbt_patch_table), GFP_KERNEL);
|
memset(new, 0, sizeof(struct aicbt_patch_table));
|
if (head == NULL) {
|
head = new;
|
cur = new;
|
} else {
|
cur->next = new;
|
cur = cur->next;
|
}
|
|
cur->name = (char *)kzalloc(sizeof(char) * 16, GFP_KERNEL);
|
memcpy(cur->name, p, 16);
|
p += 16;
|
|
cur->type = *(uint32_t *)p;
|
p += 4;
|
|
cur->len = *(uint32_t *)p;
|
p += 4;
|
|
cur->data = (uint32_t *)kzalloc(sizeof(uint8_t) * cur->len * 8, GFP_KERNEL);
|
memcpy(cur->data, p, cur->len * 8);
|
p += cur->len * 8;
|
}
|
release_firmware(fw);
|
return head;
|
|
err:
|
aicbt_patch_table_free(&head);
|
release_firmware(fw);
|
return NULL;
|
}
|
|
int aicbt_patch_trap_data_load(struct aic_sdio_dev *sdiodev)
|
{
|
uint32_t fw_ram_adid_base_addr = FW_RAM_ADID_BASE_ADDR;
|
if (aicbsp_info.chip_rev != CHIP_REV_U02)
|
fw_ram_adid_base_addr = FW_RAM_ADID_BASE_ADDR_U03;
|
|
if (rwnx_plat_bin_fw_upload_android(sdiodev, fw_ram_adid_base_addr, aicbsp_firmware_list[aicbsp_info.cpmode].bt_adid))
|
return -1;
|
if (rwnx_plat_bin_fw_upload_android(sdiodev, FW_RAM_PATCH_BASE_ADDR, aicbsp_firmware_list[aicbsp_info.cpmode].bt_patch))
|
return -1;
|
return 0;
|
}
|
|
static struct aicbt_info_t aicbt_info = {
|
.btmode = AICBT_BTMODE_DEFAULT,
|
.btport = AICBT_BTPORT_DEFAULT,
|
.uart_baud = AICBT_UART_BAUD_DEFAULT,
|
.uart_flowctrl = AICBT_UART_FC_DEFAULT,
|
.lpm_enable = AICBT_LPM_ENABLE_DEFAULT,
|
.txpwr_lvl = AICBT_TXPWR_LVL_DEFAULT,
|
};
|
|
int aicbt_patch_table_load(struct aic_sdio_dev *sdiodev)
|
{
|
struct aicbt_patch_table *head, *p;
|
int ret = 0, i;
|
uint32_t *data = NULL;
|
head = aicbt_patch_table_alloc(aicbsp_firmware_list[aicbsp_info.cpmode].bt_table);
|
for (p = head; p != NULL; p = p->next) {
|
data = p->data;
|
if (AICBT_PT_BTMODE == p->type) {
|
*(data + 1) = aicbsp_info.hwinfo < 0;
|
*(data + 3) = aicbsp_info.hwinfo;
|
*(data + 5) = aicbsp_info.cpmode;
|
|
*(data + 7) = aicbt_info.btmode;
|
*(data + 9) = aicbt_info.btport;
|
*(data + 11) = aicbt_info.uart_baud;
|
*(data + 13) = aicbt_info.uart_flowctrl;
|
*(data + 15) = aicbt_info.lpm_enable;
|
*(data + 17) = aicbt_info.txpwr_lvl;
|
|
printk("%s bt uart baud: %d, flowctrl: %d, lpm_enable: %d, tx_pwr: %d\n", __func__,
|
aicbt_info.uart_baud, aicbt_info.uart_flowctrl, aicbt_info.lpm_enable, aicbt_info.txpwr_lvl);
|
}
|
|
if (AICBT_PT_VER == p->type) {
|
printk("aicbsp: bt patch version: %s\n", (char *)p->data);
|
continue;
|
}
|
|
for (i = 0; i < p->len; i++) {
|
ret = rwnx_send_dbg_mem_write_req(sdiodev, *data, *(data + 1));
|
if (ret != 0)
|
return ret;
|
data += 2;
|
}
|
if (p->type == AICBT_PT_PWRON)
|
udelay(500);
|
}
|
aicbt_patch_table_free(&head);
|
return 0;
|
}
|
|
int aicbt_init(struct aic_sdio_dev *sdiodev)
|
{
|
if (aicbt_patch_trap_data_load(sdiodev)) {
|
printk("aicbt_patch_trap_data_load fail\n");
|
return -1;
|
}
|
|
if (aicbt_patch_table_load(sdiodev)) {
|
printk("aicbt_patch_table_load fail\n");
|
return -1;
|
}
|
|
return 0;
|
}
|
|
static int aicwifi_start_from_bootrom(struct aic_sdio_dev *sdiodev)
|
{
|
int ret = 0;
|
|
/* memory access */
|
const u32 fw_addr = RAM_FMAC_FW_ADDR;
|
struct dbg_start_app_cfm start_app_cfm;
|
|
/* fw start */
|
ret = rwnx_send_dbg_start_app_req(sdiodev, fw_addr, HOST_START_APP_AUTO, &start_app_cfm);
|
if (ret) {
|
return -1;
|
}
|
aicbsp_info.hwinfo_r = start_app_cfm.bootstatus & 0xFF;
|
|
return 0;
|
}
|
|
u32 patch_tbl[][2] = {
|
};
|
|
u32 syscfg_tbl_masked[][3] = {
|
{0x40506024, 0x000000FF, 0x000000DF}, // for clk gate lp_level
|
};
|
|
u32 rf_tbl_masked[][3] = {
|
{0x40344058, 0x00800000, 0x00000000},// pll trx
|
};
|
|
static int aicwifi_sys_config(struct aic_sdio_dev *sdiodev)
|
{
|
int ret, cnt;
|
int syscfg_num = sizeof(syscfg_tbl_masked) / sizeof(u32) / 3;
|
for (cnt = 0; cnt < syscfg_num; cnt++) {
|
ret = rwnx_send_dbg_mem_mask_write_req(sdiodev,
|
syscfg_tbl_masked[cnt][0], syscfg_tbl_masked[cnt][1], syscfg_tbl_masked[cnt][2]);
|
if (ret) {
|
printk("%x mask write fail: %d\n", syscfg_tbl_masked[cnt][0], ret);
|
return ret;
|
}
|
}
|
|
ret = rwnx_send_dbg_mem_mask_write_req(sdiodev,
|
rf_tbl_masked[0][0], rf_tbl_masked[0][1], rf_tbl_masked[0][2]);
|
if (ret) {
|
printk("rf config %x write fail: %d\n", rf_tbl_masked[0][0], ret);
|
return ret;
|
}
|
|
return 0;
|
}
|
|
static int aicwifi_patch_config(struct aic_sdio_dev *sdiodev)
|
{
|
const u32 rd_patch_addr = RAM_FMAC_FW_ADDR + 0x0180;
|
u32 config_base;
|
uint32_t start_addr = 0x1e6000;
|
u32 patch_addr = start_addr;
|
u32 patch_num = sizeof(patch_tbl)/4;
|
struct dbg_mem_read_cfm rd_patch_addr_cfm;
|
int ret = 0;
|
u16 cnt = 0;
|
u32 patch_addr_reg = 0x1e5318;
|
u32 patch_num_reg = 0x1e531c;
|
|
if (aicbsp_info.cpmode == AICBSP_CPMODE_TEST) {
|
patch_addr_reg = 0x1e5304;
|
patch_num_reg = 0x1e5308;
|
}
|
|
ret = rwnx_send_dbg_mem_read_req(sdiodev, rd_patch_addr, &rd_patch_addr_cfm);
|
if (ret) {
|
printk("patch rd fail\n");
|
return ret;
|
}
|
|
config_base = rd_patch_addr_cfm.memdata;
|
|
ret = rwnx_send_dbg_mem_write_req(sdiodev, patch_addr_reg, patch_addr);
|
if (ret) {
|
printk("0x%x write fail\n", patch_addr_reg);
|
return ret;
|
}
|
|
ret = rwnx_send_dbg_mem_write_req(sdiodev, patch_num_reg, patch_num);
|
if (ret) {
|
printk("0x%x write fail\n", patch_num_reg);
|
return ret;
|
}
|
|
for (cnt = 0; cnt < patch_num/2; cnt += 1) {
|
ret = rwnx_send_dbg_mem_write_req(sdiodev, start_addr+8*cnt, patch_tbl[cnt][0]+config_base);
|
if (ret) {
|
printk("%x write fail\n", start_addr+8*cnt);
|
return ret;
|
}
|
|
ret = rwnx_send_dbg_mem_write_req(sdiodev, start_addr+8*cnt+4, patch_tbl[cnt][1]);
|
if (ret) {
|
printk("%x write fail\n", start_addr+8*cnt+4);
|
return ret;
|
}
|
}
|
|
return 0;
|
}
|
|
int aicwifi_init(struct aic_sdio_dev *sdiodev)
|
{
|
if (rwnx_plat_bin_fw_upload_android(sdiodev, RAM_FMAC_FW_ADDR, aicbsp_firmware_list[aicbsp_info.cpmode].wl_fw)) {
|
printk("download wifi fw fail\n");
|
return -1;
|
}
|
|
if (aicwifi_patch_config(sdiodev)) {
|
printk("aicwifi_patch_config fail\n");
|
return -1;
|
}
|
|
if (aicwifi_sys_config(sdiodev)) {
|
printk("aicwifi_sys_config fail\n");
|
return -1;
|
}
|
|
if (aicwifi_start_from_bootrom(sdiodev)) {
|
printk("wifi start fail\n");
|
return -1;
|
}
|
|
return 0;
|
}
|
|
u32 aicbsp_syscfg_tbl[][2] = {
|
{0x40500014, 0x00000101}, // 1)
|
{0x40500018, 0x00000109}, // 2)
|
{0x40500004, 0x00000010}, // 3) the order should not be changed
|
|
// def CONFIG_PMIC_SETTING
|
// U02 bootrom only
|
{0x40040000, 0x00001AC8}, // 1) fix panic
|
{0x40040084, 0x00011580},
|
{0x40040080, 0x00000001},
|
{0x40100058, 0x00000000},
|
|
{0x50000000, 0x03220204}, // 2) pmic interface init
|
{0x50019150, 0x00000002}, // 3) for 26m xtal, set div1
|
{0x50017008, 0x00000000}, // 4) stop wdg
|
};
|
|
static int aicbsp_system_config(struct aic_sdio_dev *sdiodev)
|
{
|
int syscfg_num = sizeof(aicbsp_syscfg_tbl) / sizeof(u32) / 2;
|
int ret, cnt;
|
for (cnt = 0; cnt < syscfg_num; cnt++) {
|
ret = rwnx_send_dbg_mem_write_req(sdiodev, aicbsp_syscfg_tbl[cnt][0], aicbsp_syscfg_tbl[cnt][1]);
|
if (ret) {
|
sdio_err("%x write fail: %d\n", aicbsp_syscfg_tbl[cnt][0], ret);
|
return ret;
|
}
|
}
|
return 0;
|
}
|
|
int aicbsp_platform_init(struct aic_sdio_dev *sdiodev)
|
{
|
rwnx_cmd_mgr_init(&sdiodev->cmd_mgr);
|
sdiodev->cmd_mgr.sdiodev = (void *)sdiodev;
|
return 0;
|
}
|
|
void aicbsp_platform_deinit(struct aic_sdio_dev *sdiodev)
|
{
|
(void)sdiodev;
|
}
|
|
int aicbsp_driver_fw_init(struct aic_sdio_dev *sdiodev)
|
{
|
const u32 mem_addr = 0x40500000;
|
struct dbg_mem_read_cfm rd_mem_addr_cfm;
|
|
uint8_t binding_status;
|
uint8_t dout[16];
|
|
need_binding_verify = false;
|
|
if (rwnx_send_dbg_mem_read_req(sdiodev, mem_addr, &rd_mem_addr_cfm))
|
return -1;
|
|
aicbsp_info.chip_rev = (u8)(rd_mem_addr_cfm.memdata >> 16);
|
if (aicbsp_info.chip_rev != CHIP_REV_U02 &&
|
aicbsp_info.chip_rev != CHIP_REV_U03 &&
|
aicbsp_info.chip_rev != CHIP_REV_U04) {
|
pr_err("aicbsp: %s, unsupport chip rev: %d\n", __func__, aicbsp_info.chip_rev);
|
return -1;
|
}
|
|
printk("aicbsp: %s, chip rev: %d\n", __func__, aicbsp_info.chip_rev);
|
|
if (aicbsp_info.chip_rev != CHIP_REV_U02)
|
aicbsp_firmware_list = fw_u03;
|
|
if (aicbsp_system_config(sdiodev))
|
return -1;
|
|
if (aicbt_init(sdiodev))
|
return -1;
|
|
if (aicwifi_init(sdiodev))
|
return -1;
|
|
if (need_binding_verify) {
|
printk("aicbsp: crypto data %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X\n",
|
binding_enc_data[0], binding_enc_data[1], binding_enc_data[2], binding_enc_data[3],
|
binding_enc_data[4], binding_enc_data[5], binding_enc_data[6], binding_enc_data[7],
|
binding_enc_data[8], binding_enc_data[9], binding_enc_data[10], binding_enc_data[11],
|
binding_enc_data[12], binding_enc_data[13], binding_enc_data[14], binding_enc_data[15]);
|
|
/* calculate verify data from crypto data */
|
if (wcn_bind_verify_calculate_verify_data(binding_enc_data, dout)) {
|
pr_err("aicbsp: %s, binding encrypt data incorrect\n", __func__);
|
return -1;
|
}
|
|
printk("aicbsp: verify data %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X\n",
|
dout[0], dout[1], dout[2], dout[3],
|
dout[4], dout[5], dout[6], dout[7],
|
dout[8], dout[9], dout[10], dout[11],
|
dout[12], dout[13], dout[14], dout[15]);
|
|
if (rwnx_send_dbg_binding_req(sdiodev, dout, &binding_status)) {
|
pr_err("aicbsp: %s, send binding request failn", __func__);
|
return -1;
|
}
|
|
if (binding_status) {
|
pr_err("aicbsp: %s, binding verify fail\n", __func__);
|
return -1;
|
}
|
}
|
|
if (aicwf_sdio_writeb(sdiodev, SDIOWIFI_WAKEUP_REG, 4)) {
|
sdio_err("reg:%d write failed!\n", SDIOWIFI_WAKEUP_REG);
|
return -1;
|
}
|
|
return 0;
|
}
|
|
int aicbsp_get_feature(struct aicbsp_feature_t *feature)
|
{
|
feature->sdio_clock = FEATURE_SDIO_CLOCK;
|
feature->sdio_phase = FEATURE_SDIO_PHASE;
|
feature->hwinfo = aicbsp_info.hwinfo;
|
feature->fwlog_en = aicbsp_info.fwlog_en;
|
return 0;
|
}
|
EXPORT_SYMBOL_GPL(aicbsp_get_feature);
|
|
#ifdef AICBSP_RESV_MEM_SUPPORT
|
static struct skb_buff_pool resv_skb[] = {
|
{AIC_RESV_MEM_TXDATA, 1536*64, "resv_mem_txdata", 0, NULL},
|
};
|
|
int aicbsp_resv_mem_init(void)
|
{
|
int i = 0;
|
for (i = 0; i < sizeof(resv_skb) / sizeof(resv_skb[0]); i++) {
|
resv_skb[i].skb = dev_alloc_skb(resv_skb[i].size);
|
}
|
return 0;
|
}
|
|
int aicbsp_resv_mem_deinit(void)
|
{
|
int i = 0;
|
for (i = 0; i < sizeof(resv_skb) / sizeof(resv_skb[0]); i++) {
|
if (resv_skb[i].used == 0 && resv_skb[i].skb)
|
dev_kfree_skb(resv_skb[i].skb);
|
}
|
return 0;
|
}
|
|
struct sk_buff *aicbsp_resv_mem_alloc_skb(unsigned int length, uint32_t id)
|
{
|
if (resv_skb[id].size < length) {
|
pr_err("aicbsp: %s, no enough mem\n", __func__);
|
goto fail;
|
}
|
|
if (resv_skb[id].used) {
|
pr_err("aicbsp: %s, mem in use\n", __func__);
|
goto fail;
|
}
|
|
if (resv_skb[id].skb == NULL) {
|
pr_err("aicbsp: %s, mem not initialazed\n", __func__);
|
resv_skb[id].skb = dev_alloc_skb(resv_skb[id].size);
|
if (resv_skb[id].skb == NULL) {
|
pr_err("aicbsp: %s, mem reinitial still fail\n", __func__);
|
goto fail;
|
}
|
}
|
|
printk("aicbsp: %s, alloc %s succuss, id: %d, size: %d\n", __func__,
|
resv_skb[id].name, resv_skb[id].id, resv_skb[id].size);
|
|
resv_skb[id].used = 1;
|
return resv_skb[id].skb;
|
|
fail:
|
return NULL;
|
}
|
EXPORT_SYMBOL_GPL(aicbsp_resv_mem_alloc_skb);
|
|
void aicbsp_resv_mem_kfree_skb(struct sk_buff *skb, uint32_t id)
|
{
|
resv_skb[id].used = 0;
|
printk("aicbsp: %s, free %s succuss, id: %d, size: %d\n", __func__,
|
resv_skb[id].name, resv_skb[id].id, resv_skb[id].size);
|
}
|
EXPORT_SYMBOL_GPL(aicbsp_resv_mem_kfree_skb);
|
|
#else
|
|
int aicbsp_resv_mem_init(void)
|
{
|
return 0;
|
}
|
|
int aicbsp_resv_mem_deinit(void)
|
{
|
return 0;
|
}
|
|
#endif
|
