/******************************************************************************
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*
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* Copyright (C) 2019-2021 Aicsemi Corporation.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************/
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#ifndef AIC_HCI_H5_INT_H
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#define AIC_HCI_H5_INT_H
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#pragma once
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#include <stdbool.h>
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#include <stdint.h>
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#include "bt_hci_bdroid.h"
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#include "bt_vendor_lib.h"
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#include <errno.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include "aic_hcidefs.h"
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#include "aic_common.h"
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//HCI Command opcodes
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#define HCI_LE_READ_BUFFER_SIZE 0x2002
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#define DATA_TYPE_H5 0x05
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//HCI VENDOR Command opcode
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#define HCI_VSC_H5_INIT 0xFCEE
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#define HCI_VSC_UPDATE_BAUDRATE 0xFC18
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#define HCI_VSC_DOWNLOAD_FW_PATCH 0xFC20
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#define HCI_VSC_READ_ROM_VERSION 0xFC6D
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#define HCI_VSC_READ_CHIP_TYPE 0xFC61
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#define HCI_VSC_SET_WAKE_UP_DEVICE 0xFC7B
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#define HCI_VSC_BT_OFF 0xFC28
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#define HCI_READ_LMP_VERSION 0x1001
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#define HCI_VENDOR_RESET 0x0C03
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#define HCI_VENDOR_FORCE_RESET_AND_PATCHABLE 0xFC66
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#define HCI_VSC_SET_RF_MODE_CMD 0xFC48
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#define HCI_VSC_RF_CALIB_REQ_CMD 0xFC4B
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#define HCI_VSC_WRITE_BD_ADDR 0xFC70
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#define HCI_VSC_WR_RF_MDM_REGS_CMD 0xFC53
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#define HCI_VSC_UPDATE_CONFIG_INFO_CMD 0xFC72
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#define HCI_VSC_WR_RF_MDM_REGS_SIZE 252
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#define HCI_VSC_SET_RF_MODE_SIZE 01
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#define HCI_VSC_RF_CALIB_REQ_SIZE 132
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#define HCI_VSC_UPDATE_CONFIG_INFO_SIZE 36
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#define HCI_EVT_CMD_CMPL_STATUS_RET_BYTE 5
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#define HCI_EVT_CMD_CMPL_LOCAL_NAME_STRING 6
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#define HCI_EVT_CMD_CMPL_LOCAL_BDADDR_ARRAY 6
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#define HCI_EVT_CMD_CMPL_OPCODE 3
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#define LPM_CMD_PARAM_SIZE 12
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#define UPDATE_BAUDRATE_CMD_PARAM_SIZE 6
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#define HCD_REC_PAYLOAD_LEN_BYTE 2
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#define BD_ADDR_LEN 6
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#define LOCAL_NAME_BUFFER_LEN 32
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#define LOCAL_BDADDR_PATH_BUFFER_LEN 256
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void ms_delay (uint32_t timeout);
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typedef enum {
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DATA_TYPE_COMMAND = 1,
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DATA_TYPE_ACL = 2,
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DATA_TYPE_SCO = 3,
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DATA_TYPE_EVENT = 4
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} serial_data_type_t;
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typedef struct hci_h5_callbacks_t {
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uint16_t (*h5_int_transmit_data_cb)(serial_data_type_t type, uint8_t *data, uint16_t length);
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void (*h5_data_ready_cb)(serial_data_type_t type, unsigned int total_length);
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} hci_h5_callbacks_t;
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typedef struct hci_h5_t {
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void (*h5_int_init)(hci_h5_callbacks_t *h5_callbacks);
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void (*h5_int_cleanup)(void);
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uint16_t (*h5_send_cmd)(serial_data_type_t type, uint8_t *data, uint16_t length);
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uint8_t (*h5_send_sync_cmd)(uint16_t opcode, uint8_t *data, uint16_t length);
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uint16_t (*h5_send_acl_data)(serial_data_type_t type, uint8_t *data, uint16_t length);
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uint16_t (*h5_send_sco_data)(serial_data_type_t type, uint8_t *data, uint16_t length);
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bool (*h5_recv_msg)(uint8_t *byte, uint16_t length);
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size_t (*h5_int_read_data)(uint8_t *data_buffer, size_t max_size);
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} hci_h5_t;
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const hci_h5_t *hci_get_h5_int_interface(void);
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#endif
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