//===--------------------- InstructionInfoView.h ----------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements the instruction info view.
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///
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/// The goal fo the instruction info view is to print the latency and reciprocal
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/// throughput information for every instruction in the input sequence.
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/// This section also reports extra information related to the number of micro
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/// opcodes, and opcode properties (i.e. 'MayLoad', 'MayStore', 'HasSideEffects)
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///
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/// Example:
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///
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/// Instruction Info:
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/// [1]: #uOps
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/// [2]: Latency
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/// [3]: RThroughput
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/// [4]: MayLoad
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/// [5]: MayStore
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/// [6]: HasSideEffects
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///
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/// [1] [2] [3] [4] [5] [6] Instructions:
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/// 1 2 1.00 vmulps %xmm0, %xmm1, %xmm2
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/// 1 3 1.00 vhaddps %xmm2, %xmm2, %xmm3
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/// 1 3 1.00 vhaddps %xmm3, %xmm3, %xmm4
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TOOLS_LLVM_MCA_INSTRUCTIONINFOVIEW_H
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#define LLVM_TOOLS_LLVM_MCA_INSTRUCTIONINFOVIEW_H
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#include "SourceMgr.h"
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#include "View.h"
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#include "llvm/MC/MCInstPrinter.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/raw_ostream.h"
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#define DEBUG_TYPE "llvm-mca"
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namespace mca {
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/// A view that prints out generic instruction information.
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class InstructionInfoView : public View {
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const llvm::MCSubtargetInfo &STI;
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const llvm::MCInstrInfo &MCII;
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const SourceMgr &Source;
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llvm::MCInstPrinter &MCIP;
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public:
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InstructionInfoView(const llvm::MCSubtargetInfo &sti,
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const llvm::MCInstrInfo &mcii, const SourceMgr &S,
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llvm::MCInstPrinter &IP)
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: STI(sti), MCII(mcii), Source(S), MCIP(IP) {}
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void printView(llvm::raw_ostream &OS) const override;
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};
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} // namespace mca
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#endif
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