/*
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* Copyright © 2015 Broadcom
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "vc4_qir.h"
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#include "kernel/vc4_packet.h"
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#include "compiler/nir/nir_builder.h"
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/** @file vc4_nir_lower_txf_ms.c
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* Walks the NIR generated by TGSI-to-NIR to lower its nir_texop_txf_ms
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* coordinates to do the math necessary and use a plain nir_texop_txf instead.
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*
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* MSAA textures are laid out as 32x32-aligned blocks of RGBA8888 or Z24S8.
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* We can't load them through the normal sampler path because of the lack of
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* linear support in the hardware. So, we treat MSAA textures as a giant UBO
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* and do the math in the shader.
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*/
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static void
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vc4_nir_lower_txf_ms_instr(struct vc4_compile *c, nir_builder *b,
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nir_tex_instr *txf_ms)
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{
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if (txf_ms->op != nir_texop_txf_ms)
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return;
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b->cursor = nir_before_instr(&txf_ms->instr);
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nir_tex_instr *txf = nir_tex_instr_create(c->s, 1);
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txf->op = nir_texop_txf;
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txf->texture = txf_ms->texture;
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txf->texture_index = txf_ms->texture_index;
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txf->coord_components = txf_ms->coord_components;
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txf->is_shadow = txf_ms->is_shadow;
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txf->is_new_style_shadow = txf_ms->is_new_style_shadow;
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nir_ssa_def *coord = NULL, *sample_index = NULL;
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for (int i = 0; i < txf_ms->num_srcs; i++) {
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assert(txf_ms->src[i].src.is_ssa);
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switch (txf_ms->src[i].src_type) {
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case nir_tex_src_coord:
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coord = txf_ms->src[i].src.ssa;
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break;
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case nir_tex_src_ms_index:
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sample_index = txf_ms->src[i].src.ssa;
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break;
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default:
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unreachable("Unknown txf_ms src\n");
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}
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}
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assert(coord);
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assert(sample_index);
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nir_ssa_def *x = nir_channel(b, coord, 0);
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nir_ssa_def *y = nir_channel(b, coord, 1);
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uint32_t tile_w = 32;
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uint32_t tile_h = 32;
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uint32_t tile_w_shift = 5;
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uint32_t tile_h_shift = 5;
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uint32_t tile_size = (tile_h * tile_w *
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VC4_MAX_SAMPLES * sizeof(uint32_t));
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unsigned unit = txf_ms->texture_index;
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uint32_t w = align(c->key->tex[unit].msaa_width, tile_w);
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uint32_t w_tiles = w / tile_w;
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nir_ssa_def *x_tile = nir_ushr(b, x, nir_imm_int(b, tile_w_shift));
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nir_ssa_def *y_tile = nir_ushr(b, y, nir_imm_int(b, tile_h_shift));
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nir_ssa_def *tile_addr = nir_iadd(b,
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nir_imul(b, x_tile,
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nir_imm_int(b, tile_size)),
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nir_imul(b, y_tile,
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nir_imm_int(b, (w_tiles *
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tile_size))));
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nir_ssa_def *x_subspan = nir_iand(b, x,
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nir_imm_int(b, (tile_w - 1) & ~1));
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nir_ssa_def *y_subspan = nir_iand(b, y,
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nir_imm_int(b, (tile_h - 1) & ~1));
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nir_ssa_def *subspan_addr = nir_iadd(b,
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nir_imul(b, x_subspan,
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nir_imm_int(b, 2 * VC4_MAX_SAMPLES * sizeof(uint32_t))),
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nir_imul(b, y_subspan,
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nir_imm_int(b,
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tile_w *
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VC4_MAX_SAMPLES *
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sizeof(uint32_t))));
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nir_ssa_def *pixel_addr = nir_ior(b,
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nir_iand(b,
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nir_ishl(b, x,
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nir_imm_int(b, 2)),
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nir_imm_int(b, (1 << 2))),
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nir_iand(b,
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nir_ishl(b, y,
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nir_imm_int(b, 3)),
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nir_imm_int(b, (1 << 3))));
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nir_ssa_def *sample_addr = nir_ishl(b, sample_index, nir_imm_int(b, 4));
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nir_ssa_def *addr = nir_iadd(b,
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nir_ior(b, sample_addr, pixel_addr),
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nir_iadd(b, subspan_addr, tile_addr));
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txf->src[0].src_type = nir_tex_src_coord;
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txf->src[0].src = nir_src_for_ssa(nir_vec2(b, addr, nir_imm_int(b, 0)));
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nir_ssa_dest_init(&txf->instr, &txf->dest, 4, 32, NULL);
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nir_builder_instr_insert(b, &txf->instr);
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nir_ssa_def_rewrite_uses(&txf_ms->dest.ssa,
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nir_src_for_ssa(&txf->dest.ssa));
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nir_instr_remove(&txf_ms->instr);
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}
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static bool
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vc4_nir_lower_txf_ms_impl(struct vc4_compile *c, nir_function_impl *impl)
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{
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nir_builder b;
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nir_builder_init(&b, impl);
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nir_foreach_block(block, impl) {
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nir_foreach_instr_safe(instr, block) {
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if (instr->type == nir_instr_type_tex) {
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vc4_nir_lower_txf_ms_instr(c, &b,
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nir_instr_as_tex(instr));
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}
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}
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}
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nir_metadata_preserve(impl,
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nir_metadata_block_index |
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nir_metadata_dominance);
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return true;
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}
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void
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vc4_nir_lower_txf_ms(nir_shader *s, struct vc4_compile *c)
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{
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nir_foreach_function(function, s) {
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if (function->impl)
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vc4_nir_lower_txf_ms_impl(c, function->impl);
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}
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}
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