/*
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* Copyright © 2015 Broadcom
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "vc4_qir.h"
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#include "compiler/nir/nir_builder.h"
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#include "util/u_format.h"
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/**
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* Walks the NIR generated by TGSI-to-NIR or GLSL-to-NIR to lower its io
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* intrinsics into something amenable to the VC4 architecture.
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*
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* Currently, it splits VS inputs and uniforms into scalars, drops any
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* non-position outputs in coordinate shaders, and fixes up the addressing on
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* indirect uniform loads. FS input and VS output scalarization is handled by
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* nir_lower_io_to_scalar().
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*/
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static void
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replace_intrinsic_with_vec(nir_builder *b, nir_intrinsic_instr *intr,
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nir_ssa_def **comps)
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{
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/* Batch things back together into a vector. This will get split by
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* the later ALU scalarization pass.
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*/
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nir_ssa_def *vec = nir_vec(b, comps, intr->num_components);
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/* Replace the old intrinsic with a reference to our reconstructed
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* vector.
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*/
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, nir_src_for_ssa(vec));
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nir_instr_remove(&intr->instr);
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}
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static nir_ssa_def *
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vc4_nir_unpack_8i(nir_builder *b, nir_ssa_def *src, unsigned chan)
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{
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return nir_ubitfield_extract(b,
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src,
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nir_imm_int(b, 8 * chan),
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nir_imm_int(b, 8));
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}
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/** Returns the 16 bit field as a sign-extended 32-bit value. */
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static nir_ssa_def *
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vc4_nir_unpack_16i(nir_builder *b, nir_ssa_def *src, unsigned chan)
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{
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return nir_ibitfield_extract(b,
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src,
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nir_imm_int(b, 16 * chan),
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nir_imm_int(b, 16));
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}
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/** Returns the 16 bit field as an unsigned 32 bit value. */
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static nir_ssa_def *
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vc4_nir_unpack_16u(nir_builder *b, nir_ssa_def *src, unsigned chan)
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{
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if (chan == 0) {
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return nir_iand(b, src, nir_imm_int(b, 0xffff));
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} else {
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return nir_ushr(b, src, nir_imm_int(b, 16));
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}
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}
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static nir_ssa_def *
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vc4_nir_unpack_8f(nir_builder *b, nir_ssa_def *src, unsigned chan)
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{
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return nir_channel(b, nir_unpack_unorm_4x8(b, src), chan);
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}
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static nir_ssa_def *
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vc4_nir_get_vattr_channel_vpm(struct vc4_compile *c,
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nir_builder *b,
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nir_ssa_def **vpm_reads,
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uint8_t swiz,
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const struct util_format_description *desc)
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{
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const struct util_format_channel_description *chan =
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&desc->channel[swiz];
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nir_ssa_def *temp;
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if (swiz > PIPE_SWIZZLE_W) {
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return vc4_nir_get_swizzled_channel(b, vpm_reads, swiz);
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} else if (chan->size == 32 && chan->type == UTIL_FORMAT_TYPE_FLOAT) {
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return vc4_nir_get_swizzled_channel(b, vpm_reads, swiz);
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} else if (chan->size == 32 && chan->type == UTIL_FORMAT_TYPE_SIGNED) {
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if (chan->normalized) {
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return nir_fmul(b,
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nir_i2f32(b, vpm_reads[swiz]),
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nir_imm_float(b,
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1.0 / 0x7fffffff));
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} else {
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return nir_i2f32(b, vpm_reads[swiz]);
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}
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} else if (chan->size == 8 &&
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(chan->type == UTIL_FORMAT_TYPE_UNSIGNED ||
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chan->type == UTIL_FORMAT_TYPE_SIGNED)) {
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nir_ssa_def *vpm = vpm_reads[0];
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if (chan->type == UTIL_FORMAT_TYPE_SIGNED) {
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temp = nir_ixor(b, vpm, nir_imm_int(b, 0x80808080));
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if (chan->normalized) {
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return nir_fsub(b, nir_fmul(b,
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vc4_nir_unpack_8f(b, temp, swiz),
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nir_imm_float(b, 2.0)),
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nir_imm_float(b, 1.0));
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} else {
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return nir_fadd(b,
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nir_i2f32(b,
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vc4_nir_unpack_8i(b, temp,
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swiz)),
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nir_imm_float(b, -128.0));
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}
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} else {
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if (chan->normalized) {
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return vc4_nir_unpack_8f(b, vpm, swiz);
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} else {
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return nir_i2f32(b, vc4_nir_unpack_8i(b, vpm, swiz));
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}
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}
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} else if (chan->size == 16 &&
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(chan->type == UTIL_FORMAT_TYPE_UNSIGNED ||
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chan->type == UTIL_FORMAT_TYPE_SIGNED)) {
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nir_ssa_def *vpm = vpm_reads[swiz / 2];
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/* Note that UNPACK_16F eats a half float, not ints, so we use
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* UNPACK_16_I for all of these.
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*/
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if (chan->type == UTIL_FORMAT_TYPE_SIGNED) {
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temp = nir_i2f32(b, vc4_nir_unpack_16i(b, vpm, swiz & 1));
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if (chan->normalized) {
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return nir_fmul(b, temp,
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nir_imm_float(b, 1/32768.0f));
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} else {
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return temp;
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}
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} else {
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temp = nir_i2f32(b, vc4_nir_unpack_16u(b, vpm, swiz & 1));
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if (chan->normalized) {
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return nir_fmul(b, temp,
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nir_imm_float(b, 1 / 65535.0));
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} else {
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return temp;
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}
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}
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} else {
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return NULL;
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}
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}
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static void
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vc4_nir_lower_vertex_attr(struct vc4_compile *c, nir_builder *b,
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nir_intrinsic_instr *intr)
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{
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b->cursor = nir_before_instr(&intr->instr);
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int attr = nir_intrinsic_base(intr);
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enum pipe_format format = c->vs_key->attr_formats[attr];
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uint32_t attr_size = util_format_get_blocksize(format);
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/* We only accept direct outputs and TGSI only ever gives them to us
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* with an offset value of 0.
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*/
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assert(nir_src_as_const_value(intr->src[0]) &&
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nir_src_as_const_value(intr->src[0])->u32[0] == 0);
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/* Generate dword loads for the VPM values (Since these intrinsics may
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* be reordered, the actual reads will be generated at the top of the
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* shader by ntq_setup_inputs().
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*/
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nir_ssa_def *vpm_reads[4];
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for (int i = 0; i < align(attr_size, 4) / 4; i++) {
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nir_intrinsic_instr *intr_comp =
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nir_intrinsic_instr_create(c->s,
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nir_intrinsic_load_input);
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intr_comp->num_components = 1;
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nir_intrinsic_set_base(intr_comp, nir_intrinsic_base(intr));
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nir_intrinsic_set_component(intr_comp, i);
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intr_comp->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
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nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, 32, NULL);
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nir_builder_instr_insert(b, &intr_comp->instr);
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vpm_reads[i] = &intr_comp->dest.ssa;
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}
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bool format_warned = false;
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const struct util_format_description *desc =
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util_format_description(format);
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nir_ssa_def *dests[4];
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for (int i = 0; i < intr->num_components; i++) {
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uint8_t swiz = desc->swizzle[i];
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dests[i] = vc4_nir_get_vattr_channel_vpm(c, b, vpm_reads, swiz,
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desc);
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if (!dests[i]) {
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if (!format_warned) {
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fprintf(stderr,
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"vtx element %d unsupported type: %s\n",
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attr, util_format_name(format));
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format_warned = true;
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}
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dests[i] = nir_imm_float(b, 0.0);
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}
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}
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replace_intrinsic_with_vec(b, intr, dests);
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}
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static bool
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is_point_sprite(struct vc4_compile *c, nir_variable *var)
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{
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if (var->data.location < VARYING_SLOT_VAR0 ||
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var->data.location > VARYING_SLOT_VAR31)
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return false;
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return (c->fs_key->point_sprite_mask &
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(1 << (var->data.location - VARYING_SLOT_VAR0)));
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}
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static void
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vc4_nir_lower_fs_input(struct vc4_compile *c, nir_builder *b,
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nir_intrinsic_instr *intr)
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{
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b->cursor = nir_after_instr(&intr->instr);
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if (nir_intrinsic_base(intr) >= VC4_NIR_TLB_COLOR_READ_INPUT &&
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nir_intrinsic_base(intr) < (VC4_NIR_TLB_COLOR_READ_INPUT +
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VC4_MAX_SAMPLES)) {
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/* This doesn't need any lowering. */
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return;
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}
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nir_variable *input_var = NULL;
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nir_foreach_variable(var, &c->s->inputs) {
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if (var->data.driver_location == nir_intrinsic_base(intr)) {
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input_var = var;
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break;
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}
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}
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assert(input_var);
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int comp = nir_intrinsic_component(intr);
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/* Lower away point coordinates, and fix up PNTC. */
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if (is_point_sprite(c, input_var) ||
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input_var->data.location == VARYING_SLOT_PNTC) {
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assert(intr->num_components == 1);
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nir_ssa_def *result = &intr->dest.ssa;
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switch (comp) {
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case 0:
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case 1:
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/* If we're not rendering points, we need to set a
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* defined value for the input that would come from
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* PNTC.
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*/
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if (!c->fs_key->is_points)
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result = nir_imm_float(b, 0.0);
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break;
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case 2:
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result = nir_imm_float(b, 0.0);
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break;
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case 3:
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result = nir_imm_float(b, 1.0);
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break;
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}
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if (c->fs_key->point_coord_upper_left && comp == 1)
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result = nir_fsub(b, nir_imm_float(b, 1.0), result);
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if (result != &intr->dest.ssa) {
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nir_ssa_def_rewrite_uses_after(&intr->dest.ssa,
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nir_src_for_ssa(result),
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result->parent_instr);
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}
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}
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}
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static void
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vc4_nir_lower_output(struct vc4_compile *c, nir_builder *b,
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nir_intrinsic_instr *intr)
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{
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nir_variable *output_var = NULL;
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nir_foreach_variable(var, &c->s->outputs) {
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if (var->data.driver_location == nir_intrinsic_base(intr)) {
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output_var = var;
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break;
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}
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}
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assert(output_var);
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if (c->stage == QSTAGE_COORD &&
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output_var->data.location != VARYING_SLOT_POS &&
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output_var->data.location != VARYING_SLOT_PSIZ) {
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nir_instr_remove(&intr->instr);
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return;
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}
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}
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static void
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vc4_nir_lower_uniform(struct vc4_compile *c, nir_builder *b,
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nir_intrinsic_instr *intr)
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{
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b->cursor = nir_before_instr(&intr->instr);
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/* Generate scalar loads equivalent to the original vector. */
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nir_ssa_def *dests[4];
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for (unsigned i = 0; i < intr->num_components; i++) {
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nir_intrinsic_instr *intr_comp =
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nir_intrinsic_instr_create(c->s, intr->intrinsic);
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intr_comp->num_components = 1;
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nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, 32, NULL);
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/* Convert the uniform offset to bytes. If it happens
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* to be a constant, constant-folding will clean up
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* the shift for us.
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*/
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nir_intrinsic_set_base(intr_comp,
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nir_intrinsic_base(intr) * 16 +
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i * 4);
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intr_comp->src[0] =
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nir_src_for_ssa(nir_ishl(b, intr->src[0].ssa,
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nir_imm_int(b, 4)));
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dests[i] = &intr_comp->dest.ssa;
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nir_builder_instr_insert(b, &intr_comp->instr);
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}
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replace_intrinsic_with_vec(b, intr, dests);
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}
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static void
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vc4_nir_lower_io_instr(struct vc4_compile *c, nir_builder *b,
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struct nir_instr *instr)
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{
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if (instr->type != nir_instr_type_intrinsic)
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return;
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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switch (intr->intrinsic) {
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case nir_intrinsic_load_input:
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if (c->stage == QSTAGE_FRAG)
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vc4_nir_lower_fs_input(c, b, intr);
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else
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vc4_nir_lower_vertex_attr(c, b, intr);
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break;
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case nir_intrinsic_store_output:
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vc4_nir_lower_output(c, b, intr);
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break;
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case nir_intrinsic_load_uniform:
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vc4_nir_lower_uniform(c, b, intr);
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break;
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case nir_intrinsic_load_user_clip_plane:
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default:
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break;
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}
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}
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static bool
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vc4_nir_lower_io_impl(struct vc4_compile *c, nir_function_impl *impl)
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{
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nir_builder b;
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nir_builder_init(&b, impl);
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nir_foreach_block(block, impl) {
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nir_foreach_instr_safe(instr, block)
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vc4_nir_lower_io_instr(c, &b, instr);
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}
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nir_metadata_preserve(impl, nir_metadata_block_index |
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nir_metadata_dominance);
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return true;
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}
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void
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vc4_nir_lower_io(nir_shader *s, struct vc4_compile *c)
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{
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nir_foreach_function(function, s) {
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if (function->impl)
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vc4_nir_lower_io_impl(c, function->impl);
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}
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}
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