/*
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* Copyright © 2015 Broadcom
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "util/u_format.h"
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#include "util/u_surface.h"
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#include "util/u_blitter.h"
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#include "vc4_context.h"
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static struct pipe_surface *
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vc4_get_blit_surface(struct pipe_context *pctx,
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struct pipe_resource *prsc, unsigned level)
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{
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struct pipe_surface tmpl;
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memset(&tmpl, 0, sizeof(tmpl));
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tmpl.format = prsc->format;
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tmpl.u.tex.level = level;
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tmpl.u.tex.first_layer = 0;
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tmpl.u.tex.last_layer = 0;
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return pctx->create_surface(pctx, prsc, &tmpl);
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}
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static bool
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is_tile_unaligned(unsigned size, unsigned tile_size)
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{
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return size & (tile_size - 1);
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}
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static bool
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vc4_tile_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
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{
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struct vc4_context *vc4 = vc4_context(pctx);
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bool msaa = (info->src.resource->nr_samples > 1 ||
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info->dst.resource->nr_samples > 1);
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int tile_width = msaa ? 32 : 64;
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int tile_height = msaa ? 32 : 64;
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if (util_format_is_depth_or_stencil(info->dst.resource->format))
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return false;
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if (info->scissor_enable)
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return false;
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if ((info->mask & PIPE_MASK_RGBA) == 0)
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return false;
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if (info->dst.box.x != info->src.box.x ||
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info->dst.box.y != info->src.box.y ||
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info->dst.box.width != info->src.box.width ||
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info->dst.box.height != info->src.box.height) {
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return false;
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}
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int dst_surface_width = u_minify(info->dst.resource->width0,
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info->dst.level);
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int dst_surface_height = u_minify(info->dst.resource->height0,
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info->dst.level);
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if (is_tile_unaligned(info->dst.box.x, tile_width) ||
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is_tile_unaligned(info->dst.box.y, tile_height) ||
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(is_tile_unaligned(info->dst.box.width, tile_width) &&
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info->dst.box.x + info->dst.box.width != dst_surface_width) ||
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(is_tile_unaligned(info->dst.box.height, tile_height) &&
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info->dst.box.y + info->dst.box.height != dst_surface_height)) {
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return false;
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}
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/* VC4_PACKET_LOAD_TILE_BUFFER_GENERAL uses the
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* VC4_PACKET_TILE_RENDERING_MODE_CONFIG's width (determined by our
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* destination surface) to determine the stride. This may be wrong
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* when reading from texture miplevels > 0, which are stored in
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* POT-sized areas. For MSAA, the tile addresses are computed
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* explicitly by the RCL, but still use the destination width to
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* determine the stride (which could be fixed by explicitly supplying
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* it in the ABI).
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*/
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struct vc4_resource *rsc = vc4_resource(info->src.resource);
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uint32_t stride;
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if (info->src.resource->nr_samples > 1)
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stride = align(dst_surface_width, 32) * 4 * rsc->cpp;
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else if (rsc->slices[info->src.level].tiling == VC4_TILING_FORMAT_T)
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stride = align(dst_surface_width * rsc->cpp, 128);
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else
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stride = align(dst_surface_width * rsc->cpp, 16);
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if (stride != rsc->slices[info->src.level].stride)
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return false;
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if (info->dst.resource->format != info->src.resource->format)
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return false;
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if (false) {
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fprintf(stderr, "RCL blit from %d,%d to %d,%d (%d,%d)\n",
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info->src.box.x,
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info->src.box.y,
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info->dst.box.x,
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info->dst.box.y,
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info->dst.box.width,
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info->dst.box.height);
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}
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struct pipe_surface *dst_surf =
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vc4_get_blit_surface(pctx, info->dst.resource, info->dst.level);
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struct pipe_surface *src_surf =
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vc4_get_blit_surface(pctx, info->src.resource, info->src.level);
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vc4_flush_jobs_reading_resource(vc4, info->src.resource);
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struct vc4_job *job = vc4_get_job(vc4, dst_surf, NULL);
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pipe_surface_reference(&job->color_read, src_surf);
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/* If we're resolving from MSAA to single sample, we still need to run
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* the engine in MSAA mode for the load.
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*/
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if (!job->msaa && info->src.resource->nr_samples > 1) {
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job->msaa = true;
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job->tile_width = 32;
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job->tile_height = 32;
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}
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job->draw_min_x = info->dst.box.x;
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job->draw_min_y = info->dst.box.y;
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job->draw_max_x = info->dst.box.x + info->dst.box.width;
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job->draw_max_y = info->dst.box.y + info->dst.box.height;
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job->draw_width = dst_surf->width;
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job->draw_height = dst_surf->height;
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job->tile_width = tile_width;
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job->tile_height = tile_height;
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job->msaa = msaa;
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job->needs_flush = true;
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job->resolve |= PIPE_CLEAR_COLOR;
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vc4_job_submit(vc4, job);
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pipe_surface_reference(&dst_surf, NULL);
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pipe_surface_reference(&src_surf, NULL);
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return true;
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}
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void
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vc4_blitter_save(struct vc4_context *vc4)
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{
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util_blitter_save_vertex_buffer_slot(vc4->blitter, vc4->vertexbuf.vb);
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util_blitter_save_vertex_elements(vc4->blitter, vc4->vtx);
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util_blitter_save_vertex_shader(vc4->blitter, vc4->prog.bind_vs);
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util_blitter_save_rasterizer(vc4->blitter, vc4->rasterizer);
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util_blitter_save_viewport(vc4->blitter, &vc4->viewport);
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util_blitter_save_scissor(vc4->blitter, &vc4->scissor);
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util_blitter_save_fragment_shader(vc4->blitter, vc4->prog.bind_fs);
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util_blitter_save_blend(vc4->blitter, vc4->blend);
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util_blitter_save_depth_stencil_alpha(vc4->blitter, vc4->zsa);
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util_blitter_save_stencil_ref(vc4->blitter, &vc4->stencil_ref);
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util_blitter_save_sample_mask(vc4->blitter, vc4->sample_mask);
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util_blitter_save_framebuffer(vc4->blitter, &vc4->framebuffer);
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util_blitter_save_fragment_sampler_states(vc4->blitter,
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vc4->fragtex.num_samplers,
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(void **)vc4->fragtex.samplers);
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util_blitter_save_fragment_sampler_views(vc4->blitter,
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vc4->fragtex.num_textures, vc4->fragtex.textures);
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}
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static bool
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vc4_render_blit(struct pipe_context *ctx, struct pipe_blit_info *info)
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{
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struct vc4_context *vc4 = vc4_context(ctx);
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if (!util_blitter_is_blit_supported(vc4->blitter, info)) {
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fprintf(stderr, "blit unsupported %s -> %s\n",
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util_format_short_name(info->src.resource->format),
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util_format_short_name(info->dst.resource->format));
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return false;
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}
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/* Enable the scissor, so we get a minimal set of tiles rendered. */
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if (!info->scissor_enable) {
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info->scissor_enable = true;
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info->scissor.minx = info->dst.box.x;
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info->scissor.miny = info->dst.box.y;
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info->scissor.maxx = info->dst.box.x + info->dst.box.width;
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info->scissor.maxy = info->dst.box.y + info->dst.box.height;
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}
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vc4_blitter_save(vc4);
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util_blitter_blit(vc4->blitter, info);
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return true;
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}
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/* Optimal hardware path for blitting pixels.
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* Scaling, format conversion, up- and downsampling (resolve) are allowed.
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*/
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void
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vc4_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info)
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{
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struct pipe_blit_info info = *blit_info;
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if (vc4_tile_blit(pctx, blit_info))
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return;
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if (info.mask & PIPE_MASK_S) {
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if (util_try_blit_via_copy_region(pctx, &info))
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return;
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info.mask &= ~PIPE_MASK_S;
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fprintf(stderr, "cannot blit stencil, skipping\n");
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}
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if (vc4_render_blit(pctx, &info))
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return;
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fprintf(stderr, "Unsupported blit\n");
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}
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