/****************************************************************************
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* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* @file fifo.hpp
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*
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* @brief Definitions for our fifos used for thread communication.
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*
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******************************************************************************/
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#pragma once
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#include "common/os.h"
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#include "arena.h"
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#include <vector>
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#include <cassert>
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template<class T>
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struct QUEUE
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{
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OSALIGNLINE(volatile uint32_t) mLock{ 0 };
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OSALIGNLINE(volatile uint32_t) mNumEntries{ 0 };
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std::vector<T*> mBlocks;
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T* mCurBlock{ nullptr };
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uint32_t mHead{ 0 };
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uint32_t mTail{ 0 };
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uint32_t mCurBlockIdx{ 0 };
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// power of 2
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static const uint32_t mBlockSizeShift = 6;
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static const uint32_t mBlockSize = 1 << mBlockSizeShift;
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template <typename ArenaT>
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void clear(ArenaT& arena)
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{
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mHead = 0;
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mTail = 0;
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mBlocks.clear();
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T* pNewBlock = (T*)arena.AllocAligned(sizeof(T)*mBlockSize, KNOB_SIMD_WIDTH*4);
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mBlocks.push_back(pNewBlock);
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mCurBlock = pNewBlock;
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mCurBlockIdx = 0;
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mNumEntries = 0;
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mLock = 0;
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}
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uint32_t getNumQueued()
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{
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return mNumEntries;
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}
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bool tryLock()
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{
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if (mLock)
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{
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return false;
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}
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// try to lock the FIFO
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long initial = InterlockedCompareExchange(&mLock, 1, 0);
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return (initial == 0);
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}
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void unlock()
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{
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mLock = 0;
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}
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T* peek()
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{
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if (mNumEntries == 0)
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{
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return nullptr;
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}
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uint32_t block = mHead >> mBlockSizeShift;
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return &mBlocks[block][mHead & (mBlockSize-1)];
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}
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void dequeue_noinc()
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{
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mHead ++;
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mNumEntries --;
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}
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template <typename ArenaT>
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bool enqueue_try_nosync(ArenaT& arena, const T* entry)
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{
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const float* pSrc = (const float*)entry;
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float* pDst = (float*)&mCurBlock[mTail];
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auto lambda = [&](int32_t i)
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{
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__m256 vSrc = _mm256_load_ps(pSrc + i*KNOB_SIMD_WIDTH);
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_mm256_stream_ps(pDst + i*KNOB_SIMD_WIDTH, vSrc);
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};
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const uint32_t numSimdLines = sizeof(T) / (KNOB_SIMD_WIDTH*4);
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static_assert(numSimdLines * KNOB_SIMD_WIDTH * 4 == sizeof(T),
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"FIFO element size should be multiple of SIMD width.");
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UnrollerL<0, numSimdLines, 1>::step(lambda);
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mTail ++;
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if (mTail == mBlockSize)
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{
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if (++mCurBlockIdx < mBlocks.size())
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{
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mCurBlock = mBlocks[mCurBlockIdx];
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}
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else
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{
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T* newBlock = (T*)arena.AllocAligned(sizeof(T)*mBlockSize, KNOB_SIMD_WIDTH*4);
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SWR_ASSERT(newBlock);
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mBlocks.push_back(newBlock);
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mCurBlock = newBlock;
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}
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mTail = 0;
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}
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mNumEntries ++;
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return true;
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}
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void destroy()
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{
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}
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};
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