/*
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* Allwinner SoCs display driver.
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*
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* Copyright (C) 2016 Allwinner.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/**
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* All Winner Tech, All Right Reserved. 2014-2015 Copyright (c)
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*
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* File name : de_wb_type.h
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*
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* Description : display engine 2.0 wbc struct declaration
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*
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* History : 2014/03/03 wangxuan initial version
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*
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*/
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#ifndef __DE_WB_TYPE_H__
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#define __DE_WB_TPYE_H__
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#define ____SEPARATOR_DEFEINE____
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#define WB_END_IE 0x1
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#define WB_FINISH_IE (0x1<<4)
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#define WB_FIFO_OVERFLOW_ERROR_IE (0x1<<5)
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#define WB_TIMEOUT_ERROR_IE (0x1<<6)
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#define MININWIDTH 8
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#define MININHEIGHT 4
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/* support 8192,limit by LCD */
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#define MAXINWIDTH 4096
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/* support 8192,limit by LCD */
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#define MAXINHEIGHT 4096
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#define LINE_BUF_LEN 2048
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#define LOCFRACBIT 18
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#define SCALERPHASE 16
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#define ____SEPARATOR_REGISTERS____
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union __wb_gctrl_reg_t {
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unsigned int dwval;
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struct {
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unsigned int wb_start:1;
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unsigned int r0:3;
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unsigned int soft_reset:1;
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unsigned int self_timing:1; /* bit5 */
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unsigned int r1:10;
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unsigned int in_port_sel:2;
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unsigned int r2:10;
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unsigned int auto_gate_en:1;
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unsigned int clk_gate:1;
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unsigned int r3:1;
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unsigned int bist_en:1;
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} bits;
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};
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union __wb_size_reg_t {
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unsigned int dwval;
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struct {
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unsigned int width:13;
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unsigned int r0:3;
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unsigned int height:13;
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unsigned int r1:3;
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} bits;
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};
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union __wb_crop_coord_reg_t {
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unsigned int dwval;
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struct {
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unsigned int crop_left:13;
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unsigned int r0:3;
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unsigned int crop_top:13;
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unsigned int r1:3;
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} bits;
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};
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union __wb_crop_size_reg_t {
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unsigned int dwval;
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struct {
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unsigned int crop_width:13;
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unsigned int r0:3;
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unsigned int crop_height:13;
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unsigned int r1:3;
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} bits;
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};
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union __wb_addr_reg_t {
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unsigned int dwval;
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struct {
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unsigned int addr:32;
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} bits;
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};
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union __wb_high_addr_reg_t {
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unsigned int dwval;
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struct {
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unsigned int ch0_h_addr:8;
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unsigned int ch1_h_addr:8;
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unsigned int ch2_h_addr:8;
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unsigned int r0:8;
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} bits;
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};
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union __wb_pitch_reg_t {
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unsigned int dwval;
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struct {
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unsigned int pitch:32;
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} bits;
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};
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union __wb_addr_switch_reg_t {
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unsigned int dwval;
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struct {
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unsigned int cur_group:1;
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unsigned int r0:15;
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unsigned int auto_switch:1;
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unsigned int r1:3;
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unsigned int manual_group:1;
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unsigned int r2:11;
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} bits;
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};
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union __wb_format_reg_t {
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unsigned int dwval;
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struct {
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unsigned int format:4;
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unsigned int r0:28;
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} bits;
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};
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union __wb_int_reg_t {
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unsigned int dwval;
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struct {
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unsigned int int_en:1;
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unsigned int r0:31;
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} bits;
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};
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union __wb_status_reg_t {
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unsigned int dwval;
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struct {
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unsigned int irq:1;
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unsigned int r0:3;
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unsigned int finish:1;
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unsigned int overflow:1;
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unsigned int timeout:1;
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unsigned int r1:1;
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unsigned int busy:1;
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unsigned int r2:23;
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} bits;
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};
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union __wb_bypass_reg_t {
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unsigned int dwval;
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struct {
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unsigned int csc_en:1;
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unsigned int cs_en:1;
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unsigned int fs_en:1;
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unsigned int r0:29;
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} bits;
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};
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union __wb_cs_reg_t {
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unsigned int dwval;
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struct {
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unsigned int m:13;
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unsigned int r1:3;
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unsigned int n:13;
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unsigned int r0:3;
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} bits;
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};
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union __wb_fs_size_reg_t {
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unsigned int dwval;
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struct {
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unsigned int width:13;
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unsigned int r1:3;
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unsigned int height:13;
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unsigned int r0:3;
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} bits;
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};
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union __wb_fs_step_reg_t {
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unsigned int dwval;
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struct {
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unsigned int r1:2;
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unsigned int frac:18;
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unsigned int intg:2;
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unsigned int r0:10;
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} bits;
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};
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union __wb_coeff_reg_t {
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unsigned int dwval;
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struct {
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unsigned int coef0:8;
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unsigned int coef1:8;
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unsigned int coef2:8;
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unsigned int coef3:8;
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} bits;
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};
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union __wb_csc_coeff_reg_t {
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unsigned int dwval;
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struct {
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unsigned int coff :13;/* Default: 0x0; */
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unsigned int res0 :19;/* Default: ; */
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} bits;
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};
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union __wb_csc_const_reg_t {
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unsigned int dwval;
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struct {
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unsigned int cont :20;/* Default: 0x0; */
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unsigned int res0 :12;/* Default: ; */
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} bits;
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};
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union __wb_sftm_reg_t {
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unsigned int dwval;
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struct {
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unsigned int sf_vs : 10; /* Default: 0x0; */
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unsigned int res0 : 22; /* Default: ; */
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} bits;
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};
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struct __wb_reg_t {
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union __wb_gctrl_reg_t gctrl; /* 0x0000 */
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union __wb_size_reg_t size; /* 0x0004 */
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union __wb_crop_coord_reg_t crop_coord; /* 0x0008 */
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union __wb_crop_size_reg_t crop_size; /* 0x000c */
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union __wb_addr_reg_t wb_addr_a0; /* 0x0010 */
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union __wb_addr_reg_t wb_addr_a1; /* 0x0014 */
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union __wb_addr_reg_t wb_addr_a2; /* 0x0018 */
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union __wb_high_addr_reg_t wb_addr_ah; /* 0x001c */
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union __wb_addr_reg_t wb_addr_b0; /* 0x0020 */
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union __wb_addr_reg_t wb_addr_b1; /* 0x0024 */
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union __wb_addr_reg_t wb_addr_b2; /* 0x0028 */
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union __wb_high_addr_reg_t wb_addr_bh; /* 0x002c */
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union __wb_pitch_reg_t wb_pitch0; /* 0x0030 */
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union __wb_pitch_reg_t wb_pitch1; /* 0x0034 */
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unsigned int res0[2]; /* 0x0038-0x003c */
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union __wb_addr_switch_reg_t addr_switch; /* 0x0040 */
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union __wb_format_reg_t fmt; /* 0x0044 */
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union __wb_int_reg_t intr; /* 0x0048 */
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union __wb_status_reg_t status; /* 0x004c */
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unsigned int res1; /* 0x0050 */
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union __wb_bypass_reg_t bypass; /* 0x0054 */
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unsigned int res2[6]; /* 0x0058-0x006c */
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union __wb_cs_reg_t cs_horz; /* 0x0070 */
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union __wb_cs_reg_t cs_vert; /* 0x0074 */
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unsigned int res3[2]; /* 0x0078-0x007c */
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union __wb_fs_size_reg_t fs_insize; /* 0x0080 */
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union __wb_fs_size_reg_t fs_outsize; /* 0x0084 */
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union __wb_fs_step_reg_t fs_hstep; /* 0x0088 */
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union __wb_fs_step_reg_t fs_vstep; /* 0x008c */
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unsigned int res4[28]; /* 0x0090-0x00fc */
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union __wb_csc_coeff_reg_t c00;/* 0x0100 */
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union __wb_csc_coeff_reg_t c01;/* 0x0104 */
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union __wb_csc_coeff_reg_t c02;/* 0x0108 */
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union __wb_csc_const_reg_t c03;/* 0x010C */
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union __wb_csc_coeff_reg_t c10;/* 0x0110 */
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union __wb_csc_coeff_reg_t c11;/* 0x0114 */
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union __wb_csc_coeff_reg_t c12;/* 0x0118 */
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union __wb_csc_const_reg_t c13;/* 0x011C */
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union __wb_csc_coeff_reg_t c20;/* 0x0120 */
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union __wb_csc_coeff_reg_t c21;/* 0x0124 */
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union __wb_csc_coeff_reg_t c22;/* 0x0128 */
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union __wb_csc_const_reg_t c23;/* 0x012C */
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unsigned int res41[52]; /* 0x0130-0x01fc */
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union __wb_coeff_reg_t yhcoeff[16]; /* 0X0200-0x23c */
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unsigned int res5[16]; /* 0X0240-0x27c */
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union __wb_coeff_reg_t chcoeff[16]; /* 0X0280-0x2bc */
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unsigned int res6[16]; /* 0x02c0-0x02fc */
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};
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enum wb_output_fmt {
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WB_FORMAT_RGB_888 = 0x0,
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WB_FORMAT_BGR_888 = 0x1,
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WB_FORMAT_ARGB_8888 = 0x4,
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WB_FORMAT_ABGR_8888 = 0x5,
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WB_FORMAT_BGRA_8888 = 0x6,
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WB_FORMAT_RGBA_8888 = 0x7,
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WB_FORMAT_YUV420_P = 0x8,
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WB_FORMAT_Y = 0x9,
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WB_FORMAT_YUV420_SP_VUVU = 0xc,
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WB_FORMAT_YUV420_SP_UVUV = 0xd,
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};
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#if defined(CONFIG_EINK_PANEL_USED)
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typedef struct {
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int width;
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int height;
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int addr[3];
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int csc_std;
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} __einkwb_config_t;
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#define EWB_OK 0
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#define EWB_OVFL 1
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#define EWB_TIMEOUT 2
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#define EWB_BUSY 3
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#define EWB_ERR 4
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extern unsigned int wb_lan2coefftab16[16];
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extern unsigned int wb_lan2coefftab16_down[16];
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extern int wb_eink_set_reg_base(unsigned int sel, unsigned int base);
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extern int wb_eink_init(unsigned int sel, unsigned int base_addr);
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extern int wb_eink_close(unsigned int sel);
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extern int wb_eink_reset(unsigned int sel);
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extern int wb_eink_dereset(unsigned int sel);
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extern int wb_eink_set_para(unsigned int sel, __einkwb_config_t *cfg);
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extern int wb_eink_writeback_enable(unsigned int sel);
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extern int wb_eink_get_status(unsigned int sel);
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extern int wb_eink_enableint(unsigned int sel);
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extern int wb_eink_disableint(unsigned int sel);
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extern int wb_eink_clearint(unsigned int sel);
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#endif
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#endif
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