/*
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* Allwinner SoCs display driver.
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*
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* Copyright (C) 2016 Allwinner.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef _DE_FEAT_H_
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#define _DE_FEAT_H_
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#define DE_OUTPUT_TYPE_LCD 1
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#define DE_OUTPUT_TYPE_TV 2
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#define DE_OUTPUT_TYPE_HDMI 4
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#define DE_OUTPUT_TYPE_VGA 8
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#define DE_OUTPUT_TYPE_VDPO 16
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#define WB_HAS_CSC
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#define CVBS_PAL_WIDTH 720
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#define CVBS_PAL_HEIGHT 576
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#define CVBS_NTSC_WIDTH 720
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#define CVBS_NTSC_HEIGHT 480
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#define P2P_FB_MIN_WIDTH 704
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#define P2P_FB_MAX_WIDTH 736
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#if defined(CONFIG_ARCH_SUN50IW2)
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/* features for sun50iw2 */
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#define DEVICE_NUM 2
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#define DE_NUM 2
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#define CHN_NUM 4
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#define VI_CHN_NUM 1
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#define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
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#define LAYER_NUM_PER_CHN_PER_VI_CHN 4
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#define LAYER_NUM_PER_CHN_PER_UI_CHN 4
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#define LAYER_MAX_NUM_PER_CHN 4
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/* #define SUPPORT_DSI */
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/* #define SUPPORT_SMBL */
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#define SUPPORT_HDMI
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/* #define DSI_VERSION_40 */
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/* #define HAVE_DEVICE_COMMON_MODULE */
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#define SUPPORT_TV
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#define TV_UGLY_CLK_RATE 216000000
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/* #define SUPPORT_VGA */
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/* #define SUPPORT_LVDS */
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/* #define LVDS_REVERT */
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#if defined(CONFIG_FPGA_V4_PLATFORM) \
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|| defined(CONFIG_FPGA_V7_PLATFORM)
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/*
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* TCON1_DRIVE_PANEL - General for fpga verify
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* On some platform there is no tcon0
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* At fpga period, we can use tcon1 to drive lcd pnael
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* we need to config & enable tcon1.
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* So enable this config.
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*/
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#define TCON1_DRIVE_PANEL
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#endif
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#elif defined(CONFIG_ARCH_SUN8IW11)
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/* features for sun8iw11 */
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#define DEVICE_NUM 4
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#define DE_NUM 2
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#define CHN_NUM 4
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#define VI_CHN_NUM 1
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#define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
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#define LAYER_NUM_PER_CHN_PER_VI_CHN 4
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#define LAYER_NUM_PER_CHN_PER_UI_CHN 4
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#define LAYER_MAX_NUM_PER_CHN 4
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#define SUPPORT_DSI
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#define SUPPORT_SMBL
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#define SUPPORT_HDMI
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#define DSI_VERSION_40
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#define HAVE_DEVICE_COMMON_MODULE
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#define SUPPORT_TV
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#define TV_UGLY_CLK_RATE 216000000
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#define SUPPORT_VGA
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#define SUPPORT_LVDS
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#define DE_WB_RESET_SHARE
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/* #define LVDS_REVERT */
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#elif defined(CONFIG_ARCH_SUN8IW15)
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/* features for sun8iw15 */
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#define DEVICE_NUM 1
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#define DE_NUM 1
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#define CHN_NUM 4
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#define VI_CHN_NUM 1
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#define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
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#define LAYER_NUM_PER_CHN_PER_VI_CHN 4
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#define LAYER_NUM_PER_CHN_PER_UI_CHN 4
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#define LAYER_MAX_NUM_PER_CHN 4
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#define SUPPORT_DSI
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#define DSI_VERSION_28
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#define CLK_NUM_PER_DSI 2
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#define DEVICE_DSI_NUM 1
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#define SUPPORT_SMBL
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#define HAVE_DEVICE_COMMON_MODULE
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#define SUPPORT_LVDS
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/*#define DE_WB_RESET_SHARE*/
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/* #define SUPPORT_EINK */
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/* #define EINK_PANEL_USED */
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/* #define SUPPORT_WB */
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/* #define EINK_DMABUF_USED */
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/* #define LVDS_REVERT */
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#elif defined(CONFIG_ARCH_SUN50IW10)
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/* features for sun50iw10 */
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#define CONFIG_INDEPENDENT_DE
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#define DEVICE_NUM 2
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#define DE_NUM 2
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#define CHN_NUM 4
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#define VI_CHN_NUM 2
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#define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
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#define LAYER_NUM_PER_CHN_PER_VI_CHN 4
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#define LAYER_NUM_PER_CHN_PER_UI_CHN 4
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#define LAYER_MAX_NUM_PER_CHN 4
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#define SUPPORT_DSI
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#define SUPPORT_COMBO_DPHY
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#define DSI_VERSION_40
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#define CLK_NUM_PER_DSI 1
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#define DEVICE_DSI_NUM 1
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#define SUPPORT_SMBL
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#define HAVE_DEVICE_COMMON_MODULE
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#define SUPPORT_LVDS
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#define DEVICE_LVDS_NUM 2
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#define SUNXI_DSI_PASSIVE_BUG
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#define IOMMU_DE0_MASTOR_ID 0
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#define IOMMU_DE1_MASTOR_ID 1
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/*#define DE_WB_RESET_SHARE*/
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/* #define SUPPORT_EINK */
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/* #define EINK_PANEL_USED */
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/* #define SUPPORT_WB */
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/* #define EINK_DMABUF_USED */
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/* #define LVDS_REVERT */
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#elif defined(CONFIG_ARCH_SUN50IW1)
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/* features for sun50iw1 */
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#define DEVICE_NUM 4
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#define DE_NUM 2
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#define CHN_NUM 4
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#define VI_CHN_NUM 1
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#define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
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#define LAYER_NUM_PER_CHN_PER_VI_CHN 4
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#define LAYER_NUM_PER_CHN_PER_UI_CHN 4
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#define LAYER_MAX_NUM_PER_CHN 4
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#define SUPPORT_DSI
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#define SUPPORT_SMBL
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#define SUPPORT_HDMI
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#define DSI_VERSION_40
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#define HAVE_DEVICE_COMMON_MODULE
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#define SUPPORT_TV
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#define SUPPORT_VGA
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#define SUPPORT_LVDS
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/* #define LVDS_REVERT */
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#elif defined(CONFIG_ARCH_SUN50IW8)
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/* features for sun50iw8 */
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#define DEVICE_NUM 1
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#define DE_NUM 1
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#define CHN_NUM 2
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#define VI_CHN_NUM 0
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#define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
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#define LAYER_NUM_PER_CHN_PER_VI_CHN 4
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#define LAYER_NUM_PER_CHN_PER_UI_CHN 4
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#define LAYER_MAX_NUM_PER_CHN 4
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//#define SUPPORT_DSI
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#define SUPPORT_SMBL
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/*#define SUPPORT_HDMI */
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//#define DSI_VERSION_40
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#define HAVE_DEVICE_COMMON_MODULE
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//#define SUPPORT_TV
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//#define SUPPORT_VGA
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//#define SUPPORT_LVDS
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/* #define LVDS_REVERT */
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#elif defined(CONFIG_ARCH_SUN8IW12)
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/* features for sun8iw12 */
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#define DEVICE_NUM 2
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#define DE_NUM 1
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#define CHN_NUM 4
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#define VI_CHN_NUM 2
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#define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
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#define LAYER_NUM_PER_CHN_PER_VI_CHN 4
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#define LAYER_NUM_PER_CHN_PER_UI_CHN 4
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#define LAYER_MAX_NUM_PER_CHN 4
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#define SUPPORT_SMBL
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#define SUPPORT_DSI
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#define DSI_VERSION_28
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#define CLK_NUM_PER_DSI 2
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#define DEVICE_DSI_NUM 1
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#define SUPPORT_HDMI
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/* #define DSI_VERSION_40 */
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#define HAVE_DEVICE_COMMON_MODULE
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#define SUPPORT_TV
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#define TV_UGLY_CLK_RATE 216000000
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/* #define SUPPORT_VGA */
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#define SUPPORT_LVDS
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#define DE_WB_RESET_SHARE
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/* #define LVDS_REVERT */
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#define SUPPORT_VDPO
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#define DEVICE_VDPO_NUM 1
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#elif defined(CONFIG_ARCH_SUN8IW6)
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/* features for sun8iw6 */
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#define DEVICE_NUM 2
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#define DE_NUM 2
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#define CHN_NUM 4
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#define VI_CHN_NUM 1
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#define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
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#define LAYER_NUM_PER_CHN_PER_VI_CHN 4
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#define LAYER_NUM_PER_CHN_PER_UI_CHN 4
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#define LAYER_MAX_NUM_PER_CHN 4
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#define SUPPORT_LVDS
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#define SUPPORT_DSI
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#define SUPPORT_SMBL
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#define SUPPORT_HDMI
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#define SUPPORT_TV
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#define DSI_VERSION_28
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#define CLK_NUM_PER_DSI 2
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#define DE_WB_RESET_SHARE
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#define LVDS_REVERT
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#elif defined(CONFIG_ARCH_SUN8IW7)
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#define DEVICE_NUM 2
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#define DE_NUM 2
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#define CHN_NUM 4
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#define VI_CHN_NUM 1
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#define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
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#define LAYER_NUM_PER_CHN_PER_VI_CHN 4
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#define LAYER_NUM_PER_CHN_PER_UI_CHN 4
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#define LAYER_MAX_NUM_PER_CHN 4
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#define VEP_NUM 1
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#define DE_WB_RESET_SHARE
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#define SUPPORT_HDMI
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#define SUPPORT_TV
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#define TV_UGLY_CLK_RATE 216000000
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#elif defined(CONFIG_ARCH_SUN8IW17)
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/* features for sun8iw17 */
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#define DEVICE_NUM 3
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#define DE_NUM 2
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#define CHN_NUM 4
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#define VI_CHN_NUM 2
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#define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
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#define LAYER_MAX_VI_NUM_PER_CHN 4
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#define LAYER_MAX_UI_NUM_PER_CHN 4
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#define LAYER_MAX_NUM_PER_CHN 4
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#define SUPPORT_DSI
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#define DEVICE_DSI_NUM 2
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#define SUPPORT_SMBL
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/* #define SUPPORT_HDMI */
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#define DSI_VERSION_40
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#define HAVE_DEVICE_COMMON_MODULE
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#define SUPPORT_TV
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#define TV_UGLY_CLK_RATE 216000000
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/* #define SUPPORT_VGA */
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#define SUPPORT_LVDS
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/* #define LVDS_REVERT */
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#else
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/* default features */
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#error "undefined platform!!!"
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#define DEVICE_NUM 2
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#define DE_NUM 2
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#define CHN_NUM 4
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#define VI_CHN_NUM 1
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#define UI_CHN_NUM (CHN_NUM - VI_CHN_NUM)
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#define LAYER_NUM_PER_CHN_PER_VI_CHN 4
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#define LAYER_NUM_PER_CHN_PER_UI_CHN 4
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#define LAYER_MAX_NUM_PER_CHN 4
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#define SUPPORT_DSI
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#define SUPPORT_SMBL
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#define SUPPORT_HDMI
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#define DSI_VERSION_40
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/* #define HAVE_DEVICE_COMMON_MODULE */
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#define SUPPORT_TV
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/* #define SUPPORT_VGA */
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#define SUPPORT_LVDS
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/* #define LVDS_REVERT */
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#endif
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#if defined(TV_UGLY_CLK_RATE)
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#define TV_COMPOSITE_CLK_RATE 27000000
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#endif
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#ifndef CLK_NUM_PER_DSI
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#define CLK_NUM_PER_DSI 1
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#endif
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#ifndef DEVICE_DSI_NUM
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#define DEVICE_DSI_NUM 1
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#endif /*endif DEVICE_DSI_NUM */
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#ifndef DEVICE_LVDS_NUM
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#define DEVICE_LVDS_NUM 1
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#endif
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/* total number of DSI clk */
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#define CLK_DSI_NUM (CLK_NUM_PER_DSI * DEVICE_DSI_NUM)
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#ifndef SUPPORT_VDPO
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#define DEVICE_VDPO_NUM 0
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#endif
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#ifndef IOMMU_DE0_MASTOR_ID
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#define IOMMU_DE0_MASTOR_ID 0
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#define IOMMU_DE1_MASTOR_ID 0
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#endif
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struct de_feat {
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const int num_screens;
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/* indicate layer manager number */
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const int num_devices;
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/*indicate timing controller number */
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const int *num_chns;
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const int *num_vi_chns;
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const int *num_layers;
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const int *is_support_vep;
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const int *is_support_smbl;
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const int *is_support_wb;
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const int *supported_output_types;
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const int *is_support_scale;
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const int *scale_line_buffer;
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const int num_vdpo; /*number of vdpo device*/
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};
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int de_feat_init(void);
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int de_feat_exit(void);
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int de_feat_get_num_screens(void);
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int de_feat_get_num_devices(void);
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int de_feat_get_num_chns(unsigned int disp);
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int de_feat_get_num_vi_chns(unsigned int disp);
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unsigned int de_feat_get_number_of_vdpo(void);
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int de_feat_get_num_ui_chns(unsigned int disp);
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int de_feat_get_num_layers(unsigned int disp);
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int de_feat_get_num_layers_by_chn(unsigned int disp, unsigned int chn);
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int de_feat_is_support_vep(unsigned int disp);
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int de_feat_is_support_vep_by_chn(unsigned int disp, unsigned int chn);
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int de_feat_is_support_smbl(unsigned int disp);
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int de_feat_is_supported_output_types(unsigned int disp,
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unsigned int output_type);
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int de_feat_is_support_wb(unsigned int disp);
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int de_feat_is_support_scale(unsigned int disp);
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int de_feat_is_support_scale_by_chn(unsigned int disp, unsigned int chn);
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int de_feat_get_scale_linebuf(unsigned int disp);
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int de_feat_get_tcon_index(unsigned int tcon_index);
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unsigned int de_feat_get_tcon_type(unsigned int tcon_index);
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#endif
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