/*
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* drivers/video/sunxi/disp2/disp/de/lowlevel_v2x/de_dcsc.c
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*
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* Copyright (c) 2007-2019 Allwinnertech Co., Ltd.
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* Author: zhengxiaobin <zhengxiaobin@allwinnertech.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include "de_rtmx.h"
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#include "de_csc_type.h"
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#include "de_csc.h"
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#define DCSC_OFST 0xB0000
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#define CSC_ENHANCE_MODE_NUM 3
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/* must equal to ENHANCE_MODE_NUM */
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static volatile struct __csc_reg_t *dcsc_dev[DE_NUM];
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static volatile struct __csc2_reg_t *dcsc2_dev[DE_NUM];
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static struct de_reg_blocks dcsc_coeff_block[DE_NUM];
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static struct de_reg_blocks dcsc_enable_block[DE_NUM];
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static struct disp_csc_config g_dcsc_config[DE_NUM];
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static unsigned int is_in_smbl[DE_NUM];
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/* device csc and smbl in the same module or not */
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static int de_dcsc_set_reg_base(unsigned int sel, void *base)
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{
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__inf("sel=%d, base=0x%p\n", sel, base);
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if (is_in_smbl[sel])
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dcsc2_dev[sel] = (struct __csc2_reg_t *) base;
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else
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dcsc_dev[sel] = (struct __csc_reg_t *) base;
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return 0;
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}
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int de_dcsc_apply(unsigned int sel, struct disp_csc_config *config)
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{
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int csc_coeff[12];
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unsigned int enhance_mode;
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int csc_enhance_setting[CSC_ENHANCE_MODE_NUM][4] = {
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{50, 50, 50, 50},
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/* normal */
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{50, 50, 50, 50},
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/* vivid */
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{50, 40, 50, 50},
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/* soft */
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};
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config->enhance_mode =
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(config->enhance_mode > CSC_ENHANCE_MODE_NUM - 1)
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? g_dcsc_config[sel].enhance_mode : config->enhance_mode;
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enhance_mode = config->enhance_mode;
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config->brightness = csc_enhance_setting[enhance_mode][0];
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config->contrast = csc_enhance_setting[enhance_mode][1];
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config->saturation = csc_enhance_setting[enhance_mode][2];
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config->hue = csc_enhance_setting[enhance_mode][3];
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__inf("sel=%d, in_fmt=%d, mode=%d, out_fmt=%d, mode=%d, range=%d\n",
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sel, config->in_fmt, config->in_mode, config->out_fmt,
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config->out_mode, config->out_color_range);
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memcpy(&g_dcsc_config[sel], config, sizeof(struct disp_csc_config));
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de_csc_coeff_calc(config->in_fmt, config->in_mode, config->out_fmt,
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config->out_mode, config->brightness,
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config->contrast, config->saturation, config->hue,
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config->out_color_range, csc_coeff);
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if (is_in_smbl[sel]) {
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dcsc2_dev[sel]->c00.dwval = *(csc_coeff);
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dcsc2_dev[sel]->c01.dwval = *(csc_coeff + 1);
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dcsc2_dev[sel]->c02.dwval = *(csc_coeff + 2);
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dcsc2_dev[sel]->c03.dwval = *(csc_coeff + 3) >> 6;
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dcsc2_dev[sel]->c10.dwval = *(csc_coeff + 4);
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dcsc2_dev[sel]->c11.dwval = *(csc_coeff + 5);
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dcsc2_dev[sel]->c12.dwval = *(csc_coeff + 6);
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dcsc2_dev[sel]->c13.dwval = *(csc_coeff + 7) >> 6;
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dcsc2_dev[sel]->c20.dwval = *(csc_coeff + 8);
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dcsc2_dev[sel]->c21.dwval = *(csc_coeff + 9);
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dcsc2_dev[sel]->c22.dwval = *(csc_coeff + 10);
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dcsc2_dev[sel]->c23.dwval = *(csc_coeff + 11) >> 6;
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dcsc2_dev[sel]->bypass.bits.enable = 1;
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/* always enable csc */
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} else {
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dcsc_dev[sel]->c00.dwval = *(csc_coeff);
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dcsc_dev[sel]->c01.dwval = *(csc_coeff + 1);
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dcsc_dev[sel]->c02.dwval = *(csc_coeff + 2);
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dcsc_dev[sel]->c03.dwval = *(csc_coeff + 3) + 0x200;
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dcsc_dev[sel]->c10.dwval = *(csc_coeff + 4);
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dcsc_dev[sel]->c11.dwval = *(csc_coeff + 5);
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dcsc_dev[sel]->c12.dwval = *(csc_coeff + 6);
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dcsc_dev[sel]->c13.dwval = *(csc_coeff + 7) + 0x200;
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dcsc_dev[sel]->c20.dwval = *(csc_coeff + 8);
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dcsc_dev[sel]->c21.dwval = *(csc_coeff + 9);
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dcsc_dev[sel]->c22.dwval = *(csc_coeff + 10);
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dcsc_dev[sel]->c23.dwval = *(csc_coeff + 11) + 0x200;
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dcsc_dev[sel]->bypass.bits.enable = 1;
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/* always enable csc */
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}
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dcsc_coeff_block[sel].dirty = 1;
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dcsc_enable_block[sel].dirty = 1;
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return 0;
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}
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int de_dcsc_get_config(unsigned int sel, struct disp_csc_config *config)
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{
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memcpy(config, &g_dcsc_config[sel], sizeof(struct disp_csc_config));
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return 0;
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}
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int de_dcsc_update_regs(unsigned int sel)
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{
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unsigned int reg_val;
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if (dcsc_enable_block[sel].dirty == 0x1) {
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if (is_in_smbl[sel]) {
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reg_val =
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readl((void __iomem *)dcsc_enable_block[sel].off);
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reg_val &= 0xfffffffd;
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reg_val |=
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(*((unsigned int *)dcsc_enable_block[sel].val));
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writel(reg_val,
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(void __iomem *)dcsc_enable_block[sel].off);
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} else {
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memcpy((void *)dcsc_enable_block[sel].off,
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dcsc_enable_block[sel].val,
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dcsc_enable_block[sel].size);
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}
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dcsc_enable_block[sel].dirty = 0x0;
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}
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if (dcsc_coeff_block[sel].dirty == 0x1) {
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memcpy((void *)dcsc_coeff_block[sel].off,
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dcsc_coeff_block[sel].val, dcsc_coeff_block[sel].size);
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dcsc_coeff_block[sel].dirty = 0x0;
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}
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return 0;
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}
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int de_dcsc_init(disp_bsp_init_para *para)
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{
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uintptr_t base;
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void *memory;
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int screen_id, device_num;
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device_num = de_feat_get_num_screens();
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for (screen_id = 0; screen_id < device_num; screen_id++) {
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is_in_smbl[screen_id] = de_feat_is_support_smbl(screen_id);
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#if defined(CONFIG_INDEPENDENT_DE)
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base = para->reg_base[DISP_MOD_DE + screen_id]
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+ (screen_id + 1) * 0x00100000 + DCSC_OFST;
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if (screen_id)
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base = base - 0x00100000;
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#else
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base = para->reg_base[DISP_MOD_DE]
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+ (screen_id + 1) * 0x00100000 + DCSC_OFST;
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#endif
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__inf("sel %d, Dcsc_base=0x%p\n", screen_id, (void *)base);
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if (is_in_smbl[screen_id]) {
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memory = kmalloc(sizeof(struct __csc2_reg_t),
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GFP_KERNEL | __GFP_ZERO);
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if (NULL == memory) {
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__wrn("malloc Ccsc[%d] mm fail! size=0x%x\n",
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screen_id,
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(unsigned int)sizeof(struct __csc2_reg_t));
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return -1;
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}
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dcsc_enable_block[screen_id].off = base;
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dcsc_enable_block[screen_id].val = memory;
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dcsc_enable_block[screen_id].size = 0x04;
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dcsc_enable_block[screen_id].dirty = 0;
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dcsc_coeff_block[screen_id].off = base + 0x80;
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dcsc_coeff_block[screen_id].val = memory + 0x80;
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dcsc_coeff_block[screen_id].size = 0x30;
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dcsc_coeff_block[screen_id].dirty = 0;
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} else {
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memory = kmalloc(sizeof(struct __csc_reg_t),
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GFP_KERNEL | __GFP_ZERO);
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if (NULL == memory) {
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__wrn("malloc Ccsc[%d] mm fail! size=0x%x\n",
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screen_id,
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(unsigned int)sizeof(struct __csc_reg_t));
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return -1;
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}
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dcsc_enable_block[screen_id].off = base;
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dcsc_enable_block[screen_id].val = memory;
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dcsc_enable_block[screen_id].size = 0x04;
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dcsc_enable_block[screen_id].dirty = 0;
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dcsc_coeff_block[screen_id].off = base + 0x10;
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dcsc_coeff_block[screen_id].val = memory + 0x10;
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dcsc_coeff_block[screen_id].size = 0x30;
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dcsc_coeff_block[screen_id].dirty = 0;
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}
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g_dcsc_config[screen_id].enhance_mode = 0;
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de_dcsc_set_reg_base(screen_id, memory);
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}
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return 0;
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}
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