/*
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* sound\soc\sunxi\spdif\sunxi-spdif.h
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* (C) Copyright 2010-2016
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* AllWinner Technology Co., Ltd. <www.allwinnertech.com>
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* wolfgang huang <huangjinhui@allwinnertech.com>
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*
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* some simple description for this code
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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*/
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#ifndef __SUNXI_SPDIF_H_
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#define __SUNXI_SPDIF_H_
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/* spdif clk source x4 select */
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#if defined(CONFIG_ARCH_SUN50IW9) || defined(CONFIG_ARCH_SUN50IW10)
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#define SPDIF_PLL_AUDIO_X4
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#else
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#undef SPDIF_PLL_AUDIO_X4
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#endif
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#if defined(CONFIG_ARCH_SUN50IW9) || defined(CONFIG_ARCH_SUN50IW10)
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#define SPDIF_LOOPBACK_DEBUG
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#else
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#undef SPDIF_LOOPBACK_DEBUG
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#endif
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/* SPDIF register definition */
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#define SUNXI_SPDIF_CTL 0x00
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#define SUNXI_SPDIF_TXCFG 0x04
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#define SUNXI_SPDIF_RXCFG 0x08
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#if defined(CONFIG_ARCH_SUN9IW1) || \
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defined(CONFIG_ARCH_SUN8IW6) || \
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defined(CONFIG_ARCH_SUN8IW7) || \
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defined(CONFIG_ARCH_SUN50I) || \
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defined(CONFIG_ARCH_SUN8IW10) || \
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defined(CONFIG_ARCH_SUN8IW11) || \
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defined(CONFIG_ARCH_SUN50IW8) || \
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defined(CONFIG_ARCH_SUN50IW10) || \
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defined(CONFIG_ARCH_SUN8IW17)
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#define SUNXI_SPDIF_TXFIFO (0x20)
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#else
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#define SUNXI_SPDIF_TXFIFO (0x0C)
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#endif
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#define SUNXI_SPDIF_RXFIFO 0x10
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#define SUNXI_SPDIF_FIFO_CTL 0x14
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#define SUNXI_SPDIF_FIFO_STA 0x18
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#define SUNXI_SPDIF_INT 0x1C
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#if defined(CONFIG_ARCH_SUN9IW1) || \
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defined(CONFIG_ARCH_SUN8IW6) || \
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defined(CONFIG_ARCH_SUN8IW7) || \
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defined(CONFIG_ARCH_SUN50I) || \
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defined(CONFIG_ARCH_SUN8IW10) || \
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defined(CONFIG_ARCH_SUN8IW11) || \
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defined(CONFIG_ARCH_SUN50IW8) || \
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defined(CONFIG_ARCH_SUN50IW10) || \
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defined(CONFIG_ARCH_SUN8IW17)
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#define SUNXI_SPDIF_INT_STA (0x0C)
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#else
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#define SUNXI_SPDIF_INT_STA (0x20)
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#endif
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#define SUNXI_SPDIF_TXCNT 0x24
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#define SUNXI_SPDIF_RXCNT 0x28
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#define SUNXI_SPDIF_TXCH_STA0 0x2C
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#define SUNXI_SPDIF_TXCH_STA1 0x30
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#define SUNXI_SPDIF_RXCH_STA0 0x34
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#define SUNXI_SPDIF_RXCH_STA1 0x38
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/* SUNXI_SPDIF_CTL register */
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#define CTL_RESET 0
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#define CTL_GEN_EN 1
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#if defined(CONFIG_ARCH_SUN8IW1)
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#define CTL_MCLKOUTEN 2
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#elif defined(CONFIG_ARCH_SUN50IW6) || \
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defined(CONFIG_ARCH_SUN8IW17) || \
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defined(CONFIG_ARCH_SUN50IW10)
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#define CTL_MCLKOOUTEN 3
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#endif
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#if defined(CONFIG_ARCH_SUN8IW10) || \
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defined(CONFIG_ARCH_SUN50IW6) || \
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defined(CONFIG_ARCH_SUN50IW8) || \
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defined(CONFIG_ARCH_SUN50IW9) || \
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defined(CONFIG_ARCH_SUN50IW10) || \
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defined(CONFIG_ARCH_SUN8IW17)
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#define CTL_LOOP_EN 2
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#endif
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#if defined(CONFIG_ARCH_SUN8IW1) || \
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defined(CONFIG_ARCH_SUN8IW6) || \
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defined(CONFIG_ARCH_SUN8IW7) || \
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defined(CONFIG_ARCH_SUN50I) || \
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defined(CONFIG_ARCH_SUN8IW11)
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#define CTL_MCLKDIV 4
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#elif defined(CONFIG_ARCH_SUN50IW6) || \
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defined(CONFIG_ARCH_SUN50IW10) || \
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defined(CONFIG_ARCH_SUN8IW17)
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#define CTL_MCLKDIV 5
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#endif
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/* SUNXI_SPDIF_TXCFG register */
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#define TXCFG_TXEN 0
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/* Chan status generated form TX_CHSTA */
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#define TXCFG_CHAN_STA_EN 1
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#define TXCFG_SAMPLE_BIT 2
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#define TXCFG_CLK_DIV_RATIO 4
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#define TXCFG_DATA_TYPE 16
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/* Only valid in PCM mode */
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#define TXCFG_ASS 17
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#define TXCFG_SINGLE_MOD 31
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/* SUNXI_SPDIF_RXCFG register */
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#define RXCFG_RXEN 0
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#define RXCFG_CHSR_CP 1
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#define RXCFG_CHST_SRC 3
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#define RXCFG_LOCK_FLAG 4
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/* SUNXI_SPDIF_FIFO_CTL register */
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#define FIFO_CTL_RXOM 0
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#define FIFO_CTL_TXIM 2
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#if defined(CONFIG_ARCH_SUN8IW10) || \
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defined(CONFIG_ARCH_SUN50IW6) || \
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defined(CONFIG_ARCH_SUN50IW8) || \
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defined(CONFIG_ARCH_SUN50IW10) || \
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defined(CONFIG_ARCH_SUN8IW17)
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#define FIFO_CTL_RXTL 4
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#define FIFO_CTL_TXTL 12
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#define FIFO_CTL_FRX 29
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#define FIFO_CTL_FTX 30
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#else
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#define FIFO_CTL_RXTL 3
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#define FIFO_CTL_TXTL 8
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#define FIFO_CTL_FRX 16
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#define FIFO_CTL_FTX 17
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#endif
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#if defined(CONFIG_ARCH_SUN9IW1) || \
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defined(CONFIG_ARCH_SUN8IW6) || \
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defined(CONFIG_ARCH_SUN8IW7) || \
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defined(CONFIG_ARCH_SUN50I) || \
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defined(CONFIG_ARCH_SUN8IW10) || \
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defined(CONFIG_ARCH_SUN8IW11) || \
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defined(CONFIG_ARCH_SUN50IW8) || \
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defined(CONFIG_ARCH_SUN50IW10) || \
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defined(CONFIG_ARCH_SUN8IW17)
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#define FIFO_CTL_HUBEN 31
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#else
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#define FIFO_CTL_SRC 31
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#endif
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#if defined(CONFIG_ARCH_SUN8IW10) || \
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defined(CONFIG_ARCH_SUN50IW6) || \
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defined(CONFIG_ARCH_SUN50IW8) || \
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defined(CONFIG_ARCH_SUN50IW10) || \
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defined(CONFIG_ARCH_SUN8IW17)
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#define CTL_TXTL_MASK 255
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#define CTL_TXTL_DEFAULT 0x40
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#define CTL_RXTL_MASK 127
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#define CTL_RXTL_DEFAULT 0x20
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#else
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#define CTL_TXTL_MASK 31
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#define CTL_RXTL_MASK 31
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#endif
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/* SUNXI_SPDIF_FIFO_STA register */
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#define FIFO_STA_RXA_CNT 0
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#if defined(CONFIG_ARCH_SUN8IW10) || \
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defined(CONFIG_ARCH_SUN50IW6) || \
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defined(CONFIG_ARCH_SUN50IW8) || \
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defined(CONFIG_ARCH_SUN50IW10) || \
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defined(CONFIG_ARCH_SUN8IW17)
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#define FIFO_STA_RXA 15
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#define FIFO_STA_TXA_CNT 16
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#define FIFO_STA_TXE 31
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#else
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#define FIFO_STA_RXA 6
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#define FIFO_STA_TXA_CNT 8
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#define FIFO_STA_TXE 14
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#endif
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/* SUNXI_SPDIF_INT register */
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#define INT_RXAIEN 0
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#define INT_RXOIEN 1
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#define INT_RXDRQEN 2
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#define INT_TXEIEN 4
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#define INT_TXOIEN 5
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#define INT_TXUIEN 6
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#define INT_TXDRQEN 7
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#define INT_RXPAREN 16
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#define INT_RXUNLOCKEN 17
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#define INT_RXLOCKEN 18
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/* SUNXI_SPDIF_INT_STA */
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#define INT_STA_RXA 0
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#define INT_STA_RXO 1
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#define INT_STA_TXE 4
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#define INT_STA_TXO 5
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#define INT_STA_TXU 6
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#define INT_STA_RXPAR 16
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#define INT_STA_RXUNLOCK 17
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#define INT_STA_RXLOCK 18
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/* SUNXI_SPDIF_TXCH_STA0 register */
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#define TXCHSTA0_PRO 0
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#define TXCHSTA0_AUDIO 1
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#define TXCHSTA0_CP 2
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#define TXCHSTA0_EMPHASIS 3
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#define TXCHSTA0_MODE 6
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#define TXCHSTA0_CATACOD 8
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#define TXCHSTA0_SRCNUM 16
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#define TXCHSTA0_CHNUM 20
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#define TXCHSTA0_SAMFREQ 24
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#define TXCHSTA0_CLK 28
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/* SUNXI_SPDIF_TXCH_STA1 register */
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#define TXCHSTA1_MAXWORDLEN 0
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#define TXCHSTA1_SAMWORDLEN 1
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#define TXCHSTA1_ORISAMFREQ 4
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#define TXCHSTA1_CGMSA 8
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/* SUNXI_SPDIF_RXCH_STA0 register */
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#define RXCHSTA0_PRO 0
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#define RXCHSTA0_AUDIO 1
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#define RXCHSTA0_CP 2
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#define RXCHSTA0_EMPHASIS 3
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#define RXCHSTA0_MODE 6
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#define RXCHSTA0_CATACOD 8
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#define RXCHSTA0_SRCNUM 16
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#define RXCHSTA0_CHNUM 20
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#define RXCHSTA0_SAMFREQ 24
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#define RXCHSTA0_CLK 28
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/* SUNXI_SPDIF_RXCH_STA1 register */
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#define RXCHSTA1_MAXWORDLEN 0
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#define RXCHSTA1_SAMWORDLEN 1
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#define RXCHSTA1_ORISAMFREQ 4
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#define RXCHSTA1_CGMSA 8
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#endif /* __SUNXI_SPDIF_H_ */
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