/*
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*********************************************************************************************************
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* AR100 SYSTEM
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* AR100 Software System Develop Kits
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* clock control unit module
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*
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* (c) Copyright 2012-2016, Sunny China
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* All Rights Reserved
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*
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* File : prcm.h
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* By : Sunny
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* Version : v1.0
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* Date : 2012-4-28
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* Descript: clock control unit public header.
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* Update : date auther ver notes
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* 2012-4-28 14:48:38 Sunny 1.0 Create this file.
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*********************************************************************************************************
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*/
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#ifndef __PRCM_H__
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#define __PRCM_H__
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/* the clock status of on-off */
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typedef enum ccu_clk_onoff {
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CCU_CLK_OFF = 0x0, /* clock off status */
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CCU_CLK_ON = 0x1, /* clock on status */
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} ccu_clk_onff_e;
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/* the clock status of reset */
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typedef enum ccu_clk_reset {
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CCU_CLK_RESET = 0x0, /* reset valid status */
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CCU_CLK_NRESET = 0x1, /* reset invalid status */
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} ccu_clk_reset_e;
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/* command for call-back function of clock change */
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typedef enum ccu_clk_cmd {
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CCU_CLK_CLKCHG_REQ = 0x0, /* command for notify that clock will change */
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CCU_CLK_CLKCHG_DONE, /* command for notify that clock change finish */
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} ccu_clk_cmd_e;
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/* command for call-back function of 24M hosc on-off */
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typedef enum ccu_hosc_cmd {
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CCU_HOSC_ON_READY_NOTIFY = 0x0, /* command for notify that 24mhosc power-on already */
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CCU_HOSC_WILL_OFF_NOTIFY, /* command for notify that 24mhosc will off */
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} ccu_hosc_cmd_e;
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/* the state of power-off gating */
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typedef enum poweroff_gating_state {
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CCU_POWEROFF_GATING_INVALID = 0x0,
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CCU_POWEROFF_GATING_VALID = 0x1,
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} poweroff_gating_state_e;
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/* source clocks ID */
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typedef enum ccu_src_clk {
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CCU_SYS_CLK_NONE = 0x0, /* invalid source clock id */
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CCU_SYS_CLK_LOSC, /* LOSC, 33/50/67:32768Hz, 73:16MHz/512=31250 */
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CCU_SYS_CLK_IOSC, /* InternalOSC, 33/50/67:700KHZ, 73:16MHz */
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CCU_SYS_CLK_HOSC, /* HOSC, 24MHZ clock */
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CCU_SYS_CLK_AXI, /* AXI clock */
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CCU_SYS_CLK_16M, /* 16M for the backdoor */
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CCU_SYS_CLK_PLL1, /* PLL1 clock */
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CCU_SYS_CLK_PLL2, /* PLL2 clock */
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CCU_SYS_CLK_PLL3, /* PLL3 clock */
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CCU_SYS_CLK_PLL4, /* PLL4 clock */
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CCU_SYS_CLK_PLL5, /* PLL5 clock */
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CCU_SYS_CLK_PLL6, /* PLL6 clock */
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CCU_SYS_CLK_PLL7, /* PLL7 clock */
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CCU_SYS_CLK_PLL8, /* PLL8 clock */
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CCU_SYS_CLK_PLL9, /* PLL9 clock */
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CCU_SYS_CLK_PLL10, /* PLL10 clock */
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CCU_SYS_CLK_PLL11, /* PLL10 clock */
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CCU_SYS_CLK_CPUS, /* cpus clock */
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CCU_SYS_CLK_C0, /* cluster0 clock */
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CCU_SYS_CLK_C1, /* cluster1 clock */
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CCU_SYS_CLK_DDR0, /* ddr0 clock */
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CCU_SYS_CLK_DDR1, /* ddr1 clock */
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CCU_SYS_CLK_PERI0, /* peri0 clock */
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CCU_SYS_CLK_PERI1, /* peri1 clock */
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CCU_SYS_CLK_AXI0, /* AXI0 clock */
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CCU_SYS_CLK_AXI1, /* AXI0 clock */
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CCU_SYS_CLK_AHB0, /* AHB0 clock */
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CCU_SYS_CLK_AHB1, /* AHB1 clock */
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CCU_SYS_CLK_AHB2, /* AHB2 clock */
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CCU_SYS_CLK_APB0, /* APB0 clock */
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CCU_SYS_CLK_APB1, /* APB1 clock */
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CCU_SYS_CLK_APB2, /* APB2 clock */
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CCU_SYS_CLK_AHB3, /* AHB3 clock */
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CCU_SYS_CLK_PSI, /* PSI clock */
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CCU_SYS_CLK_AHBS, /* AHBS clock */
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CCU_SYS_CLK_APBS1, /* APBS1 clock */
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CCU_SYS_CLK_APBS2, /* APBS2 clock */
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} ccu_sys_clk_e;
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/* module clocks ID */
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typedef enum ccu_mod_clk {
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CCU_MOD_CLK_NONE,
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CCU_MOD_CLK_CPUS,
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CCU_MOD_CLK_AHB0,
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CCU_MOD_CLK_APB0,
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CCU_MOD_CLK_C0,
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CCU_MOD_CLK_C1,
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CCU_MOD_CLK_CPU0,
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CCU_MOD_CLK_CPU1,
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CCU_MOD_CLK_CPU2,
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CCU_MOD_CLK_CPU3,
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CCU_MOD_CLK_AHB1,
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CCU_MOD_CLK_AHB2,
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CCU_MOD_CLK_APB1,
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CCU_MOD_CLK_APB2,
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CCU_MOD_CLK_DMA,
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CCU_MOD_CLK_SDRAM,
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CCU_MOD_CLK_SPINLOCK,
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CCU_MOD_CLK_MSGBOX,
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CCU_MOD_CLK_AHB1_SS,
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CCU_MOD_CLK_AXI,
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CCU_MOD_CLK_AXI0,
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CCU_MOD_CLK_AXI1,
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CCU_MOD_CLK_R_ONEWIRE_SP,
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CCU_MOD_CLK_R_CIR_SP,
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CCU_MOD_CLK_R_TH,
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CCU_MOD_CLK_R_ONEWIRE,
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CCU_MOD_CLK_R_UART,
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CCU_MOD_CLK_R_UART1,
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CCU_MOD_CLK_R_UART2,
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CCU_MOD_CLK_R_UART3,
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CCU_MOD_CLK_R_UART4,
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CCU_MOD_CLK_R_TIMER0_1,
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CCU_MOD_CLK_R_P2WI,
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CCU_MOD_CLK_R_RSB,
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CCU_MOD_CLK_R_TWI,
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CCU_MOD_CLK_R_TWI0,
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CCU_MOD_CLK_R_TWI1,
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CCU_MOD_CLK_R_TWI2,
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CCU_MOD_CLK_R_CIR,
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CCU_MOD_CLK_R_PIO,
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CCU_MOD_CLK_R_VM,
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CCU_MOD_CLK_R_THS,
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CCU_MOD_CLK_R_LRADC,
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CCU_MOD_CLK_R_CAN,
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CCU_MOD_CLK_VDD_SYS,
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CCU_MOD_CLK_CCI400,
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CCU_MOD_CLK_PSI,
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CCU_MOD_CLK_AHB3,
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CCU_MOD_CLK_AHBS,
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CCU_MOD_CLK_APBS1,
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CCU_MOD_CLK_APBS2,
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CCU_MOD_CLK_R_RTC,
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CCU_MOD_CLK_R_CPUSCFG,
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CCU_MOD_CLK_R_PRCM,
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CCU_MOD_CLK_R_WDG,
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CCU_MOD_CLK_R_TWD,
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CCU_MOD_CLK_R_PWM,
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CCU_MOD_CLK_R_SPI,
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CCU_MOD_CLK_R_INTC,
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CCU_MOD_CLK_CPU_APB,
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} ccu_mod_clk_e;
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/* the power control modules */
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typedef enum power_control_module {
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/* cpux power controls */
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PWRCTL_C0CPUX,
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PWRCTL_C0CPU0,
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PWRCTL_C0CPU1,
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PWRCTL_C0CPU2,
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PWRCTL_C0CPU3,
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PWRCTL_C1CPUX,
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PWRCTL_C1CPU0,
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PWRCTL_C1CPU1,
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PWRCTL_C1CPU2,
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PWRCTL_C1CPU3,
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/* vdd-sys power controls */
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PWRCTL_VDD_CPUX_GPIO_PAD_HOLD,
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PWRCTL_VDD_CPUS,
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PWRCTL_VDD_AVCC_A,
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PWRCTL_VCC_PLL,
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PWRCTL_VCC_PLL_LOW_VOLT,
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/* gpu power control */
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PWRCTL_GPU,
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PWRCTL_SYS2VDD_USB3,
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PWRCTL_SYS2VDD_USB0,
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} power_control_module_e;
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/*
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*********************************************************************************************************
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* INITIALIZE CCU
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*
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* Description: initialize clock control unit.
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*
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* Arguments : none.
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*
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* Returns : OK if initialize ccu succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 ccu_init(void);
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/*
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*********************************************************************************************************
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* EXIT CCU
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*
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* Description: exit clock control unit.
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*
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* Arguments : none.
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*
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* Returns : OK if exit ccu succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 ccu_exit(void);
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/*
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*********************************************************************************************************
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* GET SOURCE FREQUENCY
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*
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* Description: get the frequency of a specific source clock.
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*
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* Arguments : sclk : the source clock ID which we want to get frequency.
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*
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* Returns : frequency of the specific source clock.
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*********************************************************************************************************
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*/
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s32 ccu_get_sclk_freq(u32 sclk);
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s32 ccu_set_sclk_onoff(u32 sclk, s32 onoff);
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/*
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*********************************************************************************************************
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* REGISTER MODULE CB
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*
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* Description: register call-back for module clock, when the source frequency
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* of the module clock changed, it will use this call-back to notify
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* module driver.
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*
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* Arguments : mclk : the module clock ID which we want to register call-back.
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* pcb : the call-back which we want to register.
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*
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* Returns : OK if register call-back succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 ccu_reg_mclk_cb(u32 mclk, __pNotifier_t pcb);
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/*
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*********************************************************************************************************
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* UNREGISTER MODULE CB
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*
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* Description: unregister call-back for module clock.
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*
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* Arguments : mclk : the module clock ID which we want to unregister call-back.
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* pcb : the call-back which we want to unregister.
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*
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* Returns : OK if unregister call-back succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 ccu_unreg_mclk_cb(u32 mclk, __pNotifier_t pcb);
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/*
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*********************************************************************************************************
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* SET SOURCE OF MODULE CLOCK
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*
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* Description: set the source of a specific module clock.
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*
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* Arguments : mclk : the module clock ID which we want to set source.
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* sclk : the source clock ID whick we want to set as source.
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*
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* Returns : OK if set source succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 ccu_set_mclk_src(u32 mclk, u32 sclk);
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/*
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*********************************************************************************************************
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* GET SOURCE OF MODULE CLOCK
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*
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* Description: get the source of a specific module clock.
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*
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* Arguments : mclk : the module clock ID which we want to get source.
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*
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* Returns : the source clock ID of source clock.
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*********************************************************************************************************
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*/
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s32 ccu_get_mclk_src(u32 mclk);
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/*
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*********************************************************************************************************
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* SET DIVIDER OF MODULE CLOCK
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*
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* Description: set the divider of a specific module clock.
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*
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* Arguments : mclk : the module clock ID which we want to set divider.
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* div : the divider whick we want to set as source.
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*
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* Returns : OK if set divider succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 ccu_set_mclk_div(u32 mclk, u32 div);
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/*
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*********************************************************************************************************
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* GET DIVIDER OF MODULE CLOCK
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*
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* Description: get the divider of a specific module clock.
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*
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* Arguments : mclk : the module clock ID which we want to get divider.
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*
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* Returns : the divider of the specific module clock.
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*********************************************************************************************************
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*/
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s32 ccu_get_mclk_div(u32 mclk);
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/*
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*********************************************************************************************************
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* SET ON-OFF STATUS OF MODULE CLOCK
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*
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* Description: set the on-off status of a specific module clock.
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*
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* Arguments : mclk : the module clock ID which we want to set on-off status.
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* onoff : the on-off status which we want to set, the detail please
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* refer to the clock status of on-off.
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*
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* Returns : OK if set module clock on-off status succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 ccu_set_mclk_onoff(u32 mclk, s32 onoff);
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/*
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*********************************************************************************************************
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* SET RESET STATUS OF MODULE CLOCK
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*
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* Description: set the reset status of a specific module clock.
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*
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* Arguments : mclk : the module clock ID which we want to set reset status.
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* reset : the reset status which we want to set, the detail please
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* refer to the clock status of reset.
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*
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* Returns : OK if set module clock reset status succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 ccu_set_mclk_reset(u32 mclk, s32 reset);
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/*
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*********************************************************************************************************
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* SET POWER OFF STATUS OF HWMODULE
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*
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* Description: set the power off gating status of a specific module.
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*
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* Arguments : module : the module ID which we want to set power off gating status.
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* status : the power off status which we want to set, the detail please
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* refer to the status of power-off gating.
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*
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* Returns : OK if set module power off gating status succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 ccu_set_poweroff_gating_state(s32 module, s32 state);
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s32 ccu_set_poweroff_gating_state_ext(s32 module, s32 state);
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/*
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*********************************************************************************************************
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* RESET MODULE
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*
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* Description: reset a specific module.
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*
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* Arguments : module : the module clock ID which we want to reset.
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*
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* Returns : OK if reset module succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 ccu_reset_module(u32 mclk);
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s32 ccu_24mhosc_disable(void);
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s32 ccu_24mhosc_enable(void);
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s32 ccu_24mhosc_reg_cb(__pNotifier_t pcb);
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s32 is_hosc_lock(void);
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void save_state_flag(u32 value);
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u32 read_state_flag(void);
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extern u32 iosc_freq;
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extern u32 losc_freq;
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void iosc_freq_init(void);
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#endif /* __PRCM_H__ */
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