/*
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*********************************************************************************************************
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* AR100 SYSTEM
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* AR100 Software System Develop Kits
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* cpucfg module
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*
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* (c) Copyright 2012-2016, Sunny China
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* All Rights Reserved
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*
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* File : cpucfg.h
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* By : Sunny
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* Version : v1.0
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* Date : 2012-4-28
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* Descript: cpu config module public header.
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* Update : date auther ver notes
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* 2012-4-28 14:48:38 Sunny 1.0 Create this file.
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*********************************************************************************************************
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*/
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#ifndef __CPUCFG_H__
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#define __CPUCFG_H__
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#ifdef FPGA_PLATFORM
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#define L2CACHE_IS_WFI_MODE(cluster) (1)
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#define CPU_IS_WFI_MODE(cluster, cpu) (1)
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#else
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#define L2CACHE_IS_WFI_MODE(cluster) (readl(SUNXI_CLUSTER_CPU_STATUS(cluster)) & (1 << 0))
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#define CPU_IS_WFI_MODE(cluster, cpu) (readl(SUNXI_CLUSTER_CPU_STATUS(cluster)) & (1 << (16 + cpu)))
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#endif
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/* the reset status of cpu */
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typedef enum cpu_reset_status {
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CPU_RESET_ASSERT = 0x0,
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CPU_RESET_DEASSERT = 0x3,
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} cpu_reset_status_e;
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/* the status of cluster0 */
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typedef enum cluster_reset_status {
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CLUSTER_RESET_ASSERT = 0x0,
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CLUSTER_RESET_DEASSERT = 0x1,
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} cluster_reset_status_e;
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/* the status of acinactm */
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typedef enum acinactm_status {
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ACINACTM_LOW = 0x0,
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ACINACTM_HIGH = 0x1,
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} acinactm_status_e;
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/* L1 & L2 reset by hardware status */
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typedef enum l1l2_reset_by_hardware_status {
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L1_EN_L2_EN = 0x0,
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L1_DIS_L2_EN = 0xf,
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L1_EN_L2_DIS = 0x10,
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L1_DIS_L2_DIS = 0x1f
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} l1l2_reset_by_hardware_status_e;
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extern void cpucfg_cpu_suspend(void);
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extern void cpucfg_cpu_suspend_late(void);
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extern s32 cpucfg_cpu_resume_early(u32 resume_addr);
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extern s32 cpucfg_cpu_resume(u32 resume_addr);
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/*
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*********************************************************************************************************
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* INITIALIZE CPUCFG
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*
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* Description: initialize cpu configure module.
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*
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* Arguments : none.
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*
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* Returns : OK if initialize cpu configure succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 cpucfg_init(void);
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/*
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*********************************************************************************************************
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* EXIT CPUCFG
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*
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* Description: exit cpu configure module.
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*
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* Arguments : none.
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*
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* Returns : OK if exit cpu configure succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 cpucfg_exit(void);
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/*
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*********************************************************************************************************
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* SET SUPER-STANDBY FLAG
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*
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* Description: set super-standby flag.
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*
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* Arguments : none.
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*
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* Returns : OK if set super-standby flag succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 cpucfg_set_super_standby_flag(void);
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/*
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*********************************************************************************************************
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* CLEAR SUPER-STANDBY FLAG
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*
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* Description: clear super-standby flag.
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*
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* Arguments : none.
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*
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* Returns : OK if clear super-standby flag succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 cpucfg_clear_super_standby_flag(void);
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/*
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*********************************************************************************************************
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* GET CPU STATUS
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*
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* Description: get the cpu status.
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*
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* Arguments : none.
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*
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* Returns : OK if get status succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 cpucfg_get_cpu_state(u32 cpu_num);
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/*
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*********************************************************************************************************
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* SET LE ADDRESS SPACE
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*
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* Description: set little-endian address space.
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*
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* Arguments : start : the start address of little-endian space.
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* end : the end address of little-endian space.
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*
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* Returns : OK if set little-endian succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 cpucfg_set_little_endian_address(void *start, void *end);
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extern s32 cpucfg_remove_little_endian_address(void *start, void *end);
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/*
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*********************************************************************************************************
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* CLEAR 64BIT COUNTER
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*
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* Description: clear 64bit counter, after this operation,
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* the value of conuter will reset to zero.
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*
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* Arguments : none.
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*
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* Returns : OK if clear counter succeeded, others if failed.
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*********************************************************************************************************
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*/
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s32 cpucfg_counter_clear(void);
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/*
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*********************************************************************************************************
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* READ 64BIT COUNTER
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*
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* Description: read 64bit counter, the counter value base on us.
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*
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* Arguments : none.
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*
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* Returns : the value of counter, base on us.
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*********************************************************************************************************
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*/
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u64 cpucfg_counter_read(void);
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s32 cpucfg_set_cpux_jump_addr(u32 addr);
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s32 cpucfg_cpu_power_off_pre_process(void);
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s32 cpucfg_cpu_power_on_post_process(void);
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extern void cpucfg_mcpm_init(void);
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void set_secondary_entry(u32 entry, u32 cpu);
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void sun50i_set_AA32nAA64(u32 cluster, u32 cpu, bool is_aa64);
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void cpu_power_up(u32 cluster, u32 cpu);
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void cpu_power_down(u32 cluster, u32 cpu);
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void cpucfg_counter_ctrl(bool enable);
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#endif /* __CPUCFG_H__ */
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