1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
| /{
| soc {
| timer5: timer@40000c00 {
| u-boot,dm-pre-reloc;
| };
| };
| };
|
| &pinctrl {
| usart1_pins_a: usart1@0 {
| u-boot,dm-pre-reloc;
| pins1 {
| u-boot,dm-pre-reloc;
| };
| pins2 {
| u-boot,dm-pre-reloc;
| };
| };
| fmc_pins: fmc@0 {
| u-boot,dm-pre-reloc;
| pins
| {
| u-boot,dm-pre-reloc;
| };
| };
| };
|
| &fmc {
| bank1: bank@0 {
| u-boot,dm-pre-reloc;
| };
| };
|
| &pwrcfg {
| u-boot,dm-pre-reloc;
| };
|
| &clk_hse {
| u-boot,dm-pre-reloc;
| };
|
|
