/*
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* Copyright 2017 NXP
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/{
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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idle-states {
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entry-method = "psci";
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CPU_SLEEP: cpu-sleep {
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compatible = "arm,idle-state";
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local-timer-stop;
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arm,psci-suspend-param = <0x0000000>;
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entry-latency-us = <700>;
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exit-latency-us = <250>;
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min-residency-us = <1000>;
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};
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CLUSTER_SLEEP: cluster-sleep {
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compatible = "arm,idle-state";
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local-timer-stop;
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arm,psci-suspend-param = <0x1000000>;
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entry-latency-us = <1000>;
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exit-latency-us = <700>;
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min-residency-us = <2700>;
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wakeup-latency-us = <1500>;
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};
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};
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/* We have 1 clusters having 4 Cortex-A53 cores */
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A53_0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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cpu-idle-states = <&CPU_SLEEP>;
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};
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A53_1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x1>;
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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cpu-idle-states = <&CPU_SLEEP>;
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};
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A53_2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x2>;
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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cpu-idle-states = <&CPU_SLEEP>;
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};
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A53_3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x3>;
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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cpu-idle-states = <&CPU_SLEEP>;
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};
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A53_L2: l2-cache0 {
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compatible = "cache";
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};
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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cpu_suspend = <0xc4000001>;
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cpu_off = <0xc4000002>;
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cpu_on = <0xc4000003>;
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};
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};
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