// Copyright 2016 The SwiftShader Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef sw_CPUID_hpp
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#define sw_CPUID_hpp
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namespace sw
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{
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#if !defined(__i386__) && defined(_M_IX86)
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#define __i386__ 1
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#endif
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#if !defined(__x86_64__) && (defined(_M_AMD64) || defined (_M_X64))
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#define __x86_64__ 1
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#endif
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class CPUID
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{
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public:
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static bool supportsMMX();
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static bool supportsCMOV();
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static bool supportsMMX2(); // MMX instructions added by SSE: pshufw, pmulhuw, pmovmskb, pavgw/b, pextrw, pinsrw, pmaxsw/ub, etc.
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static bool supportsSSE();
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static bool supportsSSE2();
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static bool supportsSSE3();
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static bool supportsSSSE3();
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static bool supportsSSE4_1();
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static int coreCount();
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static int processAffinity();
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static void setEnableMMX(bool enable);
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static void setEnableCMOV(bool enable);
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static void setEnableSSE(bool enable);
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static void setEnableSSE2(bool enable);
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static void setEnableSSE3(bool enable);
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static void setEnableSSSE3(bool enable);
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static void setEnableSSE4_1(bool enable);
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static void setFlushToZero(bool enable); // Denormal results are written as zero
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static void setDenormalsAreZero(bool enable); // Denormal inputs are read as zero
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private:
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static bool MMX;
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static bool CMOV;
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static bool SSE;
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static bool SSE2;
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static bool SSE3;
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static bool SSSE3;
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static bool SSE4_1;
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static int cores;
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static int affinity;
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static bool enableMMX;
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static bool enableCMOV;
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static bool enableSSE;
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static bool enableSSE2;
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static bool enableSSE3;
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static bool enableSSSE3;
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static bool enableSSE4_1;
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static bool detectMMX();
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static bool detectCMOV();
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static bool detectSSE();
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static bool detectSSE2();
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static bool detectSSE3();
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static bool detectSSSE3();
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static bool detectSSE4_1();
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static int detectCoreCount();
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static int detectAffinity();
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};
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}
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namespace sw
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{
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inline bool CPUID::supportsMMX()
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{
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return MMX && enableMMX;
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}
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inline bool CPUID::supportsCMOV()
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{
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return CMOV && enableCMOV;
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}
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inline bool CPUID::supportsMMX2()
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{
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return supportsSSE(); // Coincides with 64-bit integer vector instructions supported by SSE
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}
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inline bool CPUID::supportsSSE()
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{
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return SSE && enableSSE;
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}
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inline bool CPUID::supportsSSE2()
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{
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return SSE2 && enableSSE2;
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}
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inline bool CPUID::supportsSSE3()
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{
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return SSE3 && enableSSE3;
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}
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inline bool CPUID::supportsSSSE3()
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{
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return SSSE3 && enableSSSE3;
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}
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inline bool CPUID::supportsSSE4_1()
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{
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return SSE4_1 && enableSSE4_1;
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}
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inline int CPUID::coreCount()
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{
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return cores;
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}
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inline int CPUID::processAffinity()
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{
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return affinity;
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}
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}
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#endif // sw_CPUID_hpp
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