/*
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* Copyright 2017 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include <errno.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <virtgpu_drm.h>
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#include <xf86drm.h>
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#include "drv_priv.h"
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#include "helpers.h"
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#include "util.h"
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#include "virgl_hw.h"
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#ifndef PAGE_SIZE
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#define PAGE_SIZE 0x1000
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#endif
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#define PIPE_TEXTURE_2D 2
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#define MESA_LLVMPIPE_TILE_ORDER 6
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#define MESA_LLVMPIPE_TILE_SIZE (1 << MESA_LLVMPIPE_TILE_ORDER)
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static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
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DRM_FORMAT_BGR888, DRM_FORMAT_RGB565,
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DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB8888 };
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static const uint32_t dumb_texture_source_formats[] = { DRM_FORMAT_R8, DRM_FORMAT_YVU420,
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DRM_FORMAT_YVU420_ANDROID };
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static const uint32_t texture_source_formats[] = { DRM_FORMAT_R8, DRM_FORMAT_RG88 };
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struct virtio_gpu_priv {
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int has_3d;
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};
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static uint32_t translate_format(uint32_t drm_fourcc, uint32_t plane)
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{
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switch (drm_fourcc) {
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case DRM_FORMAT_XRGB8888:
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return VIRGL_FORMAT_B8G8R8X8_UNORM;
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case DRM_FORMAT_ARGB8888:
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return VIRGL_FORMAT_B8G8R8A8_UNORM;
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case DRM_FORMAT_XBGR8888:
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return VIRGL_FORMAT_R8G8B8X8_UNORM;
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case DRM_FORMAT_ABGR8888:
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return VIRGL_FORMAT_R8G8B8A8_UNORM;
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case DRM_FORMAT_RGB565:
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return VIRGL_FORMAT_B5G6R5_UNORM;
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case DRM_FORMAT_R8:
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return VIRGL_FORMAT_R8_UNORM;
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case DRM_FORMAT_RG88:
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return VIRGL_FORMAT_R8G8_UNORM;
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default:
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return 0;
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}
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}
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static int virtio_dumb_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
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uint64_t use_flags)
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{
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width = ALIGN(width, MESA_LLVMPIPE_TILE_SIZE);
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height = ALIGN(height, MESA_LLVMPIPE_TILE_SIZE);
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/* HAL_PIXEL_FORMAT_YV12 requires that the buffer's height not be aligned. */
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if (bo->format == DRM_FORMAT_YVU420_ANDROID)
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height = bo->height;
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return drv_dumb_bo_create(bo, width, height, format, use_flags);
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}
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static int virtio_virgl_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
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uint64_t use_flags)
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{
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int ret;
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ssize_t plane;
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ssize_t num_planes = drv_num_planes_from_format(format);
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uint32_t stride0;
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for (plane = 0; plane < num_planes; plane++) {
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uint32_t stride = drv_stride_from_format(format, width, plane);
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uint32_t size = drv_size_from_format(format, stride, height, plane);
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uint32_t res_format = translate_format(format, plane);
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struct drm_virtgpu_resource_create res_create;
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memset(&res_create, 0, sizeof(res_create));
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size = ALIGN(size, PAGE_SIZE);
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/*
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* Setting the target is intended to ensure this resource gets bound as a 2D
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* texture in the host renderer's GL state. All of these resource properties are
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* sent unchanged by the kernel to the host, which in turn sends them unchanged to
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* virglrenderer. When virglrenderer makes a resource, it will convert the target
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* enum to the equivalent one in GL and then bind the resource to that target.
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*/
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res_create.target = PIPE_TEXTURE_2D;
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res_create.format = res_format;
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res_create.bind = VIRGL_BIND_RENDER_TARGET;
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res_create.width = width;
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res_create.height = height;
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res_create.depth = 1;
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res_create.array_size = 1;
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res_create.last_level = 0;
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res_create.nr_samples = 0;
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res_create.stride = stride;
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res_create.size = size;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE, &res_create);
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if (ret) {
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drv_log("DRM_IOCTL_VIRTGPU_RESOURCE_CREATE failed with %s\n",
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strerror(errno));
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goto fail;
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}
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bo->handles[plane].u32 = res_create.bo_handle;
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}
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stride0 = drv_stride_from_format(format, width, 0);
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drv_bo_from_format(bo, stride0, height, format);
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for (plane = 0; plane < num_planes; plane++)
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bo->offsets[plane] = 0;
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return 0;
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fail:
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for (plane--; plane >= 0; plane--) {
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struct drm_gem_close gem_close;
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memset(&gem_close, 0, sizeof(gem_close));
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gem_close.handle = bo->handles[plane].u32;
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drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
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}
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return ret;
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}
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static void *virtio_virgl_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
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{
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int ret;
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struct drm_virtgpu_map gem_map;
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memset(&gem_map, 0, sizeof(gem_map));
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gem_map.handle = bo->handles[0].u32;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_MAP, &gem_map);
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if (ret) {
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drv_log("DRM_IOCTL_VIRTGPU_MAP failed with %s\n", strerror(errno));
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return MAP_FAILED;
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}
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vma->length = bo->total_size;
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return mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
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gem_map.offset);
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}
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static int virtio_gpu_init(struct driver *drv)
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{
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int ret;
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struct virtio_gpu_priv *priv;
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struct drm_virtgpu_getparam args;
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priv = calloc(1, sizeof(*priv));
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drv->priv = priv;
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memset(&args, 0, sizeof(args));
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args.param = VIRTGPU_PARAM_3D_FEATURES;
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args.value = (uint64_t)(uintptr_t)&priv->has_3d;
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ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_GETPARAM, &args);
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if (ret) {
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drv_log("virtio 3D acceleration is not available\n");
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/* Be paranoid */
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priv->has_3d = 0;
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}
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drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
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&LINEAR_METADATA, BO_USE_RENDER_MASK);
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if (priv->has_3d)
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drv_add_combinations(drv, texture_source_formats,
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ARRAY_SIZE(texture_source_formats), &LINEAR_METADATA,
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BO_USE_TEXTURE_MASK);
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else
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drv_add_combinations(drv, dumb_texture_source_formats,
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ARRAY_SIZE(dumb_texture_source_formats), &LINEAR_METADATA,
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BO_USE_TEXTURE_MASK);
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return drv_modify_linear_combinations(drv);
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}
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static void virtio_gpu_close(struct driver *drv)
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{
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free(drv->priv);
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drv->priv = NULL;
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}
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static int virtio_gpu_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
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uint64_t use_flags)
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{
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struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
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if (priv->has_3d)
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return virtio_virgl_bo_create(bo, width, height, format, use_flags);
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else
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return virtio_dumb_bo_create(bo, width, height, format, use_flags);
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}
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static int virtio_gpu_bo_destroy(struct bo *bo)
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{
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struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
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if (priv->has_3d)
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return drv_gem_bo_destroy(bo);
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else
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return drv_dumb_bo_destroy(bo);
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}
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static void *virtio_gpu_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
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{
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struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
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if (priv->has_3d)
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return virtio_virgl_bo_map(bo, vma, plane, map_flags);
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else
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return drv_dumb_bo_map(bo, vma, plane, map_flags);
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}
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static int virtio_gpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
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{
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int ret;
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struct drm_virtgpu_3d_transfer_from_host xfer;
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struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
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if (!priv->has_3d)
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return 0;
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memset(&xfer, 0, sizeof(xfer));
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xfer.bo_handle = mapping->vma->handle;
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xfer.box.x = mapping->rect.x;
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xfer.box.y = mapping->rect.y;
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xfer.box.w = mapping->rect.width;
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xfer.box.h = mapping->rect.height;
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xfer.box.d = 1;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST, &xfer);
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if (ret) {
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drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST failed with %s\n", strerror(errno));
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return ret;
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}
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return 0;
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}
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static int virtio_gpu_bo_flush(struct bo *bo, struct mapping *mapping)
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{
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int ret;
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struct drm_virtgpu_3d_transfer_to_host xfer;
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struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
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if (!priv->has_3d)
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return 0;
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if (!(mapping->vma->map_flags & BO_MAP_WRITE))
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return 0;
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memset(&xfer, 0, sizeof(xfer));
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xfer.bo_handle = mapping->vma->handle;
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xfer.box.x = mapping->rect.x;
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xfer.box.y = mapping->rect.y;
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xfer.box.w = mapping->rect.width;
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xfer.box.h = mapping->rect.height;
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xfer.box.d = 1;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST, &xfer);
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if (ret) {
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drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST failed with %s\n", strerror(errno));
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return ret;
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}
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return 0;
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}
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static uint32_t virtio_gpu_resolve_format(uint32_t format, uint64_t use_flags)
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{
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switch (format) {
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case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
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/*HACK: See b/28671744 */
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return DRM_FORMAT_XBGR8888;
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case DRM_FORMAT_FLEX_YCbCr_420_888:
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return DRM_FORMAT_YVU420;
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default:
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return format;
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}
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}
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const struct backend backend_virtio_gpu = {
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.name = "virtio_gpu",
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.init = virtio_gpu_init,
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.close = virtio_gpu_close,
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.bo_create = virtio_gpu_bo_create,
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.bo_destroy = virtio_gpu_bo_destroy,
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.bo_import = drv_prime_bo_import,
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.bo_map = virtio_gpu_bo_map,
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.bo_unmap = drv_bo_munmap,
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.bo_invalidate = virtio_gpu_bo_invalidate,
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.bo_flush = virtio_gpu_bo_flush,
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.resolve_format = virtio_gpu_resolve_format,
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};
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