; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; PR1738
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define i1 @test1(double %X, double %Y) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double %Y, %X
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%tmp9 = fcmp ord double %X, 0.000000e+00
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%tmp13 = fcmp ord double %Y, 0.000000e+00
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%bothcond = and i1 %tmp13, %tmp9
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ret i1 %bothcond
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}
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define i1 @test2(i1 %X, i1 %Y) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[B:%.*]] = and i1 %X, %Y
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; CHECK-NEXT: ret i1 [[B]]
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;
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%a = and i1 %X, %Y
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%b = and i1 %a, %X
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ret i1 %b
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}
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define i32 @test3(i32 %X, i32 %Y) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[B:%.*]] = and i32 %X, %Y
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; CHECK-NEXT: ret i32 [[B]]
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;
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%a = and i32 %X, %Y
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%b = and i32 %Y, %a
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ret i32 %b
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}
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; Make sure we don't go into an infinite loop with this test
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define <4 x i32> @test5(<4 x i32> %A) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <4 x i32> %A, <i32 1, i32 2, i32 3, i32 4>
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; CHECK-NEXT: [[TMP2:%.*]] = and <4 x i32> [[TMP1]], <i32 1, i32 2, i32 3, i32 4>
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; CHECK-NEXT: ret <4 x i32> [[TMP2]]
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;
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%1 = xor <4 x i32> %A, <i32 1, i32 2, i32 3, i32 4>
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%2 = and <4 x i32> <i32 1, i32 2, i32 3, i32 4>, %1
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ret <4 x i32> %2
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}
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; Check that we combine "if x!=0 && x!=-1" into "if x+1u>1"
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define i32 @test6(i64 %x) nounwind {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: [[X_OFF:%.*]] = add i64 %x, 1
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; CHECK-NEXT: [[X_CMP:%.*]] = icmp ugt i64 [[X_OFF]], 1
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; CHECK-NEXT: [[LAND_EXT:%.*]] = zext i1 [[X_CMP]] to i32
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; CHECK-NEXT: ret i32 [[LAND_EXT]]
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;
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%cmp1 = icmp ne i64 %x, -1
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%not.cmp = icmp ne i64 %x, 0
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%.cmp1 = and i1 %cmp1, %not.cmp
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%land.ext = zext i1 %.cmp1 to i32
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ret i32 %land.ext
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}
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define i1 @test7(i32 %i, i1 %b) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 %i, 0
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; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], %b
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%cmp1 = icmp slt i32 %i, 1
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%cmp2 = icmp sgt i32 %i, -1
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%and1 = and i1 %cmp1, %b
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%and2 = and i1 %and1, %cmp2
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ret i1 %and2
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}
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define i1 @test8(i32 %i) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: [[I_OFF:%.*]] = add i32 %i, -1
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[I_OFF]], 13
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%cmp1 = icmp ne i32 %i, 0
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%cmp2 = icmp ult i32 %i, 14
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%cond = and i1 %cmp1, %cmp2
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ret i1 %cond
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}
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; combine -x & 1 into x & 1
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define i64 @test9(i64 %x) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: [[AND:%.*]] = and i64 %x, 1
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; CHECK-NEXT: ret i64 [[AND]]
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;
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%sub = sub nsw i64 0, %x
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%and = and i64 %sub, 1
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ret i64 %and
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}
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define i64 @test10(i64 %x) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: [[AND:%.*]] = and i64 %x, 1
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; CHECK-NEXT: [[ADD:%.*]] = sub i64 [[AND]], %x
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; CHECK-NEXT: ret i64 [[ADD]]
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;
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%sub = sub nsw i64 0, %x
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%and = and i64 %sub, 1
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%add = add i64 %sub, %and
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ret i64 %add
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}
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