// Copyright 2013 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#include "src/api.h"
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#include "src/arm64/assembler-arm64-inl.h"
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#include "src/arm64/macro-assembler-arm64-inl.h"
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#include "src/deoptimizer.h"
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#include "src/frame-constants.h"
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#include "src/register-configuration.h"
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#include "src/safepoint-table.h"
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namespace v8 {
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namespace internal {
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#define __ masm()->
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namespace {
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void CopyRegListToFrame(MacroAssembler* masm, const Register& dst,
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int dst_offset, const CPURegList& reg_list,
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const Register& temp0, const Register& temp1,
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int src_offset = 0) {
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DCHECK_EQ(reg_list.Count() % 2, 0);
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UseScratchRegisterScope temps(masm);
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CPURegList copy_to_input = reg_list;
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int reg_size = reg_list.RegisterSizeInBytes();
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DCHECK_EQ(temp0.SizeInBytes(), reg_size);
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DCHECK_EQ(temp1.SizeInBytes(), reg_size);
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// Compute some temporary addresses to avoid having the macro assembler set
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// up a temp with an offset for accesses out of the range of the addressing
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// mode.
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Register src = temps.AcquireX();
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masm->Add(src, sp, src_offset);
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masm->Add(dst, dst, dst_offset);
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// Write reg_list into the frame pointed to by dst.
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for (int i = 0; i < reg_list.Count(); i += 2) {
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masm->Ldp(temp0, temp1, MemOperand(src, i * reg_size));
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CPURegister reg0 = copy_to_input.PopLowestIndex();
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CPURegister reg1 = copy_to_input.PopLowestIndex();
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int offset0 = reg0.code() * reg_size;
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int offset1 = reg1.code() * reg_size;
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// Pair up adjacent stores, otherwise write them separately.
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if (offset1 == offset0 + reg_size) {
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masm->Stp(temp0, temp1, MemOperand(dst, offset0));
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} else {
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masm->Str(temp0, MemOperand(dst, offset0));
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masm->Str(temp1, MemOperand(dst, offset1));
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}
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}
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masm->Sub(dst, dst, dst_offset);
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}
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void RestoreRegList(MacroAssembler* masm, const CPURegList& reg_list,
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const Register& src_base, int src_offset) {
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DCHECK_EQ(reg_list.Count() % 2, 0);
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UseScratchRegisterScope temps(masm);
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CPURegList restore_list = reg_list;
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int reg_size = restore_list.RegisterSizeInBytes();
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// Compute a temporary addresses to avoid having the macro assembler set
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// up a temp with an offset for accesses out of the range of the addressing
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// mode.
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Register src = temps.AcquireX();
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masm->Add(src, src_base, src_offset);
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// Restore every register in restore_list from src.
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while (!restore_list.IsEmpty()) {
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CPURegister reg0 = restore_list.PopLowestIndex();
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CPURegister reg1 = restore_list.PopLowestIndex();
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int offset0 = reg0.code() * reg_size;
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int offset1 = reg1.code() * reg_size;
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// Pair up adjacent loads, otherwise read them separately.
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if (offset1 == offset0 + reg_size) {
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masm->Ldp(reg0, reg1, MemOperand(src, offset0));
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} else {
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masm->Ldr(reg0, MemOperand(src, offset0));
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masm->Ldr(reg1, MemOperand(src, offset1));
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}
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}
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}
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} // namespace
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void Deoptimizer::TableEntryGenerator::Generate() {
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GeneratePrologue();
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// TODO(all): This code needs to be revisited. We probably only need to save
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// caller-saved registers here. Callee-saved registers can be stored directly
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// in the input frame.
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// Save all allocatable double registers.
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CPURegList saved_double_registers(
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CPURegister::kVRegister, kDRegSizeInBits,
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RegisterConfiguration::Default()->allocatable_double_codes_mask());
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DCHECK_EQ(saved_double_registers.Count() % 2, 0);
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__ PushCPURegList(saved_double_registers);
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CPURegList saved_float_registers(
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CPURegister::kVRegister, kSRegSizeInBits,
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RegisterConfiguration::Default()->allocatable_float_codes_mask());
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DCHECK_EQ(saved_float_registers.Count() % 4, 0);
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__ PushCPURegList(saved_float_registers);
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// We save all the registers except sp, lr and the masm scratches.
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CPURegList saved_registers(CPURegister::kRegister, kXRegSizeInBits, 0, 28);
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saved_registers.Remove(ip0);
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saved_registers.Remove(ip1);
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saved_registers.Combine(fp);
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DCHECK_EQ(saved_registers.Count() % 2, 0);
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__ PushCPURegList(saved_registers);
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__ Mov(x3, Operand(ExternalReference::Create(
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IsolateAddressId::kCEntryFPAddress, isolate())));
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__ Str(fp, MemOperand(x3));
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const int kSavedRegistersAreaSize =
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(saved_registers.Count() * kXRegSize) +
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(saved_double_registers.Count() * kDRegSize) +
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(saved_float_registers.Count() * kSRegSize);
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// Floating point registers are saved on the stack above core registers.
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const int kFloatRegistersOffset = saved_registers.Count() * kXRegSize;
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const int kDoubleRegistersOffset =
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kFloatRegistersOffset + saved_float_registers.Count() * kSRegSize;
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// Get the bailout id from the stack.
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Register bailout_id = x2;
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__ Peek(bailout_id, kSavedRegistersAreaSize);
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Register code_object = x3;
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Register fp_to_sp = x4;
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// Get the address of the location in the code object. This is the return
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// address for lazy deoptimization.
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__ Mov(code_object, lr);
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// Compute the fp-to-sp delta, adding two words for alignment padding and
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// bailout id.
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__ Add(fp_to_sp, sp, kSavedRegistersAreaSize + (2 * kPointerSize));
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__ Sub(fp_to_sp, fp, fp_to_sp);
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// Allocate a new deoptimizer object.
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__ Ldr(x1, MemOperand(fp, CommonFrameConstants::kContextOrFrameTypeOffset));
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// Ensure we can safely load from below fp.
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DCHECK_GT(kSavedRegistersAreaSize,
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-JavaScriptFrameConstants::kFunctionOffset);
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__ Ldr(x0, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
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// If x1 is a smi, zero x0.
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__ Tst(x1, kSmiTagMask);
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__ CzeroX(x0, eq);
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__ Mov(x1, static_cast<int>(deopt_kind()));
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// Following arguments are already loaded:
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// - x2: bailout id
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// - x3: code object address
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// - x4: fp-to-sp delta
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__ Mov(x5, ExternalReference::isolate_address(isolate()));
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{
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// Call Deoptimizer::New().
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AllowExternalCallThatCantCauseGC scope(masm());
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__ CallCFunction(ExternalReference::new_deoptimizer_function(), 6);
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}
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// Preserve "deoptimizer" object in register x0.
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Register deoptimizer = x0;
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// Get the input frame descriptor pointer.
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__ Ldr(x1, MemOperand(deoptimizer, Deoptimizer::input_offset()));
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// Copy core registers into the input frame.
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CopyRegListToFrame(masm(), x1, FrameDescription::registers_offset(),
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saved_registers, x2, x3);
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// Copy double registers to the input frame.
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CopyRegListToFrame(masm(), x1, FrameDescription::double_registers_offset(),
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saved_double_registers, x2, x3, kDoubleRegistersOffset);
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// Copy float registers to the input frame.
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// TODO(arm): these are the lower 32-bits of the double registers stored
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// above, so we shouldn't need to store them again.
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CopyRegListToFrame(masm(), x1, FrameDescription::float_registers_offset(),
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saved_float_registers, w2, w3, kFloatRegistersOffset);
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// Remove the padding, bailout id and the saved registers from the stack.
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DCHECK_EQ(kSavedRegistersAreaSize % kXRegSize, 0);
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__ Drop(2 + (kSavedRegistersAreaSize / kXRegSize));
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// Compute a pointer to the unwinding limit in register x2; that is
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// the first stack slot not part of the input frame.
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Register unwind_limit = x2;
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__ Ldr(unwind_limit, MemOperand(x1, FrameDescription::frame_size_offset()));
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// Unwind the stack down to - but not including - the unwinding
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// limit and copy the contents of the activation frame to the input
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// frame description.
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__ Add(x3, x1, FrameDescription::frame_content_offset());
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__ SlotAddress(x1, 0);
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__ Lsr(unwind_limit, unwind_limit, kPointerSizeLog2);
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__ Mov(x5, unwind_limit);
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__ CopyDoubleWords(x3, x1, x5);
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__ Drop(unwind_limit);
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// Compute the output frame in the deoptimizer.
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__ Push(padreg, x0); // Preserve deoptimizer object across call.
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{
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// Call Deoptimizer::ComputeOutputFrames().
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AllowExternalCallThatCantCauseGC scope(masm());
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__ CallCFunction(ExternalReference::compute_output_frames_function(), 1);
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}
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__ Pop(x4, padreg); // Restore deoptimizer object (class Deoptimizer).
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{
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UseScratchRegisterScope temps(masm());
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Register scratch = temps.AcquireX();
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__ Ldr(scratch, MemOperand(x4, Deoptimizer::caller_frame_top_offset()));
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__ Mov(sp, scratch);
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}
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// Replace the current (input) frame with the output frames.
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Label outer_push_loop, inner_push_loop,
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outer_loop_header, inner_loop_header;
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__ Ldrsw(x1, MemOperand(x4, Deoptimizer::output_count_offset()));
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__ Ldr(x0, MemOperand(x4, Deoptimizer::output_offset()));
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__ Add(x1, x0, Operand(x1, LSL, kPointerSizeLog2));
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__ B(&outer_loop_header);
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__ Bind(&outer_push_loop);
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Register current_frame = x2;
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Register frame_size = x3;
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__ Ldr(current_frame, MemOperand(x0, kPointerSize, PostIndex));
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__ Ldr(x3, MemOperand(current_frame, FrameDescription::frame_size_offset()));
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__ Lsr(frame_size, x3, kPointerSizeLog2);
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__ Claim(frame_size);
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__ Add(x7, current_frame, FrameDescription::frame_content_offset());
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__ SlotAddress(x6, 0);
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__ CopyDoubleWords(x6, x7, frame_size);
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__ Bind(&outer_loop_header);
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__ Cmp(x0, x1);
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__ B(lt, &outer_push_loop);
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__ Ldr(x1, MemOperand(x4, Deoptimizer::input_offset()));
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RestoreRegList(masm(), saved_double_registers, x1,
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FrameDescription::double_registers_offset());
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// TODO(all): ARM copies a lot (if not all) of the last output frame onto the
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// stack, then pops it all into registers. Here, we try to load it directly
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// into the relevant registers. Is this correct? If so, we should improve the
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// ARM code.
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// Restore registers from the last output frame.
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// Note that lr is not in the list of saved_registers and will be restored
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// later. We can use it to hold the address of last output frame while
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// reloading the other registers.
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DCHECK(!saved_registers.IncludesAliasOf(lr));
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Register last_output_frame = lr;
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__ Mov(last_output_frame, current_frame);
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RestoreRegList(masm(), saved_registers, last_output_frame,
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FrameDescription::registers_offset());
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Register continuation = x7;
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__ Ldr(continuation, MemOperand(last_output_frame,
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FrameDescription::continuation_offset()));
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__ Ldr(lr, MemOperand(last_output_frame, FrameDescription::pc_offset()));
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__ InitializeRootRegister();
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__ Br(continuation);
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}
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// Size of an entry of the second level deopt table. Since we do not generate
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// a table for ARM64, the size is zero.
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const int Deoptimizer::table_entry_size_ = 0 * kInstrSize;
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void Deoptimizer::TableEntryGenerator::GeneratePrologue() {
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UseScratchRegisterScope temps(masm());
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// The MacroAssembler will have put the deoptimization id in x16, the first
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// temp register allocated. We can't assert that the id is in there, but we
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// can check that x16 the first allocated temp and that the value it contains
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// is in the expected range.
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Register entry_id = temps.AcquireX();
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DCHECK(entry_id.Is(x16));
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__ Push(padreg, entry_id);
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if (__ emit_debug_code()) {
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// Ensure the entry_id looks sensible, ie. 0 <= entry_id < count().
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__ Cmp(entry_id, count());
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__ Check(lo, AbortReason::kOffsetOutOfRange);
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}
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}
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bool Deoptimizer::PadTopOfStackRegister() { return true; }
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void FrameDescription::SetCallerPc(unsigned offset, intptr_t value) {
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SetFrameSlot(offset, value);
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}
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void FrameDescription::SetCallerFp(unsigned offset, intptr_t value) {
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SetFrameSlot(offset, value);
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}
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void FrameDescription::SetCallerConstantPool(unsigned offset, intptr_t value) {
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// No embedded constant pool support.
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UNREACHABLE();
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}
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#undef __
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} // namespace internal
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} // namespace v8
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