/* Copyright (c) 2018, Google Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
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* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
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#include <openssl/cpu.h>
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#if defined(OPENSSL_AARCH64) && defined(OPENSSL_FUCHSIA) && \
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!defined(OPENSSL_STATIC_ARMCAP)
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#include <zircon/features.h>
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#include <zircon/syscalls.h>
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#include <zircon/types.h>
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#include <openssl/arm_arch.h>
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#include "internal.h"
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extern uint32_t OPENSSL_armcap_P;
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void OPENSSL_cpuid_setup(void) {
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uint32_t hwcap;
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zx_status_t rc = zx_system_get_features(ZX_FEATURE_KIND_CPU, &hwcap);
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if (rc != ZX_OK || (hwcap & ZX_ARM64_FEATURE_ISA_ASIMD) == 0) {
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// Matching OpenSSL, if NEON/ASIMD is missing, don't report other features
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// either.
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return;
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}
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OPENSSL_armcap_P |= ARMV7_NEON;
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if (hwcap & ZX_ARM64_FEATURE_ISA_AES) {
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OPENSSL_armcap_P |= ARMV8_AES;
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}
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if (hwcap & ZX_ARM64_FEATURE_ISA_PMULL) {
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OPENSSL_armcap_P |= ARMV8_PMULL;
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}
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if (hwcap & ZX_ARM64_FEATURE_ISA_SHA1) {
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OPENSSL_armcap_P |= ARMV8_SHA1;
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}
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if (hwcap & ZX_ARM64_FEATURE_ISA_SHA2) {
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OPENSSL_armcap_P |= ARMV8_SHA256;
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}
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}
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#endif // OPENSSL_AARCH64 && !OPENSSL_STATIC_ARMCAP
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