/*
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* Copyright (C) 2011 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef ART_LIBARTBASE_ARCH_INSTRUCTION_SET_H_
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#define ART_LIBARTBASE_ARCH_INSTRUCTION_SET_H_
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#include <iosfwd>
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#include <string>
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#include "base/enums.h"
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#include "base/macros.h"
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namespace art {
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enum class InstructionSet {
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kNone,
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kArm,
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kArm64,
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kThumb2,
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kX86,
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kX86_64,
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kMips,
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kMips64,
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kLast = kMips64
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};
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std::ostream& operator<<(std::ostream& os, const InstructionSet& rhs);
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#if defined(__arm__)
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static constexpr InstructionSet kRuntimeISA = InstructionSet::kArm;
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#elif defined(__aarch64__)
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static constexpr InstructionSet kRuntimeISA = InstructionSet::kArm64;
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#elif defined(__mips__) && !defined(__LP64__)
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static constexpr InstructionSet kRuntimeISA = InstructionSet::kMips;
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#elif defined(__mips__) && defined(__LP64__)
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static constexpr InstructionSet kRuntimeISA = InstructionSet::kMips64;
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#elif defined(__i386__)
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static constexpr InstructionSet kRuntimeISA = InstructionSet::kX86;
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#elif defined(__x86_64__)
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static constexpr InstructionSet kRuntimeISA = InstructionSet::kX86_64;
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#else
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static constexpr InstructionSet kRuntimeISA = InstructionSet::kNone;
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#endif
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// Architecture-specific pointer sizes
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static constexpr PointerSize kArmPointerSize = PointerSize::k32;
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static constexpr PointerSize kArm64PointerSize = PointerSize::k64;
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static constexpr PointerSize kMipsPointerSize = PointerSize::k32;
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static constexpr PointerSize kMips64PointerSize = PointerSize::k64;
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static constexpr PointerSize kX86PointerSize = PointerSize::k32;
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static constexpr PointerSize kX86_64PointerSize = PointerSize::k64;
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// ARM instruction alignment. ARM processors require code to be 4-byte aligned,
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// but ARM ELF requires 8..
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static constexpr size_t kArmAlignment = 8;
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// ARM64 instruction alignment. This is the recommended alignment for maximum performance.
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static constexpr size_t kArm64Alignment = 16;
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// MIPS instruction alignment. MIPS processors require code to be 4-byte aligned,
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// but 64-bit literals must be 8-byte aligned.
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static constexpr size_t kMipsAlignment = 8;
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// X86 instruction alignment. This is the recommended alignment for maximum performance.
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static constexpr size_t kX86Alignment = 16;
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// Different than code alignment since code alignment is only first instruction of method.
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static constexpr size_t kThumb2InstructionAlignment = 2;
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static constexpr size_t kArm64InstructionAlignment = 4;
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static constexpr size_t kX86InstructionAlignment = 1;
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static constexpr size_t kX86_64InstructionAlignment = 1;
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static constexpr size_t kMipsInstructionAlignment = 4;
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static constexpr size_t kMips64InstructionAlignment = 4;
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const char* GetInstructionSetString(InstructionSet isa);
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// Note: Returns kNone when the string cannot be parsed to a known value.
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InstructionSet GetInstructionSetFromString(const char* instruction_set);
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// Fatal logging out of line to keep the header clean of logging.h.
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NO_RETURN void InstructionSetAbort(InstructionSet isa);
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constexpr PointerSize GetInstructionSetPointerSize(InstructionSet isa) {
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switch (isa) {
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case InstructionSet::kArm:
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// Fall-through.
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case InstructionSet::kThumb2:
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return kArmPointerSize;
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case InstructionSet::kArm64:
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return kArm64PointerSize;
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case InstructionSet::kX86:
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return kX86PointerSize;
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case InstructionSet::kX86_64:
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return kX86_64PointerSize;
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case InstructionSet::kMips:
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return kMipsPointerSize;
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case InstructionSet::kMips64:
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return kMips64PointerSize;
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case InstructionSet::kNone:
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break;
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}
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InstructionSetAbort(isa);
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}
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constexpr size_t GetInstructionSetInstructionAlignment(InstructionSet isa) {
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switch (isa) {
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case InstructionSet::kArm:
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// Fall-through.
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case InstructionSet::kThumb2:
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return kThumb2InstructionAlignment;
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case InstructionSet::kArm64:
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return kArm64InstructionAlignment;
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case InstructionSet::kX86:
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return kX86InstructionAlignment;
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case InstructionSet::kX86_64:
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return kX86_64InstructionAlignment;
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case InstructionSet::kMips:
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return kMipsInstructionAlignment;
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case InstructionSet::kMips64:
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return kMips64InstructionAlignment;
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case InstructionSet::kNone:
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break;
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}
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InstructionSetAbort(isa);
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}
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constexpr bool IsValidInstructionSet(InstructionSet isa) {
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switch (isa) {
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case InstructionSet::kArm:
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case InstructionSet::kThumb2:
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case InstructionSet::kArm64:
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case InstructionSet::kX86:
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case InstructionSet::kX86_64:
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case InstructionSet::kMips:
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case InstructionSet::kMips64:
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return true;
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case InstructionSet::kNone:
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return false;
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}
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return false;
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}
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size_t GetInstructionSetAlignment(InstructionSet isa);
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constexpr bool Is64BitInstructionSet(InstructionSet isa) {
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switch (isa) {
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case InstructionSet::kArm:
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case InstructionSet::kThumb2:
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case InstructionSet::kX86:
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case InstructionSet::kMips:
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return false;
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case InstructionSet::kArm64:
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case InstructionSet::kX86_64:
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case InstructionSet::kMips64:
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return true;
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case InstructionSet::kNone:
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break;
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}
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InstructionSetAbort(isa);
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}
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constexpr PointerSize InstructionSetPointerSize(InstructionSet isa) {
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return Is64BitInstructionSet(isa) ? PointerSize::k64 : PointerSize::k32;
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}
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constexpr size_t GetBytesPerGprSpillLocation(InstructionSet isa) {
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switch (isa) {
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case InstructionSet::kArm:
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// Fall-through.
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case InstructionSet::kThumb2:
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return 4;
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case InstructionSet::kArm64:
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return 8;
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case InstructionSet::kX86:
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return 4;
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case InstructionSet::kX86_64:
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return 8;
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case InstructionSet::kMips:
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return 4;
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case InstructionSet::kMips64:
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return 8;
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case InstructionSet::kNone:
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break;
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}
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InstructionSetAbort(isa);
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}
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constexpr size_t GetBytesPerFprSpillLocation(InstructionSet isa) {
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switch (isa) {
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case InstructionSet::kArm:
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// Fall-through.
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case InstructionSet::kThumb2:
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return 4;
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case InstructionSet::kArm64:
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return 8;
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case InstructionSet::kX86:
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return 8;
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case InstructionSet::kX86_64:
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return 8;
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case InstructionSet::kMips:
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return 4;
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case InstructionSet::kMips64:
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return 8;
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case InstructionSet::kNone:
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break;
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}
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InstructionSetAbort(isa);
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}
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namespace instruction_set_details {
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#if !defined(ART_STACK_OVERFLOW_GAP_arm) || !defined(ART_STACK_OVERFLOW_GAP_arm64) || \
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!defined(ART_STACK_OVERFLOW_GAP_mips) || !defined(ART_STACK_OVERFLOW_GAP_mips64) || \
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!defined(ART_STACK_OVERFLOW_GAP_x86) || !defined(ART_STACK_OVERFLOW_GAP_x86_64)
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#error "Missing defines for stack overflow gap"
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#endif
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static constexpr size_t kArmStackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_arm;
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static constexpr size_t kArm64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_arm64;
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static constexpr size_t kMipsStackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_mips;
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static constexpr size_t kMips64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_mips64;
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static constexpr size_t kX86StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_x86;
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static constexpr size_t kX86_64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_x86_64;
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NO_RETURN void GetStackOverflowReservedBytesFailure(const char* error_msg);
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} // namespace instruction_set_details
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ALWAYS_INLINE
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constexpr size_t GetStackOverflowReservedBytes(InstructionSet isa) {
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switch (isa) {
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case InstructionSet::kArm: // Intentional fall-through.
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case InstructionSet::kThumb2:
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return instruction_set_details::kArmStackOverflowReservedBytes;
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case InstructionSet::kArm64:
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return instruction_set_details::kArm64StackOverflowReservedBytes;
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case InstructionSet::kMips:
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return instruction_set_details::kMipsStackOverflowReservedBytes;
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case InstructionSet::kMips64:
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return instruction_set_details::kMips64StackOverflowReservedBytes;
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case InstructionSet::kX86:
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return instruction_set_details::kX86StackOverflowReservedBytes;
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case InstructionSet::kX86_64:
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return instruction_set_details::kX86_64StackOverflowReservedBytes;
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case InstructionSet::kNone:
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instruction_set_details::GetStackOverflowReservedBytesFailure(
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"kNone has no stack overflow size");
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}
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instruction_set_details::GetStackOverflowReservedBytesFailure("Unknown instruction set");
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}
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// The following definitions create return types for two word-sized entities that will be passed
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// in registers so that memory operations for the interface trampolines can be avoided. The entities
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// are the resolved method and the pointer to the code to be invoked.
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//
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// On x86, ARM32 and MIPS, this is given for a *scalar* 64bit value. The definition thus *must* be
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// uint64_t or long long int.
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//
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// On x86_64, ARM64 and MIPS64, structs are decomposed for allocation, so we can create a structs of
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// two size_t-sized values.
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//
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// We need two operations:
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//
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// 1) A flag value that signals failure. The assembly stubs expect the lower part to be "0".
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// GetTwoWordFailureValue() will return a value that has lower part == 0.
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//
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// 2) A value that combines two word-sized values.
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// GetTwoWordSuccessValue() constructs this.
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//
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// IMPORTANT: If you use this to transfer object pointers, it is your responsibility to ensure
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// that the object does not move or the value is updated. Simple use of this is NOT SAFE
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// when the garbage collector can move objects concurrently. Ensure that required locks
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// are held when using!
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#if defined(__i386__) || defined(__arm__) || (defined(__mips__) && !defined(__LP64__))
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typedef uint64_t TwoWordReturn;
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// Encodes method_ptr==nullptr and code_ptr==nullptr
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static inline constexpr TwoWordReturn GetTwoWordFailureValue() {
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return 0;
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}
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// Use the lower 32b for the method pointer and the upper 32b for the code pointer.
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static inline constexpr TwoWordReturn GetTwoWordSuccessValue(uintptr_t hi, uintptr_t lo) {
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static_assert(sizeof(uint32_t) == sizeof(uintptr_t), "Unexpected size difference");
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uint32_t lo32 = lo;
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uint64_t hi64 = static_cast<uint64_t>(hi);
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return ((hi64 << 32) | lo32);
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}
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#elif defined(__x86_64__) || defined(__aarch64__) || (defined(__mips__) && defined(__LP64__))
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// Note: TwoWordReturn can't be constexpr for 64-bit targets. We'd need a constexpr constructor,
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// which would violate C-linkage in the entrypoint functions.
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struct TwoWordReturn {
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uintptr_t lo;
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uintptr_t hi;
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};
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// Encodes method_ptr==nullptr. Leaves random value in code pointer.
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static inline TwoWordReturn GetTwoWordFailureValue() {
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TwoWordReturn ret;
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ret.lo = 0;
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return ret;
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}
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// Write values into their respective members.
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static inline TwoWordReturn GetTwoWordSuccessValue(uintptr_t hi, uintptr_t lo) {
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TwoWordReturn ret;
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ret.lo = lo;
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ret.hi = hi;
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return ret;
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}
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#else
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#error "Unsupported architecture"
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#endif
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} // namespace art
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#endif // ART_LIBARTBASE_ARCH_INSTRUCTION_SET_H_
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