/*
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* Copyright (C) 2015 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <memory>
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#include <vector>
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#include "arch/instruction_set.h"
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#include "base/arena_allocator.h"
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#include "base/enums.h"
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#include "base/malloc_arena_pool.h"
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#include "cfi_test.h"
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#include "gtest/gtest.h"
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#include "jni/quick/calling_convention.h"
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#include "read_barrier_config.h"
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#include "utils/assembler.h"
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#include "utils/jni_macro_assembler.h"
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#include "jni/jni_cfi_test_expected.inc"
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namespace art {
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// Run the tests only on host.
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#ifndef ART_TARGET_ANDROID
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class JNICFITest : public CFITest {
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public:
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// Enable this flag to generate the expected outputs.
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static constexpr bool kGenerateExpected = false;
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void TestImpl(InstructionSet isa,
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const char* isa_str,
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const std::vector<uint8_t>& expected_asm,
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const std::vector<uint8_t>& expected_cfi) {
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if (Is64BitInstructionSet(isa)) {
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TestImplSized<PointerSize::k64>(isa, isa_str, expected_asm, expected_cfi);
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} else {
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TestImplSized<PointerSize::k32>(isa, isa_str, expected_asm, expected_cfi);
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}
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}
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private:
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template <PointerSize kPointerSize>
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void TestImplSized(InstructionSet isa,
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const char* isa_str,
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const std::vector<uint8_t>& expected_asm,
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const std::vector<uint8_t>& expected_cfi) {
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// Description of simple method.
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const bool is_static = true;
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const bool is_synchronized = false;
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const char* shorty = "IIFII";
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MallocArenaPool pool;
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ArenaAllocator allocator(&pool);
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std::unique_ptr<JniCallingConvention> jni_conv(
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JniCallingConvention::Create(&allocator,
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is_static,
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is_synchronized,
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/*is_critical_native*/false,
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shorty,
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isa));
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std::unique_ptr<ManagedRuntimeCallingConvention> mr_conv(
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ManagedRuntimeCallingConvention::Create(
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&allocator, is_static, is_synchronized, shorty, isa));
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const int frame_size(jni_conv->FrameSize());
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ArrayRef<const ManagedRegister> callee_save_regs = jni_conv->CalleeSaveRegisters();
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// Assemble the method.
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std::unique_ptr<JNIMacroAssembler<kPointerSize>> jni_asm(
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JNIMacroAssembler<kPointerSize>::Create(&allocator, isa));
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jni_asm->cfi().SetEnabled(true);
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jni_asm->BuildFrame(frame_size, mr_conv->MethodRegister(),
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callee_save_regs, mr_conv->EntrySpills());
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jni_asm->IncreaseFrameSize(32);
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jni_asm->DecreaseFrameSize(32);
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jni_asm->RemoveFrame(frame_size, callee_save_regs, /* may_suspend= */ true);
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jni_asm->FinalizeCode();
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std::vector<uint8_t> actual_asm(jni_asm->CodeSize());
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MemoryRegion code(&actual_asm[0], actual_asm.size());
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jni_asm->FinalizeInstructions(code);
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ASSERT_EQ(jni_asm->cfi().GetCurrentCFAOffset(), frame_size);
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const std::vector<uint8_t>& actual_cfi = *(jni_asm->cfi().data());
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if (kGenerateExpected) {
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GenerateExpected(stdout,
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isa,
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isa_str,
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ArrayRef<const uint8_t>(actual_asm),
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ArrayRef<const uint8_t>(actual_cfi));
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} else {
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EXPECT_EQ(expected_asm, actual_asm);
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EXPECT_EQ(expected_cfi, actual_cfi);
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}
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}
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};
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#define TEST_ISA(isa) \
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TEST_F(JNICFITest, isa) { \
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std::vector<uint8_t> expected_asm(expected_asm_##isa, \
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expected_asm_##isa + arraysize(expected_asm_##isa)); \
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std::vector<uint8_t> expected_cfi(expected_cfi_##isa, \
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expected_cfi_##isa + arraysize(expected_cfi_##isa)); \
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TestImpl(InstructionSet::isa, #isa, expected_asm, expected_cfi); \
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}
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#ifdef ART_ENABLE_CODEGEN_arm
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// Run the tests for ARM only with Baker read barriers, as the
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// expected generated code contains a Marking Register refresh
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// instruction.
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#if defined(USE_READ_BARRIER) && defined(USE_BAKER_READ_BARRIER)
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TEST_ISA(kThumb2)
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#endif
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#endif
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#ifdef ART_ENABLE_CODEGEN_arm64
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// Run the tests for ARM64 only with Baker read barriers, as the
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// expected generated code contains a Marking Register refresh
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// instruction.
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#if defined(USE_READ_BARRIER) && defined(USE_BAKER_READ_BARRIER)
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TEST_ISA(kArm64)
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#endif
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#endif
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#ifdef ART_ENABLE_CODEGEN_x86
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TEST_ISA(kX86)
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#endif
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#ifdef ART_ENABLE_CODEGEN_x86_64
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TEST_ISA(kX86_64)
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#endif
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#ifdef ART_ENABLE_CODEGEN_mips
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TEST_ISA(kMips)
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#endif
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#ifdef ART_ENABLE_CODEGEN_mips64
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TEST_ISA(kMips64)
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#endif
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#endif // ART_TARGET_ANDROID
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} // namespace art
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