/*
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* Sunxi SD/MMC host driver
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*
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* Copyright (C) 2015 AllWinnertech Ltd.
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* Author: lixiang <lixiang@allwinnertech>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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|
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#include <linux/clk.h>
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#include <linux/clk/sunxi.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-mapping.h>
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#include <linux/slab.h>
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#include <linux/reset.h>
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#include <linux/of_address.h>
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#include <linux/of_gpio.h>
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#include <linux/of_platform.h>
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#include <linux/stat.h>
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#include <linux/mmc/host.h>
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#include "sunxi-mmc.h"
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#include "sunxi-mmc-debug.h"
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#include "sunxi-mmc-export.h"
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#include "sunxi-mmc-sun50iw1p1-2.h"
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#include "sunxi-mmc-panic.h"
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|
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#define GPIO_BASE_ADDR 0x1c20800
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/*nc platform no use these value*/
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#define CCMU_BASE_ADDR_BEFORE_V2P1H 0x1c20000
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#define SUNXI_MMC_MAX_HOST_PRT_ADDR 0x150
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#define SUNXI_MMC_MAX_GPIO_PRT_ADDR 0x120
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#define SUNXI_GPIOIC_PRT_EADDR 0x380
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#define SUNXI_GPIOIC_PRT_SADDR 0x200
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/*mmc bus clock gating register*/
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#define SUNXI_BCLKG_SADDR 0x60
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#define SUNXI_BCLKG_EADDR 0x80
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/*mmc moudule clock register*/
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#define SUNXI_CLK_PRT_SADDR 0x80
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#define SUNXI_CLK_PRT_EADDR 0xa0
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/*mmc bus soft reset register*/
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#define SUNXI_BSRES_SADDR 0x2C0
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#define SUNXI_BSRES_EADDR 0x2DC
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|
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/*NC mmc bus gating,reset,moudule clouck register*/
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#define SUNXI_NCCM_EADDR 0x850
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#define SUNXI_NCCM_SADDR 0x830
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/*NC mmc PLL PERI register*/
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#ifdef CONFIG_ARCH_SUN50IW11
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#define SUNXI_PP_NCM_SADDR 0x1010
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#define SUNXI_PP_NCM_EADDR 0x101C
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#else
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#define SUNXI_PP_NCM_EADDR 0x2C
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#define SUNXI_PP_NCM_SADDR 0x20
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#endif
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#define SUNXI_DEG_MAX_MAP_REG 0x900
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#define SUNXI_DEG_PRCM_MAP_REG 0x1100
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static struct device_attribute dump_register[3];
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void sunxi_mmc_dumphex32(struct sunxi_mmc_host *host, char *name, char *base,
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int len)
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{
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u32 i;
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pr_cont("dump %s registers:", name);
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for (i = 0; i < len; i += 4) {
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if (!(i&0xf))
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pr_cont("\n0x%p : ", base + i);
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pr_cont("0x%08x ", __raw_readl(base+i));
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}
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pr_cont("\n");
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}
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void sunxi_mmc_dump_des(struct sunxi_mmc_host *host, char *base, int len)
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{
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u32 i;
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pr_cont("dump des mem\n");
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for (i = 0; i < len; i += 4) {
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if (!(i&0xf))
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pr_cont("\n0x%p : ", base + i);
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pr_cont("0x%08x ", *(u32 *)(base+i));
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}
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pr_cont("\n");
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}
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static unsigned int sunxi_mmc_get_rate(uint64_t bytes, uint64_t time_us)
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{
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uint64_t ns;
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ns = time_us * 1000;
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bytes *= 1000000000;
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while (ns > UINT_MAX) {
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bytes >>= 1;
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ns >>= 1;
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}
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if (!ns)
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return 0;
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do_div(bytes, (uint32_t)ns);
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return bytes;
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}
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static void sunxi_mmc_filter_rate(struct sunxi_mmc_host *host, struct mmc_data *data, int64_t bytes, uint64_t time_us)
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{
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unsigned int rate = 0;
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if (!(host->filter_sector)
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|| !(host->filter_speed))
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return;
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if ((data->blocks) >= (host->filter_sector)) {
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rate = sunxi_mmc_get_rate(bytes, time_us);
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if (rate < (host->filter_speed))
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printk("c=%u,a=0x%8x,""bs=%5u,""t=%9lluus,""sp=%7uKB/s\n",
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data->mrq->cmd->opcode, data->mrq->cmd->arg,
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data->blocks, time_us, rate/1024);
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}
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}
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static ssize_t maual_insert_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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int ret;
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ret =
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snprintf(buf, PAGE_SIZE,
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"Usage: \"echo 1 > insert\" to scan card\n");
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return ret;
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}
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static ssize_t maual_insert_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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int ret;
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unsigned long insert = 0;
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struct platform_device *pdev = to_platform_device(dev);
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struct mmc_host *mmc = platform_get_drvdata(pdev);
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ret = kstrtoul(buf, 0, &insert);
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if (ret) {
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ret = -EINVAL;
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return ret;
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}
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dev_info(dev, "insert %ld\n", insert);
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if (insert)
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mmc_detect_change(mmc, 0);
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else
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dev_info(dev, "no detect change\n");
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ret = count;
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return ret;
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}
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int sunxi_mmc_res_start_addr(const char * const res_str,
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resource_size_t *res_addr, int index)
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{
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struct device_node *np = NULL;
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int ret = 0;
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struct resource res;
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if (res_str == NULL || res_addr == NULL) {
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pr_err("input arg is error\n");
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return -EINVAL;
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}
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np = of_find_node_by_type(NULL, res_str);
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if (IS_ERR(np)) {
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pr_err("Can not find device type\n");
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return -EINVAL;
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}
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ret = of_address_to_resource(np, index, &res);
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if (ret || !res.start) {
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pr_err("Can not find resouce\n");
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return -EINVAL;
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}
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*res_addr = res.start;
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return 0;
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}
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void sunxi_dump_reg(struct mmc_host *mmc)
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{
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int i = 0;
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struct sunxi_mmc_host *host = mmc_priv(mmc);
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int ret = 0;
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void __iomem *gpio_ptr = NULL;
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void __iomem *ccmu_ptr = NULL;
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#ifdef CONFIG_ARCH_SUN50IW11
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void __iomem *pll_ptr = NULL;
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resource_size_t res_saddr_pll;
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#endif
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resource_size_t res_saddr_ccmu;
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resource_size_t res_saddr_gpio;
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ret = sunxi_mmc_res_start_addr("clocks", &res_saddr_ccmu, 0);
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if (ret < 0)
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return;
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ccmu_ptr = ioremap(res_saddr_ccmu, SUNXI_DEG_MAX_MAP_REG);
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if (ccmu_ptr == NULL) {
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pr_err("Can not map ccmu resource\n");
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return;
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}
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#ifdef CONFIG_ARCH_SUN50IW11
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ret = sunxi_mmc_res_start_addr("clocks", &res_saddr_pll, 1);
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if (ret < 0)
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return;
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pll_ptr = ioremap(res_saddr_pll, SUNXI_DEG_MAX_MAP_REG);
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if (pll_ptr == NULL) {
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pr_err("Can not map pll resource\n");
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return;
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}
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#endif
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ret = sunxi_mmc_res_start_addr("pio", &res_saddr_gpio, 0);
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if (ret < 0)
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return;
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gpio_ptr = ioremap(res_saddr_gpio, SUNXI_DEG_PRCM_MAP_REG);
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if (gpio_ptr == NULL) {
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pr_err("Can not map gpio resource\n");
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return;
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}
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pr_cont("Dump %s (p%x) regs :\n", mmc_hostname(mmc), host->phy_index);
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for (i = 0; i < SUNXI_MMC_MAX_HOST_PRT_ADDR; i += 4) {
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if (!(i&0xf))
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pr_cont("\n0x%p : ", (host->reg_base + i));
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pr_cont("%08x ", readl(host->reg_base + i));
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}
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pr_cont("\n");
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pr_cont("Dump gpio regs:\n");
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for (i = 0; i < SUNXI_MMC_MAX_GPIO_PRT_ADDR; i += 4) {
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if (!(i&0xf))
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pr_cont("\n0x%p : ", (gpio_ptr + i));
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pr_cont("%08x ", readl(gpio_ptr + i));
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}
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pr_cont("\n");
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pr_cont("Dump gpio irqc regs:\n");
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for (i = SUNXI_GPIOIC_PRT_SADDR; i < SUNXI_GPIOIC_PRT_EADDR; i += 4) {
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if (!(i&0xf))
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pr_cont("\n0x%p : ", (gpio_ptr + i));
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pr_cont("%08x ", readl(gpio_ptr + i));
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}
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pr_cont("\n");
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if (res_saddr_ccmu == CCMU_BASE_ADDR_BEFORE_V2P1H) {
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pr_cont("Dump ccmu regs:gating\n");
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for (i = SUNXI_BCLKG_SADDR; i < SUNXI_BCLKG_EADDR; i += 4) {
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if (!(i&0xf))
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pr_cont("\n0x%p : ", (ccmu_ptr + i));
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pr_cont("%08x ", readl(ccmu_ptr + i));
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}
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pr_cont("\n");
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pr_cont("Dump ccmu regs:module clk\n");
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for (i = SUNXI_CLK_PRT_SADDR; i < SUNXI_CLK_PRT_EADDR; i += 4) {
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if (!(i&0xf))
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pr_cont("\n0x%p : ", (ccmu_ptr + i));
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pr_cont("%08x ", readl(ccmu_ptr + i));
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}
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pr_cont("\n");
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pr_cont("Dump ccmu regs:reset\n");
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for (i = SUNXI_BSRES_SADDR; i < SUNXI_BSRES_EADDR; i += 4) {
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if (!(i&0xf))
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pr_cont("\n0x%p : ", (ccmu_ptr + i));
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pr_cont("%08x ", readl(ccmu_ptr + i));
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}
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pr_cont("\n");
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} else {
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pr_cont("Dump ccmu regs:pll,gating,reset,module clk\n");
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#ifdef CONFIG_ARCH_SUN50IW11
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for (i = SUNXI_PP_NCM_SADDR; i < SUNXI_PP_NCM_EADDR; i += 4) {
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if (!(i&0xf))
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pr_cont("\n0x%p : ", (pll_ptr + i));
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pr_cont("%08x ", readl(pll_ptr + i));
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}
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pr_cont("\n");
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#else
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for (i = SUNXI_PP_NCM_SADDR; i < SUNXI_PP_NCM_EADDR; i += 4) {
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if (!(i&0xf))
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pr_cont("\n0x%p : ", (ccmu_ptr + i));
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pr_cont("%08x ", readl(ccmu_ptr + i));
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}
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pr_cont("\n");
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#endif
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for (i = SUNXI_NCCM_SADDR; i < SUNXI_NCCM_EADDR; i += 4) {
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if (!(i&0xf))
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pr_cont("\n0x%p : ", (ccmu_ptr + i));
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pr_cont("%08x ", readl(ccmu_ptr + i));
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}
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pr_cont("\n");
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}
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iounmap(gpio_ptr);
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iounmap(ccmu_ptr);
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#ifdef CONFIG_ARCH_SUN50IW11
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iounmap(pll_ptr);
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#endif
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}
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static ssize_t dump_host_reg_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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char *p = buf;
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int i = 0;
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struct platform_device *pdev = to_platform_device(dev);
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struct mmc_host *mmc = platform_get_drvdata(pdev);
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struct sunxi_mmc_host *host = mmc_priv(mmc);
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p += sprintf(p, "Dump sdmmc regs:\n");
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for (i = 0; i < SUNXI_MMC_MAX_HOST_PRT_ADDR; i += 4) {
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if (!(i&0xf))
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p += sprintf(p, "\n0x%p : ", (host->reg_base + i));
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p += sprintf(p, "%08x ", readl(host->reg_base + i));
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}
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p += sprintf(p, "\n");
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return p - buf;
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}
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static ssize_t dump_gpio_reg_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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char *p = buf;
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int i = 0;
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void __iomem *gpio_ptr = NULL;
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resource_size_t res_saddr_gpio;
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int ret = 0;
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ret = sunxi_mmc_res_start_addr("pio", &res_saddr_gpio, 0);
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if (ret < 0)
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goto out;
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gpio_ptr = ioremap(res_saddr_gpio, SUNXI_DEG_MAX_MAP_REG);
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if (!gpio_ptr) {
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pr_err("Can not map gpio resource\n");
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goto out;
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}
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p += sprintf(p, "Dump gpio regs:\n");
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for (i = 0; i < SUNXI_MMC_MAX_GPIO_PRT_ADDR; i += 4) {
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if (!(i&0xf))
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p += sprintf(p, "\n0x%p : ", (gpio_ptr + i));
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p += sprintf(p, "%08x ", readl(gpio_ptr + i));
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}
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p += sprintf(p, "\n");
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p += sprintf(p, "Dump gpio irqc regs:\n");
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for (i = SUNXI_GPIOIC_PRT_SADDR; i < SUNXI_GPIOIC_PRT_EADDR; i += 4) {
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if (!(i&0xf))
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p += sprintf(p, "\n0x%p : ", (gpio_ptr + i));
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p += sprintf(p, "%08x ", readl(gpio_ptr + i));
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}
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p += sprintf(p, "\n");
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iounmap(gpio_ptr);
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out:
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return p-buf;
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|
}
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static ssize_t dump_ccmu_reg_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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char *p = buf;
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int i = 0;
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void __iomem *ccmu_ptr = NULL;
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int ret = 0;
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resource_size_t res_saddr_ccmu;
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#ifdef CONFIG_ARCH_SUN50IW11
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void __iomem *pll_ptr = NULL;
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resource_size_t res_saddr_pll;
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#endif
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ret = sunxi_mmc_res_start_addr("clocks", &res_saddr_ccmu, 0);
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if (ret < 0)
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goto out;
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ccmu_ptr = ioremap(res_saddr_ccmu, SUNXI_DEG_MAX_MAP_REG);
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if (!ccmu_ptr) {
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pr_err("Can not map ccmu resource\n");
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goto out;
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}
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#ifdef CONFIG_ARCH_SUN50IW11
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ret = sunxi_mmc_res_start_addr("clocks", &res_saddr_pll, 1);
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if (ret < 0)
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goto out;
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pll_ptr = ioremap(res_saddr_pll, SUNXI_DEG_PRCM_MAP_REG);
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if (!pll_ptr) {
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pr_err("Can not map pll resource\n");
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goto out;
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}
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#endif
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p += sprintf(p, "Dump ccmu\n");
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if (res_saddr_ccmu == CCMU_BASE_ADDR_BEFORE_V2P1H) {
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p += sprintf(p, "Dump ccmu regs:gating\n");
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for (i = SUNXI_BCLKG_SADDR; i < SUNXI_BCLKG_EADDR; i += 4) {
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if (!(i&0xf))
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p += sprintf(p, "\n0x%p : ", (ccmu_ptr + i));
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p += sprintf(p, "%08x ", readl(ccmu_ptr + i));
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}
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p += sprintf(p, "\n");
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p += sprintf(p, "Dump ccmu regs:module clk\n");
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for (i = SUNXI_CLK_PRT_SADDR; i < SUNXI_CLK_PRT_EADDR; i += 4) {
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if (!(i&0xf))
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p += sprintf(p, "\n0x%p : ", (ccmu_ptr + i));
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p += sprintf(p, "%08x ", readl(ccmu_ptr + i));
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}
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p += sprintf(p, "\n");
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p += sprintf(p, "Dump ccmu regs:reset\n");
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for (i = SUNXI_BSRES_SADDR; i < SUNXI_BSRES_EADDR; i += 4) {
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if (!(i&0xf))
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p += sprintf(p, "\n0x%p : ", (ccmu_ptr + i));
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p += sprintf(p, "%08x ", readl(ccmu_ptr + i));
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}
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p += sprintf(p, "\n");
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} else {
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p += sprintf(p, "Dump ccmu regs:pll,gating,reset,module clk\n");
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#ifdef CONFIG_ARCH_SUN50IW11
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for (i = SUNXI_PP_NCM_SADDR; i < SUNXI_PP_NCM_EADDR; i += 4) {
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if (!(i&0xf))
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p += sprintf(p, "\n0x%p : ", (pll_ptr + i));
|
p += sprintf(p, "%08x ", readl(pll_ptr + i));
|
}
|
p += sprintf(p, "\n");
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#else
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for (i = SUNXI_PP_NCM_SADDR; i < SUNXI_PP_NCM_EADDR; i += 4) {
|
if (!(i&0xf))
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p += sprintf(p, "\n0x%p : ", (ccmu_ptr + i));
|
p += sprintf(p, "%08x ", readl(ccmu_ptr + i));
|
}
|
p += sprintf(p, "\n");
|
#endif
|
|
for (i = SUNXI_NCCM_SADDR; i < SUNXI_NCCM_EADDR; i += 4) {
|
if (!(i&0xf))
|
p += sprintf(p, "\n0x%p : ", (ccmu_ptr + i));
|
p += sprintf(p, "%08x ", readl(ccmu_ptr + i));
|
}
|
p += sprintf(p, "\n");
|
}
|
p += sprintf(p, "\n");
|
|
iounmap(ccmu_ptr);
|
#ifdef CONFIG_ARCH_SUN50IW11
|
iounmap(pll_ptr);
|
#endif
|
out:
|
return p-buf;
|
|
}
|
|
static ssize_t dump_clk_dly_show(struct device *dev,
|
struct device_attribute *attr, char *buf)
|
{
|
char *p = buf;
|
struct platform_device *pdev = to_platform_device(dev);
|
struct mmc_host *mmc = platform_get_drvdata(pdev);
|
struct sunxi_mmc_host *host = mmc_priv(mmc);
|
|
if (host->sunxi_mmc_dump_dly_table)
|
host->sunxi_mmc_dump_dly_table(host);
|
else
|
dev_warn(mmc_dev(mmc), "not found the dump dly table\n");
|
|
return p - buf;
|
}
|
|
int sunxi_mmc_uperf_stat(struct sunxi_mmc_host *host,
|
struct mmc_data *data,
|
struct mmc_request *mrq_busy,
|
bool bhalf)
|
{
|
ktime_t diff;
|
|
if (!bhalf) {
|
if (host->perf_enable && data) {
|
diff = ktime_sub(ktime_get(), host->perf.start);
|
if (data->flags & MMC_DATA_READ) {
|
host->perf.rbytes += data->bytes_xfered;
|
host->perf.rtime =
|
ktime_add(host->perf.rtime, diff);
|
} else if (data->flags & MMC_DATA_WRITE) {
|
if (!mrq_busy) {
|
host->perf.wbytes +=
|
data->bytes_xfered;
|
host->perf.wtime =
|
ktime_add(host->perf.wtime, diff);
|
sunxi_mmc_filter_rate(host, data, data->bytes_xfered, ktime_to_us(diff));
|
}
|
host->perf.wbytestran += data->bytes_xfered;
|
host->perf.wtimetran =
|
ktime_add(host->perf.wtimetran, diff);
|
}
|
}
|
} else {
|
if (host->perf_enable
|
&& mrq_busy->data
|
&& (mrq_busy->data->flags & MMC_DATA_WRITE)) {
|
diff = ktime_sub(ktime_get(), host->perf.start);
|
host->perf.wbytes += mrq_busy->data->bytes_xfered;
|
host->perf.wtime = ktime_add(host->perf.wtime, diff);
|
sunxi_mmc_filter_rate(host, data, data->bytes_xfered, ktime_to_us(diff));
|
}
|
}
|
return 0;
|
}
|
EXPORT_SYMBOL_GPL(sunxi_mmc_uperf_stat);
|
|
static ssize_t
|
sunxi_mmc_show_perf(struct device *dev, struct device_attribute *attr, char *buf)
|
{
|
struct platform_device *pdev = to_platform_device(dev);
|
struct mmc_host *mmc = platform_get_drvdata(pdev);
|
struct sunxi_mmc_host *host = mmc_priv(mmc);
|
int64_t rtime_drv, wtime_drv, wtime_drv_tran;
|
int64_t rbytes_drv, wbytes_drv, wbytes_drv_tran;
|
|
|
mmc_claim_host(mmc);
|
|
rbytes_drv = host->perf.rbytes;
|
wbytes_drv = host->perf.wbytes;
|
wbytes_drv_tran = host->perf.wbytestran;
|
|
rtime_drv = ktime_to_us(host->perf.rtime);
|
wtime_drv = ktime_to_us(host->perf.wtime);
|
wtime_drv_tran = ktime_to_us(host->perf.wtimetran);
|
|
mmc_release_host(mmc);
|
|
return snprintf(buf, PAGE_SIZE, "Write performance at host driver Level:"
|
"%lld bytes in %lld microseconds\n"
|
"Read performance at host driver Level:"
|
"%lld bytes in %lld microseconds\n"
|
"write performance at host driver Level(no wait busy):"
|
"%lld bytes in %lld microseconds\n",
|
wbytes_drv, wtime_drv,
|
rbytes_drv, rtime_drv,
|
wbytes_drv_tran, wtime_drv_tran);
|
}
|
|
static ssize_t
|
sunxi_mmc_set_perf(struct device *dev, struct device_attribute *attr,
|
const char *buf, size_t count)
|
{
|
struct platform_device *pdev = to_platform_device(dev);
|
struct mmc_host *mmc = platform_get_drvdata(pdev);
|
struct sunxi_mmc_host *host = mmc_priv(mmc);
|
int64_t value;
|
|
sscanf(buf, "%lld", &value);
|
printk("set perf value %lld\n", value);
|
|
mmc_claim_host(mmc);
|
if (!value) {
|
memset(&host->perf, 0, sizeof(host->perf));
|
host->perf_enable = false;
|
} else {
|
host->perf_enable = true;
|
}
|
mmc_release_host(mmc);
|
|
return count;
|
}
|
|
static ssize_t
|
sunxi_mmc_show_filter_sector(struct device *dev, struct device_attribute *attr, char *buf)
|
{
|
struct platform_device *pdev = to_platform_device(dev);
|
struct mmc_host *mmc = platform_get_drvdata(pdev);
|
struct sunxi_mmc_host *host = mmc_priv(mmc);
|
|
return snprintf(buf, PAGE_SIZE, "filter speed %d\n", host->filter_sector);
|
}
|
|
static ssize_t
|
sunxi_mmc_set_filter_sector(struct device *dev, struct device_attribute *attr,
|
const char *buf, size_t count)
|
{
|
struct platform_device *pdev = to_platform_device(dev);
|
struct mmc_host *mmc = platform_get_drvdata(pdev);
|
struct sunxi_mmc_host *host = mmc_priv(mmc);
|
int64_t value;
|
|
sscanf(buf, "%lld", &value);
|
printk("get filter sector %lld\n", value);
|
host->filter_sector = value;
|
|
return count;
|
}
|
|
|
static ssize_t
|
sunxi_mmc_show_filter_speed(struct device *dev, struct device_attribute *attr, char *buf)
|
{
|
struct platform_device *pdev = to_platform_device(dev);
|
struct mmc_host *mmc = platform_get_drvdata(pdev);
|
struct sunxi_mmc_host *host = mmc_priv(mmc);
|
|
return snprintf(buf, PAGE_SIZE, "filter speed %d\n", host->filter_speed);
|
}
|
|
static ssize_t
|
sunxi_mmc_set_filter_speed(struct device *dev, struct device_attribute *attr,
|
const char *buf, size_t count)
|
{
|
struct platform_device *pdev = to_platform_device(dev);
|
struct mmc_host *mmc = platform_get_drvdata(pdev);
|
struct sunxi_mmc_host *host = mmc_priv(mmc);
|
int64_t value;
|
|
sscanf(buf, "%lld", &value);
|
printk("get filter speed %lld\n", value);
|
host->filter_speed = value;
|
|
return count;
|
}
|
|
|
|
|
|
int mmc_create_sys_fs(struct sunxi_mmc_host *host, struct platform_device *pdev)
|
{
|
int ret;
|
|
host->maual_insert.show = maual_insert_show;
|
host->maual_insert.store = maual_insert_store;
|
sysfs_attr_init(&(host->maual_insert.attr));
|
host->maual_insert.attr.name = "sunxi_insert";
|
host->maual_insert.attr.mode = S_IRUGO | S_IWUSR;
|
ret = device_create_file(&pdev->dev, &host->maual_insert);
|
if (ret)
|
return ret;
|
|
host->host_perf.show = sunxi_mmc_show_perf;
|
host->host_perf.store = sunxi_mmc_set_perf;
|
sysfs_attr_init(&(host->host_perf.attr));
|
host->host_perf.attr.mode = S_IRUGO | S_IWUSR;
|
host->host_perf.attr.name = "sunxi_host_perf";
|
ret = device_create_file(&pdev->dev, &host->host_perf);
|
if (ret)
|
return ret;
|
|
host->filter_sector_perf.show = sunxi_mmc_show_filter_sector;
|
host->filter_sector_perf.store = sunxi_mmc_set_filter_sector;
|
sysfs_attr_init(&(host->filter_sector_perf.attr));
|
host->filter_sector_perf.attr.name = "sunxi_host_filter_w_sector";
|
host->filter_sector_perf.attr.mode = S_IRUGO | S_IWUSR;
|
ret = device_create_file(&pdev->dev, &host->filter_sector_perf);
|
if (ret)
|
return ret;
|
|
host->filter_speed_perf.show = sunxi_mmc_show_filter_speed;;
|
host->filter_speed_perf.store = sunxi_mmc_set_filter_speed;;
|
sysfs_attr_init(&(host->filter_speed_perf.attr));
|
host->filter_speed_perf.attr.name = "sunxi_host_filter_w_speed";
|
host->filter_speed_perf.attr.mode = S_IRUGO | S_IWUSR;
|
ret = device_create_file(&pdev->dev, &host->filter_speed_perf);
|
if (ret)
|
return ret;
|
|
|
host->dump_register = dump_register;
|
host->dump_register[0].show = dump_host_reg_show;
|
sysfs_attr_init(&(host->dump_register[0].attr));
|
host->dump_register[0].attr.name = "sunxi_dump_host_register";
|
host->dump_register[0].attr.mode = S_IRUGO;
|
ret = device_create_file(&pdev->dev, &host->dump_register[0]);
|
if (ret)
|
return ret;
|
|
host->dump_register[1].show = dump_gpio_reg_show;
|
sysfs_attr_init(&(host->dump_register[1].attr));
|
host->dump_register[1].attr.name = "sunxi_dump_gpio_register";
|
host->dump_register[1].attr.mode = S_IRUGO;
|
ret = device_create_file(&pdev->dev, &host->dump_register[1]);
|
if (ret)
|
return ret;
|
|
host->dump_register[2].show = dump_ccmu_reg_show;
|
sysfs_attr_init(&(host->dump_register[2].attr));
|
host->dump_register[2].attr.name = "sunxi_dump_ccmu_register";
|
host->dump_register[2].attr.mode = S_IRUGO;
|
ret = device_create_file(&pdev->dev, &host->dump_register[2]);
|
if (ret)
|
return ret;
|
|
host->dump_clk_dly.show = dump_clk_dly_show;
|
sysfs_attr_init(&(host->dump_clk_dly.attr));
|
host->dump_clk_dly.attr.name = "sunxi_dump_clk_dly";
|
host->dump_clk_dly.attr.mode = S_IRUGO;
|
ret = device_create_file(&pdev->dev, &host->dump_clk_dly);
|
if (ret)
|
return ret;
|
|
#if IS_ENABLED(CONFIG_PSTORE_BLK)
|
host->host_mwr.show = sunxi_mmc_panic_rtest;
|
host->host_mwr.store = sunxi_mmc_pancic_wrtest;
|
sysfs_attr_init(&(host->host_mwr.attr));
|
host->host_mwr.attr.name = "sunxi_host_panic_wr";
|
host->host_mwr.attr.mode = S_IRUGO | S_IWUSR;
|
ret = device_create_file(&pdev->dev, &host->host_mwr);
|
#endif
|
|
return ret;
|
}
|
EXPORT_SYMBOL_GPL(mmc_create_sys_fs);
|
|
void mmc_remove_sys_fs(struct sunxi_mmc_host *host,
|
struct platform_device *pdev)
|
{
|
device_remove_file(&pdev->dev, &host->host_mwr);
|
device_remove_file(&pdev->dev, &host->host_perf);
|
device_remove_file(&pdev->dev, &host->maual_insert);
|
device_remove_file(&pdev->dev, &host->dump_register[0]);
|
device_remove_file(&pdev->dev, &host->dump_register[1]);
|
device_remove_file(&pdev->dev, &host->dump_register[2]);
|
device_remove_file(&pdev->dev, &host->dump_clk_dly);
|
device_remove_file(&pdev->dev, &host->filter_sector_perf);
|
device_remove_file(&pdev->dev, &host->filter_speed_perf);
|
}
|
EXPORT_SYMBOL_GPL(mmc_remove_sys_fs);
|
