/*
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* drivers/input/keyboard/sunxi-ir-tx.c
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*
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* Copyright (c) 2013-2018 Allwinnertech Co., Ltd.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/cdev.h>
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#include <linux/uaccess.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/of_gpio.h>
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#include <linux/of_platform.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <linux/timer.h>
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#include <linux/gpio.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pm.h>
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#include <asm/io.h>
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#include "sunxi-ir-tx.h"
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static u32 debug_mask;
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#define dprintk(level_mask, fmt, arg...) \
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do { \
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if (unlikely(debug_mask & level_mask)) \
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pr_warn("%s()%d - "fmt, __func__, __LINE__, ##arg); \
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} while (0)
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#define IRTX_ERR(fmt, arg...) pr_err("%s()%d - "fmt, __func__, __LINE__, ##arg)
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struct ir_tx_dev {
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struct device *dev;
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struct cdev cdev;
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dev_t chrdev;
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};
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struct ir_raw_buffer {
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unsigned long tx_dcnt;
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unsigned char tx_buf[IR_TX_RAW_BUF_SIZE];
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};
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struct sunxi_ir_tx_data {
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void __iomem *reg_base;
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struct platform_device *pdev;
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struct clk *mclk;
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struct clk *pclk;
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struct regulator *suply;
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struct pinctrl *pctrl;
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u32 suply_vol;
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int irq_num;
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};
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static struct class *ir_tx_class;
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static struct ir_tx_dev *ir_tx_dev;
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static struct sunxi_ir_tx_data *ir_tx_data;
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static struct ir_raw_buffer ir_rawbuf;
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__inline int ir_tx_fifo_empty(void)
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{
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return(readl(ir_tx_data->reg_base + IR_TX_TACR) == IR_TX_FIFO_SIZE);
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}
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__inline int ir_tx_fifo_full(void)
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{
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unsigned int reg_val;
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reg_val = readl(ir_tx_data->reg_base + IR_TX_TACR);
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dprintk(DEBUG_INFO, "%3u bytes fifo available\n", reg_val);
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if (reg_val == 0)
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return 1;
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else
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return 0;
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}
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__inline void ir_tx_reset_rawbuffer(void)
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{
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ir_rawbuf.tx_dcnt = 0;
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}
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void ir_tx_packet_handler(unsigned char address, unsigned char command)
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{
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unsigned int i, j;
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unsigned int count = 0;
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unsigned char buffer[256];
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unsigned char tx_code[4];
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ir_tx_reset_rawbuffer();
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tx_code[0] = address;
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tx_code[1] = ~address;
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tx_code[2] = command;
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tx_code[3] = ~command;
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dprintk(DEBUG_INIT, "addr: 0x%x addr': 0x%x cmd: 0x%x cmd': 0x%x\n",
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tx_code[0], tx_code[1], tx_code[2], tx_code[3]);
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/* go encoding */
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if (IR_TX_CLK_Ts == 1) {
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buffer[count++] = 0xff;
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buffer[count++] = 0xff;
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buffer[count++] = 0xff;
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buffer[count++] = 0xa5;
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buffer[count++] = 0x7f;
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buffer[count++] = 0x54;
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for (j = 0; j < 4; j++) {
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for (i = 0; i < 8; i++) {
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if (tx_code[j] & 0x01) {
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buffer[count++] = 0x99;
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buffer[count++] = 0x4d;
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} else {
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buffer[count++] = 0x99;
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buffer[count++] = 0x19;
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}
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tx_code[j] = tx_code[j] >> 1;
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}
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}
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buffer[count++] = 0x99;
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buffer[count++] = 0x7f;
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buffer[count++] = 0x7f;
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buffer[count++] = 0x7f;
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buffer[count++] = 0x7f;
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buffer[count++] = 0x7f;
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buffer[count++] = 0x7f;
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} else {
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for (j = 0; j < 4; j++) {
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if (IR_TX_CYCLE_TYPE == 0 && j % 4 == 0) {
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buffer[count++] = 0xff;
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buffer[count++] = 0xff;
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buffer[count++] = 0xff;
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buffer[count++] = 0xab;
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buffer[count++] = 0x7f;
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buffer[count++] = 0x55;
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}
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for (i = 0; i < 8; i++) {
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if (tx_code[j] & 0x01) {
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buffer[count++] = 0x9a;
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buffer[count++] = 0x4e;
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} else {
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buffer[count++] = 0x9a;
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buffer[count++] = 0x1a;
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}
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tx_code[j] = tx_code[j] >> 1;
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}
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}
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if (IR_TX_CYCLE_TYPE == 0)
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buffer[count++] = 0x9a;
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}
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for (i = 0; i < count; i++)
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ir_rawbuf.tx_buf[ir_rawbuf.tx_dcnt++] = buffer[i];
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dprintk(DEBUG_INFO, "tx_dcnt = %ld\n", ir_rawbuf.tx_dcnt);
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}
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static int send_ir_code(unsigned char address, unsigned char command)
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{
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unsigned int i = 0, idle_threshold;
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u32 tmp;
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writel(IR_TX_GL_VALUE, ir_tx_data->reg_base + IR_TX_GLR);
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idle_threshold = (readl(ir_tx_data->reg_base + IR_TX_IDC_H) << 8)
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| readl(ir_tx_data->reg_base + IR_TX_IDC_L);
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dprintk(DEBUG_INFO, "enter\n");
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dprintk(DEBUG_INFO, "idle_threshold = %d\n", idle_threshold);
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ir_tx_packet_handler(address, command);
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writel((ir_rawbuf.tx_dcnt - 1), ir_tx_data->reg_base + IR_TX_TR);
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_GLR = 0x%2x\n", IR_TX_GLR,
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readl(ir_tx_data->reg_base + IR_TX_GLR));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_MCR = 0x%2x\n", IR_TX_MCR,
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readl(ir_tx_data->reg_base + IR_TX_MCR));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_CR = 0x%2x\n", IR_TX_CR,
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readl(ir_tx_data->reg_base + IR_TX_CR));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_IDC_H = 0x%2x\n", IR_TX_IDC_H,
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readl(ir_tx_data->reg_base + IR_TX_IDC_H));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_IDC_L = 0x%2x\n", IR_TX_IDC_L,
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readl(ir_tx_data->reg_base + IR_TX_IDC_L));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_ICR_H = 0x%2x\n", IR_TX_ICR_H,
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readl(ir_tx_data->reg_base + IR_TX_ICR_H));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_ICR_L = 0x%2x\n", IR_TX_ICR_L,
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readl(ir_tx_data->reg_base + IR_TX_ICR_L));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_TELR = 0x%2x\n", IR_TX_TELR,
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readl(ir_tx_data->reg_base + IR_TX_TELR));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_INTC = 0x%2x\n", IR_TX_INTC,
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readl(ir_tx_data->reg_base + IR_TX_INTC));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_TACR = 0x%2x\n", IR_TX_TACR,
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readl(ir_tx_data->reg_base + IR_TX_TACR));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_STAR = 0x%2x\n", IR_TX_STAR,
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readl(ir_tx_data->reg_base + IR_TX_STAR));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_TR = 0x%2x\n", IR_TX_TR,
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readl(ir_tx_data->reg_base + IR_TX_TR));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_DMAC = 0x%2x\n", IR_TX_DMAC,
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readl(ir_tx_data->reg_base + IR_TX_DMAC));
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if (ir_rawbuf.tx_dcnt <= IR_TX_FIFO_SIZE)
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for (i = 0; i < ir_rawbuf.tx_dcnt; i++) {
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writeb(ir_rawbuf.tx_buf[i],
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ir_tx_data->reg_base + IR_TX_FIFO_DR);
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}
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else {
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dprintk(DEBUG_INFO, "invalid packet\n");
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return -1;
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}
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dprintk(DEBUG_INFO, "%3u bytes fifo available\n",
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readl(ir_tx_data->reg_base + IR_TX_TACR));
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if (IR_TX_CYCLE_TYPE) {
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for (i = 0; i < ir_rawbuf.tx_dcnt; i++)
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dprintk(DEBUG_INFO, "%d, ir txbuffer code = 0x%x!\n",
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i, ir_rawbuf.tx_buf[i]);
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tmp = readl(ir_tx_data->reg_base + IR_TX_CR);
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tmp |= (0x01<<7);
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writel(tmp, ir_tx_data->reg_base + IR_TX_CR);
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} else
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while (!ir_tx_fifo_empty())
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dprintk(DEBUG_INFO,
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"fifo under run. %3u bytes fifo available\n",
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readl(ir_tx_data->reg_base + IR_TX_TACR));
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//wait idle finish
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while ((readl(ir_tx_data->reg_base + IR_TX_ICR_H) << 8
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| readl(ir_tx_data->reg_base + IR_TX_ICR_L))
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< idle_threshold)
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dprintk(DEBUG_INFO, "wait idle\n");
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dprintk(DEBUG_INFO, "finish\n");
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return 0;
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}
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static inline unsigned long ir_tx_get_intsta(void)
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{
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return readl(ir_tx_data->reg_base + IR_TX_STAR);
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}
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static inline void ir_tx_clr_intsta(unsigned long bitmap)
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{
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unsigned long tmp = readl(ir_tx_data->reg_base + IR_TX_STAR);
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tmp &= ~0xff;
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tmp |= bitmap&0xff;
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writel(tmp, ir_tx_data->reg_base + IR_TX_STAR);
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}
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static irqreturn_t ir_tx_irq_service(int irqno, void *dev_id)
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{
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unsigned long intsta = ir_tx_get_intsta();
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dprintk(DEBUG_INFO, "IR TX IRQ Serve 0x%lx\n", intsta);
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ir_tx_clr_intsta(intsta);
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|
return IRQ_HANDLED;
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}
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static void ir_tx_reg_clear(struct sunxi_ir_tx_data *ir_tx_data)
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{
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writel(0, ir_tx_data->reg_base + IR_TX_GLR);
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}
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static void ir_tx_reg_cfg(struct sunxi_ir_tx_data *ir_tx_data)
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{
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writel(IR_TX_MC_VALUE, ir_tx_data->reg_base + IR_TX_MCR);
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writel(IR_TX_CLK_VALUE, ir_tx_data->reg_base + IR_TX_CR);
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writel(IR_TX_IDC_H_VALUE, ir_tx_data->reg_base + IR_TX_IDC_H);
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writel(IR_TX_IDC_L_VALUE, ir_tx_data->reg_base + IR_TX_IDC_L);
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writel(IR_TX_STA_VALUE, ir_tx_data->reg_base + IR_TX_STAR);
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writel(IR_TX_INT_C_VALUE, ir_tx_data->reg_base + IR_TX_INTC);
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writel(IR_TX_GL_VALUE, ir_tx_data->reg_base + IR_TX_GLR);
|
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_GLR = 0x%2x\n", IR_TX_GLR,
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readl(ir_tx_data->reg_base + IR_TX_GLR));
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dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_MCR = 0x%2x\n", IR_TX_MCR,
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readl(ir_tx_data->reg_base + IR_TX_MCR));
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_CR = 0x%2x\n", IR_TX_CR,
|
readl(ir_tx_data->reg_base + IR_TX_CR));
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_IDC_H = 0x%2x\n", IR_TX_IDC_H,
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readl(ir_tx_data->reg_base + IR_TX_IDC_H));
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_IDC_L = 0x%2x\n", IR_TX_IDC_L,
|
readl(ir_tx_data->reg_base + IR_TX_IDC_L));
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_ICR_H = 0x%2x\n", IR_TX_ICR_H,
|
readl(ir_tx_data->reg_base + IR_TX_ICR_H));
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_ICR_L = 0x%2x\n", IR_TX_ICR_L,
|
readl(ir_tx_data->reg_base + IR_TX_ICR_L));
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_TELR = 0x%2x\n", IR_TX_TELR,
|
readl(ir_tx_data->reg_base + IR_TX_TELR));
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_INTC = 0x%2x\n", IR_TX_INTC,
|
readl(ir_tx_data->reg_base + IR_TX_INTC));
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_TACR = 0x%2x\n", IR_TX_TACR,
|
readl(ir_tx_data->reg_base + IR_TX_TACR));
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_STAR = 0x%2x\n", IR_TX_STAR,
|
readl(ir_tx_data->reg_base + IR_TX_STAR));
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_TR = 0x%2x\n", IR_TX_TR,
|
readl(ir_tx_data->reg_base + IR_TX_TR));
|
dprintk(DEBUG_INIT, "Offset: 0x%2x IR_TX_DMAC = 0x%2x\n", IR_TX_DMAC,
|
readl(ir_tx_data->reg_base + IR_TX_DMAC));
|
|
}
|
|
static void ir_tx_clk_cfg(struct sunxi_ir_tx_data *ir_tx_data)
|
{
|
|
unsigned long rate = 0;
|
|
rate = clk_get_rate(ir_tx_data->pclk);
|
dprintk(DEBUG_INIT, "get ir parent rate %dHZ\n", (__u32)rate);
|
|
if (clk_set_parent(ir_tx_data->mclk, ir_tx_data->pclk))
|
IRTX_ERR("set ir_clk parent failed!\n");
|
|
if (clk_set_rate(ir_tx_data->mclk, IR_TX_CLK))
|
IRTX_ERR("set ir clock freq to %d failed!\n", IR_TX_CLK);
|
|
rate = clk_get_rate(ir_tx_data->mclk);
|
dprintk(DEBUG_INIT, "get ir_clk rate %dHZ\n", (__u32)rate);
|
|
if (clk_prepare_enable(ir_tx_data->mclk))
|
IRTX_ERR("try to enable ir_clk failed!\n");
|
}
|
|
static void ir_tx_clk_uncfg(struct sunxi_ir_tx_data *ir_tx_data)
|
{
|
|
if (IS_ERR(ir_tx_data->mclk) || ir_tx_data->mclk == NULL)
|
IRTX_ERR("ir_clk handle is invalid, just return!\n");
|
else {
|
clk_disable_unprepare(ir_tx_data->mclk);
|
clk_put(ir_tx_data->mclk);
|
ir_tx_data->mclk = NULL;
|
}
|
|
if (IS_ERR(ir_tx_data->pclk) || ir_tx_data->pclk == NULL)
|
IRTX_ERR("ir_clk_source handle is invalid, just return!\n");
|
else {
|
clk_put(ir_tx_data->pclk);
|
ir_tx_data->pclk = NULL;
|
}
|
}
|
|
static int ir_tx_select_gpio_state(struct pinctrl *pctrl, char *name)
|
{
|
int ret = 0;
|
struct pinctrl_state *pctrl_state = NULL;
|
|
pctrl_state = pinctrl_lookup_state(pctrl, name);
|
if (IS_ERR(pctrl_state)) {
|
IRTX_ERR("IR_TX pinctrl_lookup_state(%s) failed! return %p \n",
|
name, pctrl_state);
|
return -1;
|
}
|
|
ret = pinctrl_select_state(pctrl, pctrl_state);
|
if (ret < 0)
|
IRTX_ERR("IR_TX pinctrl_select_state(%s) failed! return %d \n",
|
name, ret);
|
|
return ret;
|
}
|
|
static int ir_tx_request_gpio(struct sunxi_ir_tx_data *ir_tx_data)
|
{
|
ir_tx_data->pctrl = devm_pinctrl_get(&ir_tx_data->pdev->dev);
|
if (IS_ERR(ir_tx_data->pctrl)) {
|
IRTX_ERR("devm_pinctrl_get() failed!\n");
|
return -1;
|
}
|
|
return ir_tx_select_gpio_state(ir_tx_data->pctrl,
|
PINCTRL_STATE_DEFAULT);
|
}
|
|
static int ir_tx_setup(struct sunxi_ir_tx_data *ir_tx_data)
|
{
|
int ret = 0;
|
|
ret = ir_tx_request_gpio(ir_tx_data);
|
if (ret < 0) {
|
IRTX_ERR("request gpio failed!\n");
|
return -1;
|
}
|
|
ir_tx_clk_cfg(ir_tx_data);
|
ir_tx_reg_cfg(ir_tx_data);
|
|
return 0;
|
}
|
|
static int sunxi_ir_tx_startup(struct platform_device *pdev,
|
struct sunxi_ir_tx_data *ir_tx_data)
|
{
|
struct device_node *np = NULL;
|
int ret = 0;
|
|
np = pdev->dev.of_node;
|
|
ir_tx_data->reg_base = of_iomap(np, 0);
|
if (ir_tx_data->reg_base == NULL) {
|
IRTX_ERR("Failed to ioremap() io memory region.\n");
|
ret = -EBUSY;
|
} else
|
dprintk(DEBUG_INIT, "base: %p !\n", ir_tx_data->reg_base);
|
|
ir_tx_data->irq_num = irq_of_parse_and_map(np, 0);
|
if (ir_tx_data->irq_num == 0) {
|
IRTX_ERR("Failed to map irq.\n");
|
ret = -EBUSY;
|
} else
|
dprintk(DEBUG_INIT, "irq num: %d !\n", ir_tx_data->irq_num);
|
|
ir_tx_data->pclk = of_clk_get(np, 0);
|
ir_tx_data->mclk = of_clk_get(np, 1);
|
if (IS_ERR_OR_NULL(ir_tx_data->pclk) ||
|
IS_ERR_OR_NULL(ir_tx_data->mclk)) {
|
IRTX_ERR("Failed to get clk.\n");
|
ret = -EBUSY;
|
}
|
|
return ret;
|
}
|
|
static int sunxi_ir_tx_probe(struct platform_device *pdev)
|
{
|
int ret = 0;
|
|
ir_tx_data = kzalloc(sizeof(*ir_tx_data), GFP_KERNEL);
|
if (IS_ERR_OR_NULL(ir_tx_data)) {
|
IRTX_ERR("not enough memory for ir tx data\n");
|
return -ENOMEM;
|
}
|
if (pdev->dev.of_node)
|
/* get dt and sysconfig */
|
ret = sunxi_ir_tx_startup(pdev, ir_tx_data);
|
else {
|
IRTX_ERR("device tree err!\n");
|
return -EBUSY;
|
}
|
if (ret < 0)
|
goto err_startup;
|
|
ir_tx_data->pdev = pdev;
|
|
if (ir_tx_setup(ir_tx_data)) {
|
IRTX_ERR("ir_tx_setup failed.\n");
|
return -EIO;
|
}
|
|
platform_set_drvdata(pdev, ir_tx_data);
|
if (request_irq(ir_tx_data->irq_num, ir_tx_irq_service, 0,
|
"RemoteIR_TX", ir_tx_data)) {
|
IRTX_ERR(" request irq fail.\n");
|
ret = -EBUSY;
|
goto err_request_irq;
|
}
|
|
if (ret) {
|
IRTX_ERR("cteate sysfs node failed\n");
|
goto err_create_grp;
|
}
|
|
return 0;
|
|
err_create_grp:
|
free_irq(ir_tx_data->irq_num, &pdev->dev);
|
|
err_request_irq:
|
platform_set_drvdata(pdev, NULL);
|
ir_tx_clk_uncfg(ir_tx_data);
|
ir_tx_reg_clear(ir_tx_data);
|
|
err_startup:
|
kfree(ir_tx_data);
|
return ret;
|
}
|
|
static int sunxi_ir_tx_remove(struct platform_device *pdev)
|
{
|
struct sunxi_ir_tx_data *ir_tx_data = platform_get_drvdata(pdev);
|
|
free_irq(ir_tx_data->irq_num, &pdev->dev);
|
devm_pinctrl_put(ir_tx_data->pctrl);
|
|
ir_tx_reg_clear(ir_tx_data);
|
ir_tx_clk_uncfg(ir_tx_data);
|
|
platform_set_drvdata(pdev, NULL);
|
kfree(ir_tx_data);
|
|
|
return 0;
|
}
|
|
static const struct of_device_id sunxi_ir_tx_match[] = {
|
{ .compatible = "allwinner,ir_tx", },
|
{ },
|
};
|
MODULE_DEVICE_TABLE(of, sunxi_ir_recv_of_match);
|
|
#ifdef CONFIG_PM
|
static int sunxi_ir_tx_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct sunxi_ir_tx_data *ir_tx_data = platform_get_drvdata(pdev);
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dprintk(DEBUG_SUSPEND, "enter\n");
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ir_tx_reg_clear(ir_tx_data);
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disable_irq_nosync(ir_tx_data->irq_num);
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if (IS_ERR_OR_NULL(ir_tx_data->mclk)) {
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IRTX_ERR("clk handle is invalid, just return!\n");
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return -1;
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}
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clk_disable_unprepare(ir_tx_data->mclk);
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ir_tx_select_gpio_state(ir_tx_data->pctrl, PINCTRL_STATE_SLEEP);
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|
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return 0;
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};
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static int sunxi_ir_tx_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct sunxi_ir_tx_data *ir_tx_data = platform_get_drvdata(pdev);
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dprintk(DEBUG_INIT, "enter\n");
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clk_prepare_enable(ir_tx_data->mclk);
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enable_irq(ir_tx_data->irq_num);
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if (ir_tx_setup(ir_tx_data))
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return -1;
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return 0;
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};
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static const struct dev_pm_ops sunxi_ir_tx_pm_ops = {
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.suspend = sunxi_ir_tx_suspend,
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.resume = sunxi_ir_tx_resume,
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};
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#endif
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static struct platform_driver sunxi_ir_tx_driver = {
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.probe = sunxi_ir_tx_probe,
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.remove = sunxi_ir_tx_remove,
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.driver = {
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.name = SUNXI_IR_TX_DRIVER_NAME,
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.owner = THIS_MODULE,
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.of_match_table = sunxi_ir_tx_match,
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#ifdef CONFIG_PM
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.pm = &sunxi_ir_tx_pm_ops,
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#endif
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},
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};
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static int ir_tx_open(struct inode *inode, struct file *filp)
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{
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filp->private_data = ir_tx_data;
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return 0;
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}
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static int ir_tx_release(struct inode *inode, struct file *filp)
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{
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return 0;
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}
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static long ir_tx_unlocked_ioctl(struct file *filp, unsigned int cmd,
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unsigned long arg)
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{
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unsigned int size;
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struct cmd *code;
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switch (cmd) {
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case IR_TX_IOCSEND:
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size = _IOC_SIZE(cmd);
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code = (struct cmd *)kzalloc(size, GFP_KERNEL);
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if (IS_ERR_OR_NULL(code)) {
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IRTX_ERR("not enough memory for ir code\n");
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return -ENOMEM;
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}
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if (copy_from_user(code, (void __user *)arg, size)) {
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IRTX_ERR("copy buffer err\n");
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return -ENOMEM;
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}
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send_ir_code(code->address, code->command);
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kfree(code);
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break;
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default:
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IRTX_ERR("give us a err cmd\n");
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return -ENOTTY;
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}
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return 0;
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}
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static const struct file_operations ir_tx_fops = {
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.owner = THIS_MODULE,
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.unlocked_ioctl = ir_tx_unlocked_ioctl,
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.open = ir_tx_open,
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.release = ir_tx_release,
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};
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static int __init ir_tx_init(void)
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{
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int err = 0;
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struct device *dev;
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ir_tx_dev = kzalloc(sizeof(struct ir_tx_dev), GFP_KERNEL);
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if (ir_tx_dev == NULL) {
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IRTX_ERR("kzalloc failed!\n");
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return -ENOMEM;
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}
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err = alloc_chrdev_region(&ir_tx_dev->chrdev, 0, 1, "ir_tx-dev");
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|
if (err) {
|
IRTX_ERR("alloc_chrdev_region failed!\n");
|
goto alloc_chrdev_err;
|
}
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cdev_init(&(ir_tx_dev->cdev), &ir_tx_fops);
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ir_tx_dev->cdev.owner = THIS_MODULE;
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err = cdev_add(&(ir_tx_dev->cdev), ir_tx_dev->chrdev, 1);
|
if (err) {
|
IRTX_ERR("cdev_add failed!\n");
|
goto cdev_add_err;
|
}
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|
ir_tx_class = class_create(THIS_MODULE, "ir_tx_char_class");
|
if (IS_ERR(ir_tx_class)) {
|
err = PTR_ERR(ir_tx_class);
|
IRTX_ERR("class_create failed!\n");
|
goto class_err;
|
}
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|
dev = device_create(ir_tx_class, NULL, ir_tx_dev->chrdev, NULL,
|
"ir_tx%d", 0);
|
if (IS_ERR(dev)) {
|
err = PTR_ERR(dev);
|
IRTX_ERR("device_create failed!\n");
|
goto device_err;
|
}
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|
return 0;
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device_err:
|
device_destroy(ir_tx_class, ir_tx_dev->chrdev);
|
class_err:
|
cdev_del(&(ir_tx_dev->cdev));
|
cdev_add_err:
|
unregister_chrdev_region(ir_tx_dev->chrdev, 1);
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alloc_chrdev_err:
|
kfree(ir_tx_dev);
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|
return err;
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}
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|
static void __exit ir_tx_exit(void)
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{
|
cdev_del(&(ir_tx_dev->cdev));
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unregister_chrdev_region(ir_tx_dev->chrdev, 1);
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device_destroy(ir_tx_class, ir_tx_dev->chrdev);
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class_destroy(ir_tx_class);
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kfree(ir_tx_dev);
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}
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module_init(ir_tx_init);
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module_exit(ir_tx_exit);
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module_param_named(debug, debug_mask, int, 0664);
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module_platform_driver(sunxi_ir_tx_driver);
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MODULE_AUTHOR("Li Ming");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Remote IR TX driver");
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