/*
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* Copyright © 2014 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*/
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/**
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****************************************************************************************************
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* @file addrtypes.h
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* @brief Contains the helper function and constants
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****************************************************************************************************
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*/
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#ifndef __ADDR_TYPES_H__
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#define __ADDR_TYPES_H__
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#if defined(__APPLE__) && !defined(HAVE_TSERVER)
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// External definitions header maintained by Apple driver team, but not for diag team under Mac.
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// Helps address compilation issues & reduces code covered by NDA
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#include "addrExtDef.h"
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#else
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// Windows and/or Linux
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#if !defined(VOID)
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typedef void VOID;
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#endif
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#if !defined(FLOAT)
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typedef float FLOAT;
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#endif
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#if !defined(CHAR)
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typedef char CHAR;
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#endif
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#if !defined(INT)
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typedef int INT;
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#endif
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#include <stdarg.h> // va_list...etc need this header
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#endif // defined (__APPLE__) && !defined(HAVE_TSERVER)
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/**
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****************************************************************************************************
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* Calling conventions
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****************************************************************************************************
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*/
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#ifndef ADDR_CDECL
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#if defined(__GNUC__)
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#define ADDR_CDECL __attribute__((cdecl))
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#else
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#define ADDR_CDECL __cdecl
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#endif
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#endif
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#ifndef ADDR_STDCALL
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#if defined(__GNUC__)
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#if defined(__AMD64__)
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#define ADDR_STDCALL
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#else
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#define ADDR_STDCALL __attribute__((stdcall))
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#endif
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#else
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#define ADDR_STDCALL __stdcall
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#endif
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#endif
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#ifndef ADDR_FASTCALL
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#if defined(__GNUC__)
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#if defined(__i386__)
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#define ADDR_FASTCALL __attribute__((regparm(0)))
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#else
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#define ADDR_FASTCALL
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#endif
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#else
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#define ADDR_FASTCALL __fastcall
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#endif
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#endif
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#ifndef GC_CDECL
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#define GC_CDECL ADDR_CDECL
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#endif
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#ifndef GC_STDCALL
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#define GC_STDCALL ADDR_STDCALL
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#endif
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#ifndef GC_FASTCALL
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#define GC_FASTCALL ADDR_FASTCALL
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#endif
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#if defined(__GNUC__)
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#define ADDR_INLINE static inline // inline needs to be static to link
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#else
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// win32, win64, other platforms
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#define ADDR_INLINE __inline
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#endif // #if defined(__GNUC__)
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#define ADDR_API ADDR_FASTCALL //default call convention is fast call
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/**
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****************************************************************************************************
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* Global defines used by other modules
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****************************************************************************************************
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*/
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#if !defined(TILEINDEX_INVALID)
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#define TILEINDEX_INVALID -1
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#endif
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#if !defined(TILEINDEX_LINEAR_GENERAL)
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#define TILEINDEX_LINEAR_GENERAL -2
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#endif
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#if !defined(TILEINDEX_LINEAR_ALIGNED)
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#define TILEINDEX_LINEAR_ALIGNED 8
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#endif
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/**
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****************************************************************************************************
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* Return codes
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****************************************************************************************************
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*/
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typedef enum _ADDR_E_RETURNCODE
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{
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// General Return
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ADDR_OK = 0,
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ADDR_ERROR = 1,
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// Specific Errors
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ADDR_OUTOFMEMORY,
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ADDR_INVALIDPARAMS,
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ADDR_NOTSUPPORTED,
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ADDR_NOTIMPLEMENTED,
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ADDR_PARAMSIZEMISMATCH,
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ADDR_INVALIDGBREGVALUES,
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} ADDR_E_RETURNCODE;
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/**
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****************************************************************************************************
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* @brief
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* Neutral enums that define tile modes for all H/W
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* @note
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* R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from
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* ADDR_TM_2D_TILED_XTHICK
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*
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****************************************************************************************************
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*/
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typedef enum _AddrTileMode
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{
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ADDR_TM_LINEAR_GENERAL = 0, ///< Least restrictions, pitch: multiple of 8 if not buffer
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ADDR_TM_LINEAR_ALIGNED = 1, ///< Requests pitch or slice to be multiple of 64 pixels
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ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles
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ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles
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ADDR_TM_2D_TILED_THIN1 = 4, ///< A set of macro tiles consist of 8x8 tiles
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ADDR_TM_2D_TILED_THIN2 = 5, ///< 600 HWL only, macro tile ratio is 1:4
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ADDR_TM_2D_TILED_THIN4 = 6, ///< 600 HWL only, macro tile ratio is 1:16
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ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles
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ADDR_TM_2B_TILED_THIN1 = 8, ///< 600 HWL only, with bank swap
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ADDR_TM_2B_TILED_THIN2 = 9, ///< 600 HWL only, with bank swap and ratio is 1:4
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ADDR_TM_2B_TILED_THIN4 = 10, ///< 600 HWL only, with bank swap and ratio is 1:16
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ADDR_TM_2B_TILED_THICK = 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles
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ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices
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ADDR_TM_3D_TILED_THICK = 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick
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ADDR_TM_3B_TILED_THIN1 = 14, ///< 600 HWL only, with bank swap
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ADDR_TM_3B_TILED_THICK = 15, ///< 600 HWL only, with bank swap, thick
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ADDR_TM_2D_TILED_XTHICK = 16, ///< Tile is 8x8x8, valid from NI
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ADDR_TM_3D_TILED_XTHICK = 17, ///< Tile is 8x8x8, valid from NI
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ADDR_TM_POWER_SAVE = 18, ///< Power save mode, only used by KMD on NI
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ADDR_TM_PRT_TILED_THIN1 = 19, ///< No bank/pipe rotation or hashing beyond macrotile size
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ADDR_TM_PRT_2D_TILED_THIN1 = 20, ///< Same as 2D_TILED_THIN1, PRT only
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ADDR_TM_PRT_3D_TILED_THIN1 = 21, ///< Same as 3D_TILED_THIN1, PRT only
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ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size
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ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only
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ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only
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ADDR_TM_UNKNOWN = 25, ///< Unkown tile mode, should be decided by address lib
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ADDR_TM_COUNT = 26, ///< Must be the value of the last tile mode
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} AddrTileMode;
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/**
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****************************************************************************************************
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* @brief
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* Neutral enums that define swizzle modes for Gfx9 ASIC
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* @note
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*
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* ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resouce
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* ADDR_SW_256B_* addressing block aligned size is 256B, for 2D/3D resouce
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* ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resouce
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* ADDR_SW_64KB_* addressing block aligned size is 64KB, for 2D/3D resouce
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* ADDR_SW_VAR_* addressing block aligned size is ASIC specific, for 2D/3D resouce
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*
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* ADDR_SW_*_Z For 2D resouce, represents Z-order swizzle mode for depth/stencil/FMask
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For 3D resouce, represents a swizzle mode similar to legacy thick tile mode
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* ADDR_SW_*_S represents standard swizzle mode defined by MS
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* ADDR_SW_*_D For 2D resouce, represents a swizzle mode for displayable resource
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* For 3D resouce, represents a swizzle mode which places each slice in order & pixel
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within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible!
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* ADDR_SW_*_R For 2D resouce only, represents a swizzle mode for rotated displayable resource
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*
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****************************************************************************************************
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*/
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typedef enum _AddrSwizzleMode
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{
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ADDR_SW_LINEAR = 0,
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ADDR_SW_256B_S = 1,
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ADDR_SW_256B_D = 2,
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ADDR_SW_256B_R = 3,
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ADDR_SW_4KB_Z = 4,
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ADDR_SW_4KB_S = 5,
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ADDR_SW_4KB_D = 6,
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ADDR_SW_4KB_R = 7,
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ADDR_SW_64KB_Z = 8,
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ADDR_SW_64KB_S = 9,
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ADDR_SW_64KB_D = 10,
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ADDR_SW_64KB_R = 11,
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ADDR_SW_VAR_Z = 12,
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ADDR_SW_VAR_S = 13,
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ADDR_SW_VAR_D = 14,
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ADDR_SW_VAR_R = 15,
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ADDR_SW_64KB_Z_T = 16,
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ADDR_SW_64KB_S_T = 17,
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ADDR_SW_64KB_D_T = 18,
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ADDR_SW_64KB_R_T = 19,
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ADDR_SW_4KB_Z_X = 20,
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ADDR_SW_4KB_S_X = 21,
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ADDR_SW_4KB_D_X = 22,
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ADDR_SW_4KB_R_X = 23,
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ADDR_SW_64KB_Z_X = 24,
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ADDR_SW_64KB_S_X = 25,
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ADDR_SW_64KB_D_X = 26,
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ADDR_SW_64KB_R_X = 27,
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ADDR_SW_VAR_Z_X = 28,
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ADDR_SW_VAR_S_X = 29,
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ADDR_SW_VAR_D_X = 30,
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ADDR_SW_VAR_R_X = 31,
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ADDR_SW_LINEAR_GENERAL = 32,
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ADDR_SW_MAX_TYPE = 33,
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// Used for represent block with identical size
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ADDR_SW_256B = ADDR_SW_256B_S,
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ADDR_SW_4KB = ADDR_SW_4KB_S_X,
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ADDR_SW_64KB = ADDR_SW_64KB_S_X,
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ADDR_SW_VAR = ADDR_SW_VAR_S_X,
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} AddrSwizzleMode;
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/**
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****************************************************************************************************
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* @brief
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* Neutral enums that define image type
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* @note
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* this is new for address library interface version 2
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*
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****************************************************************************************************
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*/
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typedef enum _AddrResourceType
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{
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ADDR_RSRC_TEX_1D = 0,
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ADDR_RSRC_TEX_2D = 1,
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ADDR_RSRC_TEX_3D = 2,
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ADDR_RSRC_MAX_TYPE = 3,
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} AddrResourceType;
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/**
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****************************************************************************************************
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* @brief
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* Neutral enums that define resource heap location
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* @note
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* this is new for address library interface version 2
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*
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****************************************************************************************************
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*/
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typedef enum _AddrResrouceLocation
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{
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ADDR_RSRC_LOC_UNDEF = 0, // Resource heap is undefined/unknown
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ADDR_RSRC_LOC_LOCAL = 1, // CPU visable and CPU invisable local heap
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ADDR_RSRC_LOC_USWC = 2, // CPU write-combined non-cached nonlocal heap
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ADDR_RSRC_LOC_CACHED = 3, // CPU cached nonlocal heap
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ADDR_RSRC_LOC_INVIS = 4, // CPU invisable local heap only
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ADDR_RSRC_LOC_MAX_TYPE = 5,
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} AddrResrouceLocation;
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/**
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****************************************************************************************************
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* @brief
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* Neutral enums that define resource basic swizzle mode
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* @note
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* this is new for address library interface version 2
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*
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****************************************************************************************************
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*/
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typedef enum _AddrSwType
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{
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ADDR_SW_Z = 0, // Resource basic swizzle mode is ZOrder
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ADDR_SW_S = 1, // Resource basic swizzle mode is Standard
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ADDR_SW_D = 2, // Resource basic swizzle mode is Display
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ADDR_SW_R = 3, // Resource basic swizzle mode is Rotated
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} AddrSwType;
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/**
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****************************************************************************************************
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* @brief
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* Neutral enums that define mipmap major mode
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* @note
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* this is new for address library interface version 2
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*
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****************************************************************************************************
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*/
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typedef enum _AddrMajorMode
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{
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ADDR_MAJOR_X = 0,
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ADDR_MAJOR_Y = 1,
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ADDR_MAJOR_Z = 2,
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ADDR_MAJOR_MAX_TYPE = 3,
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} AddrMajorMode;
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/**
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****************************************************************************************************
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* AddrFormat
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*
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* @brief
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* Neutral enum for SurfaceFormat
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*
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****************************************************************************************************
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*/
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typedef enum _AddrFormat {
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ADDR_FMT_INVALID = 0x00000000,
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ADDR_FMT_8 = 0x00000001,
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ADDR_FMT_4_4 = 0x00000002,
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ADDR_FMT_3_3_2 = 0x00000003,
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ADDR_FMT_RESERVED_4 = 0x00000004,
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ADDR_FMT_16 = 0x00000005,
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ADDR_FMT_16_FLOAT = 0x00000006,
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ADDR_FMT_8_8 = 0x00000007,
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ADDR_FMT_5_6_5 = 0x00000008,
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ADDR_FMT_6_5_5 = 0x00000009,
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ADDR_FMT_1_5_5_5 = 0x0000000a,
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ADDR_FMT_4_4_4_4 = 0x0000000b,
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ADDR_FMT_5_5_5_1 = 0x0000000c,
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ADDR_FMT_32 = 0x0000000d,
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ADDR_FMT_32_FLOAT = 0x0000000e,
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ADDR_FMT_16_16 = 0x0000000f,
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ADDR_FMT_16_16_FLOAT = 0x00000010,
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ADDR_FMT_8_24 = 0x00000011,
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ADDR_FMT_8_24_FLOAT = 0x00000012,
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ADDR_FMT_24_8 = 0x00000013,
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ADDR_FMT_24_8_FLOAT = 0x00000014,
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ADDR_FMT_10_11_11 = 0x00000015,
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ADDR_FMT_10_11_11_FLOAT = 0x00000016,
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ADDR_FMT_11_11_10 = 0x00000017,
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ADDR_FMT_11_11_10_FLOAT = 0x00000018,
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ADDR_FMT_2_10_10_10 = 0x00000019,
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ADDR_FMT_8_8_8_8 = 0x0000001a,
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ADDR_FMT_10_10_10_2 = 0x0000001b,
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ADDR_FMT_X24_8_32_FLOAT = 0x0000001c,
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ADDR_FMT_32_32 = 0x0000001d,
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ADDR_FMT_32_32_FLOAT = 0x0000001e,
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ADDR_FMT_16_16_16_16 = 0x0000001f,
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ADDR_FMT_16_16_16_16_FLOAT = 0x00000020,
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ADDR_FMT_RESERVED_33 = 0x00000021,
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ADDR_FMT_32_32_32_32 = 0x00000022,
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ADDR_FMT_32_32_32_32_FLOAT = 0x00000023,
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ADDR_FMT_RESERVED_36 = 0x00000024,
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ADDR_FMT_1 = 0x00000025,
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ADDR_FMT_1_REVERSED = 0x00000026,
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ADDR_FMT_GB_GR = 0x00000027,
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ADDR_FMT_BG_RG = 0x00000028,
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ADDR_FMT_32_AS_8 = 0x00000029,
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ADDR_FMT_32_AS_8_8 = 0x0000002a,
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ADDR_FMT_5_9_9_9_SHAREDEXP = 0x0000002b,
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ADDR_FMT_8_8_8 = 0x0000002c,
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ADDR_FMT_16_16_16 = 0x0000002d,
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ADDR_FMT_16_16_16_FLOAT = 0x0000002e,
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ADDR_FMT_32_32_32 = 0x0000002f,
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ADDR_FMT_32_32_32_FLOAT = 0x00000030,
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ADDR_FMT_BC1 = 0x00000031,
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ADDR_FMT_BC2 = 0x00000032,
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ADDR_FMT_BC3 = 0x00000033,
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ADDR_FMT_BC4 = 0x00000034,
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ADDR_FMT_BC5 = 0x00000035,
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ADDR_FMT_BC6 = 0x00000036,
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ADDR_FMT_BC7 = 0x00000037,
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ADDR_FMT_32_AS_32_32_32_32 = 0x00000038,
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ADDR_FMT_APC3 = 0x00000039,
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ADDR_FMT_APC4 = 0x0000003a,
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ADDR_FMT_APC5 = 0x0000003b,
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ADDR_FMT_APC6 = 0x0000003c,
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ADDR_FMT_APC7 = 0x0000003d,
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ADDR_FMT_CTX1 = 0x0000003e,
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ADDR_FMT_RESERVED_63 = 0x0000003f,
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ADDR_FMT_ASTC_4x4 = 0x00000040,
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ADDR_FMT_ASTC_5x4 = 0x00000041,
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ADDR_FMT_ASTC_5x5 = 0x00000042,
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ADDR_FMT_ASTC_6x5 = 0x00000043,
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ADDR_FMT_ASTC_6x6 = 0x00000044,
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ADDR_FMT_ASTC_8x5 = 0x00000045,
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ADDR_FMT_ASTC_8x6 = 0x00000046,
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ADDR_FMT_ASTC_8x8 = 0x00000047,
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ADDR_FMT_ASTC_10x5 = 0x00000048,
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ADDR_FMT_ASTC_10x6 = 0x00000049,
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ADDR_FMT_ASTC_10x8 = 0x0000004a,
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ADDR_FMT_ASTC_10x10 = 0x0000004b,
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ADDR_FMT_ASTC_12x10 = 0x0000004c,
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ADDR_FMT_ASTC_12x12 = 0x0000004d,
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ADDR_FMT_ETC2_64BPP = 0x0000004e,
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ADDR_FMT_ETC2_128BPP = 0x0000004f,
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} AddrFormat;
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/**
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****************************************************************************************************
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* AddrDepthFormat
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*
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* @brief
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* Neutral enum for addrFlt32ToDepthPixel
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*
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****************************************************************************************************
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*/
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typedef enum _AddrDepthFormat
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{
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ADDR_DEPTH_INVALID = 0x00000000,
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ADDR_DEPTH_16 = 0x00000001,
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ADDR_DEPTH_X8_24 = 0x00000002,
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ADDR_DEPTH_8_24 = 0x00000003,
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ADDR_DEPTH_X8_24_FLOAT = 0x00000004,
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ADDR_DEPTH_8_24_FLOAT = 0x00000005,
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ADDR_DEPTH_32_FLOAT = 0x00000006,
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ADDR_DEPTH_X24_8_32_FLOAT = 0x00000007,
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} AddrDepthFormat;
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/**
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****************************************************************************************************
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* AddrColorFormat
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*
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* @brief
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* Neutral enum for ColorFormat
|
*
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****************************************************************************************************
|
*/
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typedef enum _AddrColorFormat
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{
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ADDR_COLOR_INVALID = 0x00000000,
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ADDR_COLOR_8 = 0x00000001,
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ADDR_COLOR_4_4 = 0x00000002,
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ADDR_COLOR_3_3_2 = 0x00000003,
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ADDR_COLOR_RESERVED_4 = 0x00000004,
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ADDR_COLOR_16 = 0x00000005,
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ADDR_COLOR_16_FLOAT = 0x00000006,
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ADDR_COLOR_8_8 = 0x00000007,
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ADDR_COLOR_5_6_5 = 0x00000008,
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ADDR_COLOR_6_5_5 = 0x00000009,
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ADDR_COLOR_1_5_5_5 = 0x0000000a,
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ADDR_COLOR_4_4_4_4 = 0x0000000b,
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ADDR_COLOR_5_5_5_1 = 0x0000000c,
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ADDR_COLOR_32 = 0x0000000d,
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ADDR_COLOR_32_FLOAT = 0x0000000e,
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ADDR_COLOR_16_16 = 0x0000000f,
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ADDR_COLOR_16_16_FLOAT = 0x00000010,
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ADDR_COLOR_8_24 = 0x00000011,
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ADDR_COLOR_8_24_FLOAT = 0x00000012,
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ADDR_COLOR_24_8 = 0x00000013,
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ADDR_COLOR_24_8_FLOAT = 0x00000014,
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ADDR_COLOR_10_11_11 = 0x00000015,
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ADDR_COLOR_10_11_11_FLOAT = 0x00000016,
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ADDR_COLOR_11_11_10 = 0x00000017,
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ADDR_COLOR_11_11_10_FLOAT = 0x00000018,
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ADDR_COLOR_2_10_10_10 = 0x00000019,
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ADDR_COLOR_8_8_8_8 = 0x0000001a,
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ADDR_COLOR_10_10_10_2 = 0x0000001b,
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ADDR_COLOR_X24_8_32_FLOAT = 0x0000001c,
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ADDR_COLOR_32_32 = 0x0000001d,
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ADDR_COLOR_32_32_FLOAT = 0x0000001e,
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ADDR_COLOR_16_16_16_16 = 0x0000001f,
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ADDR_COLOR_16_16_16_16_FLOAT = 0x00000020,
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ADDR_COLOR_RESERVED_33 = 0x00000021,
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ADDR_COLOR_32_32_32_32 = 0x00000022,
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ADDR_COLOR_32_32_32_32_FLOAT = 0x00000023,
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} AddrColorFormat;
|
|
/**
|
****************************************************************************************************
|
* AddrSurfaceNumber
|
*
|
* @brief
|
* Neutral enum for SurfaceNumber
|
*
|
****************************************************************************************************
|
*/
|
typedef enum _AddrSurfaceNumber {
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ADDR_NUMBER_UNORM = 0x00000000,
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ADDR_NUMBER_SNORM = 0x00000001,
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ADDR_NUMBER_USCALED = 0x00000002,
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ADDR_NUMBER_SSCALED = 0x00000003,
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ADDR_NUMBER_UINT = 0x00000004,
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ADDR_NUMBER_SINT = 0x00000005,
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ADDR_NUMBER_SRGB = 0x00000006,
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ADDR_NUMBER_FLOAT = 0x00000007,
|
} AddrSurfaceNumber;
|
|
/**
|
****************************************************************************************************
|
* AddrSurfaceSwap
|
*
|
* @brief
|
* Neutral enum for SurfaceSwap
|
*
|
****************************************************************************************************
|
*/
|
typedef enum _AddrSurfaceSwap {
|
ADDR_SWAP_STD = 0x00000000,
|
ADDR_SWAP_ALT = 0x00000001,
|
ADDR_SWAP_STD_REV = 0x00000002,
|
ADDR_SWAP_ALT_REV = 0x00000003,
|
} AddrSurfaceSwap;
|
|
/**
|
****************************************************************************************************
|
* AddrHtileBlockSize
|
*
|
* @brief
|
* Size of HTILE blocks, valid values are 4 or 8 for now
|
****************************************************************************************************
|
*/
|
typedef enum _AddrHtileBlockSize
|
{
|
ADDR_HTILE_BLOCKSIZE_4 = 4,
|
ADDR_HTILE_BLOCKSIZE_8 = 8,
|
} AddrHtileBlockSize;
|
|
|
/**
|
****************************************************************************************************
|
* AddrPipeCfg
|
*
|
* @brief
|
* The pipe configuration field specifies both the number of pipes and
|
* how pipes are interleaved on the surface.
|
* The expression of number of pipes, the shader engine tile size, and packer tile size
|
* is encoded in a PIPE_CONFIG register field.
|
* In general the number of pipes usually matches the number of memory channels of the
|
* hardware configuration.
|
* For hw configurations w/ non-pow2 memory number of memory channels, it usually matches
|
* the number of ROP units(? TODO: which registers??)
|
* The enum value = hw enum + 1 which is to reserve 0 for requesting default.
|
****************************************************************************************************
|
*/
|
typedef enum _AddrPipeCfg
|
{
|
ADDR_PIPECFG_INVALID = 0,
|
ADDR_PIPECFG_P2 = 1, /// 2 pipes,
|
ADDR_PIPECFG_P4_8x16 = 5, /// 4 pipes,
|
ADDR_PIPECFG_P4_16x16 = 6,
|
ADDR_PIPECFG_P4_16x32 = 7,
|
ADDR_PIPECFG_P4_32x32 = 8,
|
ADDR_PIPECFG_P8_16x16_8x16 = 9, /// 8 pipes
|
ADDR_PIPECFG_P8_16x32_8x16 = 10,
|
ADDR_PIPECFG_P8_32x32_8x16 = 11,
|
ADDR_PIPECFG_P8_16x32_16x16 = 12,
|
ADDR_PIPECFG_P8_32x32_16x16 = 13,
|
ADDR_PIPECFG_P8_32x32_16x32 = 14,
|
ADDR_PIPECFG_P8_32x64_32x32 = 15,
|
ADDR_PIPECFG_P16_32x32_8x16 = 17, /// 16 pipes
|
ADDR_PIPECFG_P16_32x32_16x16 = 18,
|
ADDR_PIPECFG_MAX = 19,
|
} AddrPipeCfg;
|
|
/**
|
****************************************************************************************************
|
* AddrTileType
|
*
|
* @brief
|
* Neutral enums that specifies micro tile type (MICRO_TILE_MODE)
|
****************************************************************************************************
|
*/
|
typedef enum _AddrTileType
|
{
|
ADDR_DISPLAYABLE = 0, ///< Displayable tiling
|
ADDR_NON_DISPLAYABLE = 1, ///< Non-displayable tiling, a.k.a thin micro tiling
|
ADDR_DEPTH_SAMPLE_ORDER = 2, ///< Same as non-displayable plus depth-sample-order
|
ADDR_ROTATED = 3, ///< Rotated displayable tiling
|
ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK
|
} AddrTileType;
|
|
////////////////////////////////////////////////////////////////////////////////////////////////////
|
//
|
// Type definitions: short system-independent names for address library types
|
//
|
////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
#if !defined(__APPLE__) || defined(HAVE_TSERVER)
|
|
#ifndef BOOL_32 // no bool type in C
|
/// @brief Boolean type, since none is defined in C
|
/// @ingroup type
|
#define BOOL_32 int
|
#endif
|
|
#ifndef INT_32
|
#define INT_32 int
|
#endif
|
|
#ifndef UINT_32
|
#define UINT_32 unsigned int
|
#endif
|
|
#ifndef INT_16
|
#define INT_16 short
|
#endif
|
|
#ifndef UINT_16
|
#define UINT_16 unsigned short
|
#endif
|
|
#ifndef INT_8
|
#define INT_8 char
|
#endif
|
|
#ifndef UINT_8
|
#define UINT_8 unsigned char
|
#endif
|
|
#ifndef NULL
|
#define NULL 0
|
#endif
|
|
#ifndef TRUE
|
#define TRUE 1
|
#endif
|
|
#ifndef FALSE
|
#define FALSE 0
|
#endif
|
|
//
|
// 64-bit integer types depend on the compiler
|
//
|
#if defined( __GNUC__ ) || defined( __WATCOMC__ )
|
#define INT_64 long long
|
#define UINT_64 unsigned long long
|
|
#elif defined( _WIN32 )
|
#define INT_64 __int64
|
#define UINT_64 unsigned __int64
|
|
#else
|
#error Unsupported compiler and/or operating system for 64-bit integers
|
|
/// @brief 64-bit signed integer type (compiler dependent)
|
/// @ingroup type
|
///
|
/// The addrlib defines a 64-bit signed integer type for either
|
/// Gnu/Watcom compilers (which use the first syntax) or for
|
/// the Windows VCC compiler (which uses the second syntax).
|
#define INT_64 long long OR __int64
|
|
/// @brief 64-bit unsigned integer type (compiler dependent)
|
/// @ingroup type
|
///
|
/// The addrlib defines a 64-bit unsigned integer type for either
|
/// Gnu/Watcom compilers (which use the first syntax) or for
|
/// the Windows VCC compiler (which uses the second syntax).
|
///
|
#define UINT_64 unsigned long long OR unsigned __int64
|
#endif
|
|
#endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER)
|
|
// ADDR64X is used to print addresses in hex form on both Windows and Linux
|
//
|
#if defined( __GNUC__ ) || defined( __WATCOMC__ )
|
#define ADDR64X "llx"
|
#define ADDR64D "lld"
|
|
#elif defined( _WIN32 )
|
#define ADDR64X "I64x"
|
#define ADDR64D "I64d"
|
|
#else
|
#error Unsupported compiler and/or operating system for 64-bit integers
|
|
/// @brief Addrlib device address 64-bit printf tag (compiler dependent)
|
/// @ingroup type
|
///
|
/// This allows printf to display an ADDR_64 for either the Windows VCC compiler
|
/// (which used this value) or the Gnu/Watcom compilers (which use "llx".
|
/// An example of use is printf("addr 0x%"ADDR64X"\n", address);
|
///
|
#define ADDR64X "llx" OR "I64x"
|
#define ADDR64D "lld" OR "I64d"
|
#endif
|
|
|
/// @brief Union for storing a 32-bit float or 32-bit integer
|
/// @ingroup type
|
///
|
/// This union provides a simple way to convert between a 32-bit float
|
/// and a 32-bit integer. It also prevents the compiler from producing
|
/// code that alters NaN values when assiging or coying floats.
|
/// Therefore, all address library routines that pass or return 32-bit
|
/// floating point data do so by passing or returning a FLT_32.
|
///
|
typedef union {
|
INT_32 i;
|
UINT_32 u;
|
float f;
|
} ADDR_FLT_32;
|
|
|
////////////////////////////////////////////////////////////////////////////////////////////////////
|
//
|
// Macros for controlling linking and building on multiple systems
|
//
|
////////////////////////////////////////////////////////////////////////////////////////////////////
|
#if defined(_MSC_VER)
|
#if defined(va_copy)
|
#undef va_copy //redefine va_copy to support VC2013
|
#endif
|
#endif
|
|
#if !defined(va_copy)
|
#define va_copy(dst, src) \
|
((void) memcpy(&(dst), &(src), sizeof(va_list)))
|
#endif
|
|
#endif // __ADDR_TYPES_H__
|
