/*
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* Copyright (C) 2014 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef ART_COMPILER_UTILS_MIPS64_MANAGED_REGISTER_MIPS64_H_
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#define ART_COMPILER_UTILS_MIPS64_MANAGED_REGISTER_MIPS64_H_
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#include "constants_mips64.h"
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#include "utils/managed_register.h"
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namespace art {
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namespace mips64 {
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const int kNumberOfGpuRegIds = kNumberOfGpuRegisters;
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const int kNumberOfGpuAllocIds = kNumberOfGpuRegisters;
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const int kNumberOfFpuRegIds = kNumberOfFpuRegisters;
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const int kNumberOfFpuAllocIds = kNumberOfFpuRegisters;
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const int kNumberOfVecRegIds = kNumberOfVectorRegisters;
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const int kNumberOfVecAllocIds = kNumberOfVectorRegisters;
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const int kNumberOfRegIds = kNumberOfGpuRegIds + kNumberOfFpuRegIds + kNumberOfVecRegIds;
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const int kNumberOfAllocIds = kNumberOfGpuAllocIds + kNumberOfFpuAllocIds + kNumberOfVecAllocIds;
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// Register ids map:
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// [0..R[ core registers (enum GpuRegister)
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// [R..F[ floating-point registers (enum FpuRegister)
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// [F..W[ MSA vector registers (enum VectorRegister)
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// where
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// R = kNumberOfGpuRegIds
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// F = R + kNumberOfFpuRegIds
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// W = F + kNumberOfVecRegIds
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// An instance of class 'ManagedRegister' represents a single Mips64 register.
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// A register can be one of the following:
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// * core register (enum GpuRegister)
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// * floating-point register (enum FpuRegister)
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// * MSA vector register (enum VectorRegister)
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//
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// 'ManagedRegister::NoRegister()' provides an invalid register.
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// There is a one-to-one mapping between ManagedRegister and register id.
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class Mips64ManagedRegister : public ManagedRegister {
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public:
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constexpr GpuRegister AsGpuRegister() const {
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CHECK(IsGpuRegister());
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return static_cast<GpuRegister>(id_);
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}
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constexpr FpuRegister AsFpuRegister() const {
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CHECK(IsFpuRegister());
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return static_cast<FpuRegister>(id_ - kNumberOfGpuRegIds);
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}
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constexpr VectorRegister AsVectorRegister() const {
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CHECK(IsVectorRegister());
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return static_cast<VectorRegister>(id_ - (kNumberOfGpuRegIds + kNumberOfFpuRegisters));
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}
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constexpr FpuRegister AsOverlappingFpuRegister() const {
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CHECK(IsValidManagedRegister());
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return static_cast<FpuRegister>(AsVectorRegister());
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}
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constexpr VectorRegister AsOverlappingVectorRegister() const {
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CHECK(IsValidManagedRegister());
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return static_cast<VectorRegister>(AsFpuRegister());
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}
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constexpr bool IsGpuRegister() const {
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CHECK(IsValidManagedRegister());
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return (0 <= id_) && (id_ < kNumberOfGpuRegIds);
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}
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constexpr bool IsFpuRegister() const {
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CHECK(IsValidManagedRegister());
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const int test = id_ - kNumberOfGpuRegIds;
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return (0 <= test) && (test < kNumberOfFpuRegIds);
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}
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constexpr bool IsVectorRegister() const {
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CHECK(IsValidManagedRegister());
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const int test = id_ - (kNumberOfGpuRegIds + kNumberOfFpuRegIds);
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return (0 <= test) && (test < kNumberOfVecRegIds);
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}
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void Print(std::ostream& os) const;
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// Returns true if the two managed-registers ('this' and 'other') overlap.
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// Either managed-register may be the NoRegister. If both are the NoRegister
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// then false is returned.
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bool Overlaps(const Mips64ManagedRegister& other) const;
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static constexpr Mips64ManagedRegister FromGpuRegister(GpuRegister r) {
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CHECK_NE(r, kNoGpuRegister);
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return FromRegId(r);
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}
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static constexpr Mips64ManagedRegister FromFpuRegister(FpuRegister r) {
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CHECK_NE(r, kNoFpuRegister);
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return FromRegId(r + kNumberOfGpuRegIds);
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}
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static constexpr Mips64ManagedRegister FromVectorRegister(VectorRegister r) {
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CHECK_NE(r, kNoVectorRegister);
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return FromRegId(r + kNumberOfGpuRegIds + kNumberOfFpuRegIds);
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}
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private:
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constexpr bool IsValidManagedRegister() const {
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return (0 <= id_) && (id_ < kNumberOfRegIds);
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}
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constexpr int RegId() const {
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CHECK(!IsNoRegister());
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return id_;
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}
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int AllocId() const {
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CHECK(IsValidManagedRegister());
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CHECK_LT(id_, kNumberOfAllocIds);
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return id_;
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}
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int AllocIdLow() const;
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int AllocIdHigh() const;
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friend class ManagedRegister;
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explicit constexpr Mips64ManagedRegister(int reg_id) : ManagedRegister(reg_id) {}
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static constexpr Mips64ManagedRegister FromRegId(int reg_id) {
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Mips64ManagedRegister reg(reg_id);
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CHECK(reg.IsValidManagedRegister());
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return reg;
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}
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};
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std::ostream& operator<<(std::ostream& os, const Mips64ManagedRegister& reg);
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} // namespace mips64
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constexpr inline mips64::Mips64ManagedRegister ManagedRegister::AsMips64() const {
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mips64::Mips64ManagedRegister reg(id_);
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CHECK(reg.IsNoRegister() || reg.IsValidManagedRegister());
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return reg;
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}
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} // namespace art
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#endif // ART_COMPILER_UTILS_MIPS64_MANAGED_REGISTER_MIPS64_H_
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