/*
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* * Copyright 2000-2009
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* * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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* *
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* * SPDX-License-Identifier: GPL-2.0+
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* */
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#ifndef _SUNXI_KEY_H
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#define _SUNXI_KEY_H
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#include "asm/arch-sunxi/cpu.h"
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struct sunxi_lradc {
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volatile u32 ctrl; /* lradc control */
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volatile u32 intc; /* interrupt control */
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volatile u32 ints; /* interrupt status */
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volatile u32 data0; /* lradc 0 data */
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volatile u32 data1; /* lradc 1 data */
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};
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#define SUNXI_KEY_ADC_CRTL (SUNXI_KEYADC_BASE + 0x00)
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#define SUNXI_KEY_ADC_INTC (SUNXI_KEYADC_BASE + 0x04)
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#define SUNXI_KEY_ADC_INTS (SUNXI_KEYADC_BASE + 0x08)
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#define SUNXI_KEY_ADC_DATA0 (SUNXI_KEYADC_BASE + 0x0C)
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#define LRADC_EN (0x1) /* LRADC enable */
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#define LRADC_SAMPLE_RATE 0x2 /* 32.25 Hz */
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#define LEVELB_VOL 0x2 /* 0x33(~1.6v) */
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#define LRADC_HOLD_EN (0x1 << 6) /* sample hold enable */
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#define KEY_MODE_SELECT 0x0 /* normal mode */
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#define ADC0_DATA_PENDING (1 << 0) /* adc0 has data */
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#define ADC0_KEYDOWN_PENDING (1 << 1) /* key down */
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#define ADC0_HOLDKEY_PENDING (1 << 2) /* key hold */
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#define ADC0_ALRDY_HOLD_PENDING (1 << 3) /* key already hold */
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#define ADC0_KEYUP_PENDING (1 << 4) /* key up */
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#define GP_CTRL (SUNXI_GPADC_BASE+0x04)
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#define GP_CS_EN (SUNXI_GPADC_BASE+0x08)
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#define GP_DATA_INTC (SUNXI_GPADC_BASE+0x28)
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#define GP_DATA_INTS (SUNXI_GPADC_BASE+0x38)
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#define GP_CH0_DATA (SUNXI_GPADC_BASE+0x80)
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#define GPADC0_DATA_PENDING (1 << 0) /* gpadc0 has data */
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int sunxi_key_init(void);
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int sunxi_key_exit(void);
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int sunxi_key_read(void);
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int sunxi_key_probe(void);
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int sunxi_key_clock_open(void);
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int sunxi_key_clock_close(void);
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#endif
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