/*
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* drivers/cpufreq/sunxi-cpufreq.c
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*
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* Copyright (c) 2014 softwinner.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/cpufreq.h>
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#include <linux/cpu.h>
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#include <linux/cpu_cooling.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/regulator/consumer.h>
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#include <linux/pm_opp.h>
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#include <linux/arisc/arisc.h>
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#include <linux/sunxi-sid.h>
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#include <asm/cacheflush.h>
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#include <linux/slab.h>
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#include <linux/sunxi-cpufreq.h>
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#include <linux/delay.h>
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#ifdef CONFIG_SUNXI_ARISC
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#include <linux/arisc/arisc.h>
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#endif
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#define CPUFREQ_DBG(format, args...) \
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pr_debug("[cpu_freq] DBG: "format, ##args)
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#define CPUFREQ_ERR(format, args...) \
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pr_err("[cpu_freq] ERR: "format, ##args)
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#ifdef CONFIG_DEBUG_FS
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/* sunxi CPUFreq driver data structure */
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static struct {
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s64 cpufreq_set_us;
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s64 cpufreq_get_us;
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} sunxi_cpufreq;
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#endif
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static struct thermal_cooling_device *cdev;
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/* cpufreq_dvfs_table is global default dvfs table */
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static struct cpufreq_dvfs_table cpufreq_dvfs_table[DVFS_VF_TABLE_MAX] = {
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/*
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* cluster0
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* cpu0 vdd is 1.20v if cpu freq is (600Mhz, 1008Mhz]
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* cpu0 vdd is 1.20v if cpu freq is (420Mhz, 600Mhz]
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* cpu0 vdd is 1.20v if cpu freq is (360Mhz, 420Mhz]
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* cpu0 vdd is 1.20v if cpu freq is (300Mhz, 360Mhz]
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* cpu0 vdd is 1.20v if cpu freq is (240Mhz, 300Mhz]
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* cpu0 vdd is 1.20v if cpu freq is (120Mhz, 240Mhz]
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* cpu0 vdd is 1.20v if cpu freq is (60Mhz, 120Mhz]
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* cpu0 vdd is 1.20v if cpu freq is (0Mhz, 60Mhz]
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*/
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/* freq voltage axi_div */
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{900000000, 1200, 3},
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{600000000, 1200, 3},
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{420000000, 1200, 3},
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{360000000, 1200, 3},
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{300000000, 1200, 3},
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{240000000, 1200, 3},
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{120000000, 1200, 3},
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{60000000, 1200, 3},
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{0, 1200, 3},
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{0, 1200, 3},
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{0, 1200, 3},
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{0, 1200, 3},
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{0, 1200, 3},
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{0, 1200, 3},
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{0, 1200, 3},
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{0, 1200, 3}
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};
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#ifdef CONFIG_ARM_SUNXI_PSENSOR_BIN
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struct psensor_range {
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unsigned int min;
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unsigned int max;
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};
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static struct psensor_range psensor_range[8];
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static int psensor_range_count;
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#define PSENSOR_REG 0x0300621c
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#endif
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#ifdef CONFIG_SCHED_SMP_DCMP
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#ifdef CONFIG_ARCH_SUN8IW17P1
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#define CLUSTER_MAX_CORES 3
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struct clk *cluster1_clk;
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#endif
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#endif
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extern unsigned long dev_pm_opp_axi_bus_divide_ratio(struct dev_pm_opp *opp);
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extern int dev_pm_opp_of_get_sharing_cpus_by_soc_bin(struct device *cpu_dev,
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cpumask_var_t cpumask, int soc_bin);
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extern int dev_pm_opp_of_cpumask_add_table_by_soc_bin(cpumask_var_t cpumask,
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int soc_bin);
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static unsigned int sunxi_cpufreq_get(unsigned int cpu)
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{
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unsigned int current_freq = 0;
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#ifdef CONFIG_DEBUG_FS
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ktime_t calltime = ktime_get();
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#endif
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current_freq = cpufreq_generic_get(cpu);
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#ifdef CONFIG_DEBUG_FS
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sunxi_cpufreq.cpufreq_get_us =
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ktime_to_us(ktime_sub(ktime_get(), calltime));
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#endif
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return current_freq;
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}
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#ifdef CONFIG_SUNXI_ARISC
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static int sunxi_set_cpufreq_and_voltage(struct cpufreq_policy *policy,
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unsigned long freq)
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{
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int ret = 0;
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#ifdef CONFIG_SCHED_SMP_DCMP
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int cpu;
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#endif
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#ifdef CONFIG_SUNXI_CPUFREQ_ASYN
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unsigned long timeout;
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arisc_dvfs_set_cpufreq(freq, ARISC_DVFS_PLL1, ARISC_DVFS_ASYN,
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NULL, NULL);
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/* CPUS max latency for cpu freq*/
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timeout = 15;
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#ifdef CONFIG_SCHED_SMP_DCMP
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for_each_online_cpu(cpu) {
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if (cpu >= CLUSTER_MAX_CORES) {
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// CPUFREQ_DBG("Set other cluster freq: %d\n", freq);
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arisc_dvfs_set_cpufreq(freq, ARISC_DVFS_PLL2,
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ARISC_DVFS_ASYN, NULL, NULL);
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break;
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}
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}
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while (timeout-- && (clk_get_rate(policy->clk) != freq*1000) &&
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(clk_get_rate(policy->clk) != freq*1000))
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usleep_range(900, 1000);
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if ((clk_get_rate(policy->clk) != freq*1000) || (clk_get_rate(policy->clk) != freq*1000))
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ret = -1;
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#else
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while (timeout-- && (clk_get_rate(policy->clk) != freq*1000))
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msleep(1);
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if (clk_get_rate(policy->clk) != freq*1000)
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ret = -1;
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#endif
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#else
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ret = arisc_dvfs_set_cpufreq(freq, ARISC_DVFS_PLL1, ARISC_DVFS_SYN,
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NULL, NULL);
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#ifdef CONFIG_SCHED_SMP_DCMP
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if (ret)
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return ret;
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for_each_online_cpu(cpu) {
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if (cpu >= CLUSTER_MAX_CORES) {
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// CPUFREQ_DBG("Set other cluster freq: %d\n", freq);
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ret = arisc_dvfs_set_cpufreq(freq, ARISC_DVFS_PLL2, ARISC_DVFS_SYN,
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NULL, NULL);
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break;
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}
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}
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#endif
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#endif
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return ret;
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}
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#else
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static int sunxi_set_cpufreq_and_voltage(struct cpufreq_policy *policy,
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unsigned long freq)
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{
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struct device *cpu_dev;
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cpu_dev = get_cpu_device(policy->cpu);
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return dev_pm_opp_set_rate(cpu_dev, freq * 1000);
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}
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#endif
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static int sunxi_cpufreq_target_index(struct cpufreq_policy *policy,
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unsigned int index)
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{
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int ret = 0;
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unsigned long freq;
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#ifdef CONFIG_DEBUG_FS
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ktime_t calltime;
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#endif
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freq = policy->freq_table[index].frequency;
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#ifdef CONFIG_DEBUG_FS
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calltime = ktime_get();
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#endif
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/* try to set cpu frequency */
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ret = sunxi_set_cpufreq_and_voltage(policy, freq);
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if (ret)
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CPUFREQ_ERR("Set cpu frequency to %luKHz failed!\n", freq);
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#ifdef CONFIG_DEBUG_FS
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sunxi_cpufreq.cpufreq_set_us = ktime_to_us(ktime_sub(ktime_get(),
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calltime));
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#endif
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return ret;
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}
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static int sunxi_cpufreq_set_vf(struct cpufreq_frequency_table *table,
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unsigned int cpu)
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{
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struct cpufreq_frequency_table *pos;
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struct dev_pm_opp *opp;
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struct device *dev;
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unsigned long freq;
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int ret, num = 0;
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int max_opp_num = 0;
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void *kvir = NULL;
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dev = get_cpu_device(cpu);
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max_opp_num = dev_pm_opp_get_opp_count(dev);
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#ifndef CONFIG_ARCH_SUN8IW12P1
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for (pos = table; max_opp_num > 0; --max_opp_num) {
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freq = pos[max_opp_num - 1].frequency * 1000;
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#else
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cpufreq_for_each_valid_entry(pos, table) {
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freq = pos->frequency * 1000;
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#endif
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CPUFREQ_DBG("freq: %lu\n", freq);
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rcu_read_lock();
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opp = dev_pm_opp_find_freq_ceil(dev, &freq);
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if (IS_ERR(opp)) {
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ret = PTR_ERR(opp);
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dev_err(dev,
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"%s: failed to find OPP for freq %lu (%d)\n",
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__func__, freq, ret);
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rcu_read_unlock();
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return ret;
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}
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cpufreq_dvfs_table[num].voltage =
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dev_pm_opp_get_voltage(opp) / 1000;
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cpufreq_dvfs_table[num].freq = dev_pm_opp_get_freq(opp);
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cpufreq_dvfs_table[num].axi_div =
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dev_pm_opp_axi_bus_divide_ratio(opp);
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rcu_read_unlock();
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CPUFREQ_DBG("num:%d, volatge:%d, freq:%d, axi_div:%d ,%s\n",
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num, cpufreq_dvfs_table[num].voltage,
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cpufreq_dvfs_table[num].freq,
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cpufreq_dvfs_table[num].axi_div, __func__);
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num++;
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}
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kvir =
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kmalloc(num * sizeof(struct cpufreq_frequency_table), GFP_KERNEL);
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if (kvir == NULL) {
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CPUFREQ_ERR("kmalloc error for transmiting vf table\n");
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return -1;
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}
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memcpy((void *)kvir, (void *)cpufreq_dvfs_table,
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num * sizeof(struct cpufreq_frequency_table));
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__dma_flush_area((void *)kvir, num * sizeof(struct cpufreq_frequency_table));
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#ifdef CONFIG_SUNXI_ARISC
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arisc_dvfs_cfg_vf_table(0, num, virt_to_phys(kvir));
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#endif
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kfree(kvir);
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kvir = NULL;
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return 0;
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}
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#ifdef CONFIG_ARM_SUNXI_PSENSOR_BIN
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static int get_psensor_range(void)
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{
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int i = 0;
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char name[20];
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int psensor_count = 0;
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struct device_node *psensor_node = NULL;
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psensor_node = of_find_node_by_path("/psensor_table");
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if (psensor_node == NULL) {
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pr_err("%s(%d) has no pensor node\n", __func__, __LINE__);
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return -1;
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}
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if (of_property_read_u32(psensor_node, "psensor_count",
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&psensor_count)) {
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pr_err("%s(%d) get psensor count error\n", __func__, __LINE__);
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return -1;
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}
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psensor_range_count = psensor_count;
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for (i = 0; i < psensor_count; i++) {
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sprintf(name, "prange_min_%d", i);
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if (of_property_read_u32(psensor_node, name,
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&psensor_range[i].min)) {
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pr_err("get prange_min_%d failed\n", i);
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return -1;
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}
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sprintf(name, "prange_max_%d", i);
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if (of_property_read_u32(psensor_node, name,
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&psensor_range[i].max)) {
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pr_err("get prange_max_%d failed\n", i);
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return -1;
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}
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}
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for (i = 0; i < psensor_count; ++i) {
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pr_debug("psensor_range_%d.min=%d; psensor_range_%d.max=%d\n",
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i, psensor_range[i].min, i, psensor_range[i].max);
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}
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return 0;
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}
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static int get_psensor_bin(void)
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{
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unsigned int soc_bin;
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void __iomem *bin_reg = NULL;
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int i;
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bin_reg = ioremap(PSENSOR_REG, 16);
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soc_bin = readl(bin_reg);
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/*use the high 16 bit*/
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soc_bin >>= 16;
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iounmap(bin_reg);
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for (i = 0; i < psensor_range_count; ++i) {
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if (soc_bin >= psensor_range[i].min && soc_bin <=
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psensor_range[i].max)
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break;
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}
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if (i >= psensor_range_count)
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return -1;
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return i;
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}
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#endif
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static int sunxi_cpufreq_init(struct cpufreq_policy *policy)
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{
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struct device *cpu_dev;
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struct cpufreq_frequency_table *freq_table;
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struct dev_pm_opp *suspend_opp;
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struct clk *cpu_clk;
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const char *regulator_name;
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struct opp_table *table;
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unsigned int transition_latency;
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int ret, soc_bin;
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unsigned int table_count;
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struct device_node *dvfs_main_np;
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#ifdef CONFIG_SCHED_SMP_DCMP
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struct device *cluster1_cpu_dev;
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#endif
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dvfs_main_np = of_find_node_by_path("/opp_dvfs_table");
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if (!dvfs_main_np) {
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CPUFREQ_ERR("No opp dvfs table node found\n");
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return -ENODEV;
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}
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#ifdef CONFIG_ARM_SUNXI_PSENSOR_BIN
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ret = get_psensor_range();
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if (ret < 0)
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return -EINVAL;
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#endif
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if (of_property_read_u32(dvfs_main_np, "opp_table_count",
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&table_count)) {
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CPUFREQ_ERR("get vf_table_count failed\n");
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return -EINVAL;
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}
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if (table_count == 1) {
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pr_info("%s: only one opp_table\n", __func__);
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soc_bin = 0;
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} else {
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#ifdef CONFIG_ARM_SUNXI_PSENSOR_BIN
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soc_bin = get_psensor_bin();
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#else
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soc_bin = sunxi_get_soc_bin();
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if (soc_bin == 0)
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soc_bin = 2;
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if (soc_bin == 1 || soc_bin == 2 || soc_bin == 3)
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soc_bin--;
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#endif
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if (soc_bin < 0) {
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pr_err("%s: get the wrong soc bin!\n", __func__);
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return -EINVAL;
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}
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pr_info("%s: support more opp_table and soc bin is %d\n",
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__func__, soc_bin);
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}
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cpu_dev = get_cpu_device(policy->cpu);
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CPUFREQ_ERR("DEBUG: get cpu %d device\n", policy->cpu);
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if (!cpu_dev) {
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CPUFREQ_ERR("Failed to get cpu%d device\n", policy->cpu);
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return -ENODEV;
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}
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cpu_clk = clk_get(cpu_dev, NULL);
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if (IS_ERR_OR_NULL(cpu_clk)) {
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ret = PTR_ERR(cpu_clk);
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CPUFREQ_ERR("Unable to get PLL CPU clock\n");
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return ret;
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}
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policy->clk = cpu_clk;
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#ifdef CONFIG_SCHED_SMP_DCMP
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cluster1_cpu_dev = get_cpu_device(CLUSTER_MAX_CORES);
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if (!cluster1_cpu_dev) {
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CPUFREQ_ERR("Failed to get other cluster cpu%d device\n", policy->cpu);
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return -ENODEV;
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}
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cluster1_clk = clk_get(cluster1_cpu_dev, NULL);
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if (IS_ERR_OR_NULL(cluster1_clk)) {
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ret = PTR_ERR(cluster1_clk);
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CPUFREQ_ERR("Unable to get OTHER cluster PLL CPU clock\n");
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return ret;
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}
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#endif
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regulator_name = of_get_property(cpu_dev->of_node, "regulators", NULL);
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if (!regulator_name) {
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CPUFREQ_ERR("Unable to get regulator\n");
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goto lable_1;
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}
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table = dev_pm_opp_set_regulator(cpu_dev, regulator_name);
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if (!table) {
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CPUFREQ_ERR("Failed to set regulator for cpu\n");
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goto out_err_clk_pll;
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}
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lable_1:
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/* set policy->cpus according to operating-points-v2 */
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ret = dev_pm_opp_of_get_sharing_cpus_by_soc_bin(cpu_dev,
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policy->cpus, soc_bin);
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if (ret) {
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CPUFREQ_ERR("OPP-v2 opp-shared Error\n");
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goto out_err_clk_pll;
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}
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ret = dev_pm_opp_of_cpumask_add_table_by_soc_bin(policy->cpus,
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soc_bin);
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if (ret) {
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CPUFREQ_ERR("Failed to add opp table\n");
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goto out_err_clk_pll;
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}
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ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
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if (ret) {
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CPUFREQ_ERR("Failed to init cpufreq table: %d\n", ret);
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goto out_err_free_opp;
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}
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ret = cpufreq_table_validate_and_show(policy, freq_table);
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if (ret) {
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CPUFREQ_ERR("Invalid frequency table: %d\n", ret);
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goto out_err_free_opp;
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}
|
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transition_latency = dev_pm_opp_get_max_transition_latency(cpu_dev);
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if (!transition_latency)
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transition_latency = CPUFREQ_ETERNAL;
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policy->cpuinfo.transition_latency = transition_latency;
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rcu_read_lock();
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suspend_opp = dev_pm_opp_get_suspend_opp(cpu_dev);
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if (suspend_opp)
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policy->suspend_freq = dev_pm_opp_get_freq(suspend_opp) / 1000;
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rcu_read_unlock();
|
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ret = sunxi_cpufreq_set_vf(freq_table, policy->cpu);
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if (ret) {
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CPUFREQ_ERR("sunxi_cpufreq_set_vf failed: %d\n", ret);
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goto out_err_free_opp;
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}
|
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return 0;
|
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out_err_free_opp:
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dev_pm_opp_of_cpumask_remove_table(policy->cpus);
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out_err_clk_pll:
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clk_put(cpu_clk);
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return ret;
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}
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static int sunxi_cpufreq_exit(struct cpufreq_policy *policy)
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{
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struct device *cpu_dev;
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|
cpu_dev = get_cpu_device(policy->cpu);
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dev_pm_opp_free_cpufreq_table(cpu_dev, &policy->freq_table);
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dev_pm_opp_of_cpumask_remove_table(policy->related_cpus);
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//dev_pm_opp_put_regulator(cpu_dev);
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clk_put(policy->clk);
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return 0;
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}
|
|
int sunxi_get_static_power(cpumask_t *cpumask, int interval,
|
unsigned long voltage, u32 *power)
|
{
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*power = 1;
|
return 0;
|
}
|
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static void sunxi_cpufreq_ready(struct cpufreq_policy *policy)
|
{
|
struct device *cpu_dev = get_cpu_device(policy->cpu);
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struct device_node *np;
|
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np = of_node_get(cpu_dev->of_node);
|
if (WARN_ON(!np))
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return;
|
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if (of_find_property(np, "#cooling-cells", NULL)) {
|
u32 power_coefficient = 0;
|
|
of_property_read_u32(np, "dynamic-power-coefficient",
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&power_coefficient);
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|
cdev = of_cpufreq_power_cooling_register(np,
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policy->related_cpus,
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power_coefficient, &sunxi_get_static_power);
|
if (IS_ERR(cdev)) {
|
dev_err(cpu_dev,
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"running cpufreq without cooling device: %ld\n",
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PTR_ERR(cdev));
|
cdev = NULL;
|
}
|
}
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of_node_put(np);
|
}
|
|
static struct freq_attr *sunxi_cpufreq_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
|
NULL,
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};
|
|
static struct cpufreq_driver sunxi_cpufreq_driver = {
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.name = "cpufreq-sunxi",
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.attr = sunxi_cpufreq_attr,
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.init = sunxi_cpufreq_init,
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.get = sunxi_cpufreq_get,
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.target_index = sunxi_cpufreq_target_index,
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.exit = sunxi_cpufreq_exit,
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.ready = sunxi_cpufreq_ready,
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.verify = cpufreq_generic_frequency_table_verify,
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.suspend = cpufreq_generic_suspend,
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};
|
|
#ifdef CONFIG_ARCH_SUN8IW7P1
|
static int set_pll_cpu_lock_time(void)
|
{
|
unsigned int value;
|
void __iomem *lock_time_vbase = NULL;
|
#define PLL_CPU_LOCK_TIME_REG (0x01c20000 + 0x204)
|
|
lock_time_vbase = ioremap(PLL_CPU_LOCK_TIME_REG, 4);
|
if (lock_time_vbase == NULL) {
|
pr_err("ioremap pll cpu lock time error\n");
|
return -1;
|
}
|
|
value = readl(lock_time_vbase);
|
value &= ~(0xffff);
|
value |= 0x400;
|
writel(value, lock_time_vbase);
|
|
iounmap(lock_time_vbase);
|
return 0;
|
}
|
#endif
|
|
static int __init sunxi_cpufreq_initcall(void)
|
{
|
int ret;
|
|
#ifdef CONFIG_DEBUG_FS
|
sunxi_cpufreq.cpufreq_set_us = 0;
|
sunxi_cpufreq.cpufreq_get_us = 0;
|
#endif
|
|
#ifdef CONFIG_ARCH_SUN8IW7P1
|
if (set_pll_cpu_lock_time())
|
return -1;
|
#endif
|
ret = cpufreq_register_driver(&sunxi_cpufreq_driver);
|
if (ret)
|
CPUFREQ_ERR("Failed register driver\n");
|
|
return ret;
|
}
|
|
static void __exit sunxi_cpufreq_exitcall(void)
|
{
|
cpufreq_unregister_driver(&sunxi_cpufreq_driver);
|
}
|
|
module_init(sunxi_cpufreq_initcall);
|
module_exit(sunxi_cpufreq_exitcall);
|
|
#ifdef CONFIG_DEBUG_FS
|
#include <linux/debugfs.h>
|
|
static struct dentry *debugfs_cpufreq_root;
|
|
static int cpufreq_debugfs_gettime_show(struct seq_file *s, void *data)
|
{
|
seq_printf(s, "%lld\n", sunxi_cpufreq.cpufreq_get_us);
|
return 0;
|
}
|
|
static int cpufreq_debugfs_gettime_open(struct inode *inode, struct file *file)
|
{
|
return single_open(file, cpufreq_debugfs_gettime_show,
|
inode->i_private);
|
}
|
|
static const struct file_operations cpufreq_debugfs_gettime_fops = {
|
.open = cpufreq_debugfs_gettime_open,
|
.read = seq_read,
|
};
|
|
static int cpufreq_debugfs_settime_show(struct seq_file *s, void *data)
|
{
|
seq_printf(s, "%lld\n", sunxi_cpufreq.cpufreq_set_us);
|
return 0;
|
}
|
|
static int cpufreq_debugfs_settime_open(struct inode *inode, struct file *file)
|
{
|
return single_open(file, cpufreq_debugfs_settime_show,
|
inode->i_private);
|
}
|
|
static const struct file_operations cpufreq_debugfs_settime_fops = {
|
.open = cpufreq_debugfs_settime_open,
|
.read = seq_read,
|
};
|
|
static int __init cpufreq_debugfs_init(void)
|
{
|
int err = 0;
|
|
debugfs_cpufreq_root = debugfs_create_dir("cpufreq", 0);
|
if (!debugfs_cpufreq_root)
|
return -ENOMEM;
|
|
if (!debugfs_create_file("get_time", 0444, debugfs_cpufreq_root, NULL,
|
&cpufreq_debugfs_gettime_fops)) {
|
err = -ENOMEM;
|
goto out;
|
}
|
|
if (!debugfs_create_file("set_time", 0444, debugfs_cpufreq_root, NULL,
|
&cpufreq_debugfs_settime_fops)) {
|
err = -ENOMEM;
|
goto out;
|
}
|
|
return 0;
|
|
out:
|
debugfs_remove_recursive(debugfs_cpufreq_root);
|
return err;
|
}
|
|
static void __exit cpufreq_debugfs_exit(void)
|
{
|
debugfs_remove_recursive(debugfs_cpufreq_root);
|
}
|
|
late_initcall(cpufreq_debugfs_init);
|
module_exit(cpufreq_debugfs_exit);
|
|
#endif /* CONFIG_DEBUG_FS */
|
|
MODULE_DESCRIPTION("cpufreq driver for sunxi SOCs");
|
MODULE_LICENSE("GPL");
|
