/* drivers/input/touchscreen/gt813_827_828_update.c
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*
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* 2010 - 2012 Goodix Technology.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be a reference
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* to you, when you are integrating the GOODiX's CTP IC into your system,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* Latest Version:1.6
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* Author: andrew@goodix.com
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* Revision Record:
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* V1.0:
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* first release. By Andrew, 2012/08/31
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* V1.2:
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* add force update,GT9110P pid map. By Andrew, 2012/10/15
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* V1.4:
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* 1. add config auto update function;
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* 2. modify enter_update_mode;
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* 3. add update file cal checksum.
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* By Andrew, 2012/12/12
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* V1.6:
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* 1. replace guitar_client with i2c_connect_client;
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* 2. support firmware header array update.
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* By Meta, 2013/03/11
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*/
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#include <linux/kthread.h>
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#include "gt9xx_ts.h"
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#if GTP_HEADER_FW_UPDATE
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#include <linux/namei.h>
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#include "gt9xx_firmware.h"
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#endif
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#define GUP_REG_HW_INFO 0x4220
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#define GUP_REG_FW_MSG 0x41E4
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#define GUP_REG_PID_VID 0x8140
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#define GUP_SEARCH_FILE_TIMES 50
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#define UPDATE_FILE_PATH_2 "/data/_goodix_update_.bin"
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#define UPDATE_FILE_PATH_1 "/sdcard/_goodix_update_.bin"
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#define CONFIG_FILE_PATH_1 "/data/_goodix_config_.cfg"
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#define CONFIG_FILE_PATH_2 "/sdcard/_goodix_config_.cfg"
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#define FW_HEAD_LENGTH 14
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#define FW_SECTION_LENGTH 0x2000
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#define FW_DSP_ISP_LENGTH 0x1000
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#define FW_DSP_LENGTH 0x1000
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#define FW_BOOT_LENGTH 0x800
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#define PACK_SIZE 256
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#define MAX_FRAME_CHECK_TIME 5
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#define _bRW_MISCTL__SRAM_BANK 0x4048
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#define _bRW_MISCTL__MEM_CD_EN 0x4049
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#define _bRW_MISCTL__CACHE_EN 0x404B
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#define _bRW_MISCTL__TMR0_EN 0x40B0
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#define _rRW_MISCTL__SWRST_B0_ 0x4180
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#define _bWO_MISCTL__CPU_SWRST_PULSE 0x4184
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#define _rRW_MISCTL__BOOTCTL_B0_ 0x4190
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#define _rRW_MISCTL__BOOT_OPT_B0_ 0x4218
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#define _rRW_MISCTL__BOOT_CTL_ 0x5094
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#define FAIL 0
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#define SUCCESS 1
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#pragma pack(1)
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typedef struct
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{
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u8 hw_info[4]; //hardware info//
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u8 pid[8]; //product id //
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u16 vid; //version id //
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}st_fw_head;
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#pragma pack()
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typedef struct
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{
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u8 force_update;
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u8 fw_flag;
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struct file *file;
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struct file *cfg_file;
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st_fw_head ic_fw_msg;
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mm_segment_t old_fs;
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}st_update_msg;
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st_update_msg update_msg;
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u16 show_len;
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u16 total_len;
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u8 got_file_flag = 0;
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extern void gtp_reset_guitar(struct i2c_client *client, s32 ms);
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extern s32 gtp_send_cfg(struct i2c_client *client);
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extern struct i2c_client * i2c_connect_client;
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extern void gtp_irq_enable(struct goodix_ts_data *ts);
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extern void gtp_irq_disable(struct goodix_ts_data *ts);
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extern void gtp_set_io_int(void);
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extern void gtp_io_init(int ms);
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extern void gtp_set_int_value(int status);
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extern int ctp_wakeup(int status,int ms);
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/*******************************************************
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Function:
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Read data from the i2c slave device.
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Input:
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client: i2c device.
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buf[0~1]: read start address.
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buf[2~len-1]: read data buffer.
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len: GTP_ADDR_LENGTH + read bytes count
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Output:
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numbers of i2c_msgs to transfer:
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2: succeed, otherwise: failed
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*********************************************************/
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s32 gup_i2c_read(struct i2c_client *client, u8 *buf, s32 len)
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{
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struct i2c_msg msgs[2];
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s32 ret=-1;
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s32 retries = 0;
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GTP_DEBUG_FUNC();
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msgs[0].flags = !I2C_M_RD;
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msgs[0].addr = client->addr;
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msgs[0].len = GTP_ADDR_LENGTH;
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msgs[0].buf = &buf[0];
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msgs[1].flags = I2C_M_RD;
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msgs[1].addr = client->addr;
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msgs[1].len = len - GTP_ADDR_LENGTH;
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msgs[1].buf = &buf[GTP_ADDR_LENGTH];
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while(retries < 5) {
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ret = i2c_transfer(client->adapter, msgs, 2);
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if(ret == 2)break;
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retries++;
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}
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return ret;
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}
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/*******************************************************
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Function:
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Write data to the i2c slave device.
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Input:
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client: i2c device.
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buf[0~1]: write start address.
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buf[2~len-1]: data buffer
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len: GTP_ADDR_LENGTH + write bytes count
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Output:
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numbers of i2c_msgs to transfer:
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1: succeed, otherwise: failed
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*********************************************************/
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s32 gup_i2c_write(struct i2c_client *client,u8 *buf,s32 len)
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{
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struct i2c_msg msg;
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s32 ret=-1;
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s32 retries = 0;
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GTP_DEBUG_FUNC();
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msg.flags = !I2C_M_RD;
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msg.addr = client->addr;
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msg.len = len;
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msg.buf = buf;
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while(retries < 5){
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ret = i2c_transfer(client->adapter, &msg, 1);
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if (ret == 1)break;
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retries++;
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}
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return ret;
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}
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static u8 gup_get_ic_msg(struct i2c_client *client, u16 addr, u8* msg, s32 len)
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{
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s32 i = 0;
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msg[0] = (addr >> 8) & 0xff;
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msg[1] = addr & 0xff;
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for (i = 0; i < 5; i++) {
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if (gup_i2c_read(client, msg, GTP_ADDR_LENGTH + len) > 0) {
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break;
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}
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}
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if (i >= 5) {
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GTP_ERROR("Read data from 0x%02x%02x failed!", msg[0], msg[1]);
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return FAIL;
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}
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return SUCCESS;
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}
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static u8 gup_set_ic_msg(struct i2c_client *client, u16 addr, u8 val)
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{
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s32 i = 0;
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u8 msg[3];
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msg[0] = (addr >> 8) & 0xff;
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msg[1] = addr & 0xff;
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msg[2] = val;
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for (i = 0; i < 5; i++) {
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if (gup_i2c_write(client, msg, GTP_ADDR_LENGTH + 1) > 0) {
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break;
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}
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}
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if (i >= 5) {
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GTP_ERROR("Set data to 0x%02x%02x failed!", msg[0], msg[1]);
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return FAIL;
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}
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return SUCCESS;
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}
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static u8 gup_get_ic_fw_msg(struct i2c_client *client)
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{
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s32 ret = -1;
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u8 retry = 0;
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u8 buf[16];
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u8 i;
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//step1:get hardware info
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ret = gup_get_ic_msg(client, GUP_REG_HW_INFO, buf, 4);
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if(FAIL == ret) {
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GTP_ERROR("Read hardware info fail.");
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return ret;
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}
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memcpy(update_msg.ic_fw_msg.hw_info, &buf[GTP_ADDR_LENGTH], 4);
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for(i=0; i<4; i++) {
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update_msg.ic_fw_msg.hw_info[i] = buf[GTP_ADDR_LENGTH + 3 - i];
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}
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GTP_DEBUG("IC Hardware info:%02x%02x%02x%02x", update_msg.ic_fw_msg.hw_info[0], update_msg.ic_fw_msg.hw_info[1],
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update_msg.ic_fw_msg.hw_info[2], update_msg.ic_fw_msg.hw_info[3]);
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//step2:get firmware message
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for(retry=0; retry<2; retry++) {
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ret = gup_get_ic_msg(client, GUP_REG_FW_MSG, buf, 1);
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if(FAIL == ret) {
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GTP_ERROR("Read firmware message fail.");
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return ret;
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}
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update_msg.force_update = buf[GTP_ADDR_LENGTH];
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if((0xBE != update_msg.force_update)&&(!retry)) {
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GTP_INFO("The check sum in ic is error.");
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GTP_INFO("The IC will be updated by force.");
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continue;
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}
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break;
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}
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GTP_DEBUG("IC force update flag:0x%x", update_msg.force_update);
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//step3:get pid & vid
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ret = gup_get_ic_msg(client, GUP_REG_PID_VID, buf, 6);
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if(FAIL == ret) {
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GTP_ERROR("Read product id & version id fail.");
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return ret;
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}
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memset(update_msg.ic_fw_msg.pid, 0, sizeof(update_msg.ic_fw_msg.pid));
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memcpy(update_msg.ic_fw_msg.pid, &buf[GTP_ADDR_LENGTH], 4);
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GTP_DEBUG("IC Product id:%s", update_msg.ic_fw_msg.pid);
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//GT9XX PID MAPPING
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/*|-----FLASH-----RAM-----|
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|------918------918-----|
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|------968------968-----|
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|------913------913-----|
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|------913P-----913P----|
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|------927------927-----|
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|------927P-----927P----|
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|------9110-----9110----|
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|------9110P----9111----|*/
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if(update_msg.ic_fw_msg.pid[0] != 0) {
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if(!memcmp(update_msg.ic_fw_msg.pid, "9111", 4)) {
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GTP_DEBUG("IC Mapping Product id:%s", update_msg.ic_fw_msg.pid);
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memcpy(update_msg.ic_fw_msg.pid, "9110P", 5);
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}
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}
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update_msg.ic_fw_msg.vid = buf[GTP_ADDR_LENGTH+4] + (buf[GTP_ADDR_LENGTH+5]<<8);
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GTP_DEBUG("IC version id:%04x", update_msg.ic_fw_msg.vid);
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return SUCCESS;
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}
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s32 gup_enter_update_mode(struct i2c_client *client)
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{
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s32 ret = -1;
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s32 retry = 0;
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u8 rd_buf[3];
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//step1:RST output low last at least 2ms
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ctp_wakeup(0, 0);
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msleep(5);
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//step2:select I2C slave addr,INT:0--0xBA;1--0x28.
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gtp_set_int_value(client->addr == 0x14);
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msleep(2);
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//step3:RST output high reset guitar
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ctp_wakeup(1, 0);
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gtp_set_io_int();
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//20121211 modify start
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msleep(6);
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while(retry++ < 200) {
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//step4:Hold ss51 & dsp
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ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
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if(ret <= 0) {
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GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry);
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continue;
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}
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//step5:Confirm hold
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ret = gup_get_ic_msg(client, _rRW_MISCTL__SWRST_B0_, rd_buf, 1);
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if(ret <= 0) {
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GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry);
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continue;
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}
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if(0x0C == rd_buf[GTP_ADDR_LENGTH]) {
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GTP_DEBUG("Hold ss51 & dsp confirm SUCCESS");
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break;
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}
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GTP_DEBUG("Hold ss51 & dsp confirm 0x4180 failed,value:%d", rd_buf[GTP_ADDR_LENGTH]);
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}
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if(retry >= 200) {
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GTP_ERROR("Enter update Hold ss51 failed.");
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return FAIL;
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}
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//step6:DSP_CK and DSP_ALU_CK PowerOn
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ret = gup_set_ic_msg(client, 0x4010, 0x00);
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//20121211 modify end
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return ret;
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}
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void gup_leave_update_mode(void)
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{
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GTP_DEBUG("[leave_update_mode]reset chip.");
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gtp_io_init(20);
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gtp_set_io_int();
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}
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static u8 gup_enter_update_judge(st_fw_head *fw_head)
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{
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//Get the correct nvram data
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//The correct conditions:
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//1. the hardware info is the same
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//2. the product id is the same
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//3. the firmware version in update file is greater than the firmware version in ic
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//or the check sum in ic is wrong
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u16 u16_tmp;
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u16_tmp = fw_head->vid;
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fw_head->vid = (u16)(u16_tmp>>8) + (u16)(u16_tmp<<8);
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GTP_DEBUG("FILE HARDWARE INFO:%02x%02x%02x%02x", fw_head->hw_info[0], fw_head->hw_info[1], fw_head->hw_info[2], fw_head->hw_info[3]);
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GTP_DEBUG("FILE PID:%s", fw_head->pid);
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GTP_DEBUG("FILE VID:%04x", fw_head->vid);
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GTP_DEBUG("IC HARDWARE INFO:%02x%02x%02x%02x", update_msg.ic_fw_msg.hw_info[0], update_msg.ic_fw_msg.hw_info[1],
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update_msg.ic_fw_msg.hw_info[2], update_msg.ic_fw_msg.hw_info[3]);
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GTP_DEBUG("IC PID:%s", update_msg.ic_fw_msg.pid);
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GTP_DEBUG("IC VID:%04x", update_msg.ic_fw_msg.vid);
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//First two conditions
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if ( !memcmp(fw_head->hw_info, update_msg.ic_fw_msg.hw_info,
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sizeof(update_msg.ic_fw_msg.hw_info))) {
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GTP_DEBUG("Get the same hardware info.");
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if( update_msg.force_update != 0xBE ){
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GTP_INFO("FW chksum error,need enter update.");
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return SUCCESS;
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}
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if (fw_head->vid > update_msg.ic_fw_msg.vid) {
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GTP_INFO("Need enter update.");
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return SUCCESS;
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}
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if (( !memcmp(fw_head->pid, update_msg.ic_fw_msg.pid,
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(strlen(fw_head->pid)<3?3:strlen(fw_head->pid))))||
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(!memcmp(update_msg.ic_fw_msg.pid, "91XX", 4))||
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(!memcmp(fw_head->pid, "91XX", 4))) {
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if(!memcmp(fw_head->pid, "91XX", 4)) {
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GTP_DEBUG("Force none same pid update mode.");
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}else {
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GTP_DEBUG("Get the same pid.");
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}
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#if 0
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//The third condition
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if (fw_head->vid > update_msg.ic_fw_msg.vid) {
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GTP_INFO("Need enter update.");
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return SUCCESS;
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}
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#endif
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GTP_ERROR("Don't meet the third condition.");
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}
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}
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return FAIL;
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}
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#if !GTP_HEADER_FW_UPDATE
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static u8 ascii2hex(u8 a)
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{
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s8 value = 0;
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if(a >= '0' && a <= '9') {
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value = a - '0';
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}else if(a >= 'A' && a <= 'F') {
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value = a - 'A' + 0x0A;
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}else if(a >= 'a' && a <= 'f') {
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value = a - 'a' + 0x0A;
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}else {
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value = 0xff;
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}
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return value;
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}
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static s8 gup_update_config(struct i2c_client *client)
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{
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s32 file_len = 0;
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s32 ret = 0;
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s32 i = 0;
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s32 file_cfg_len = 0;
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s32 chip_cfg_len = 0;
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s32 count = 0;
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u8 *buf;
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u8 *pre_buf;
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u8 *file_config;
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u8 checksum = 0;
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u8 pid[8];
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if(NULL == update_msg.cfg_file) {
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GTP_ERROR("[update_cfg]No need to upgrade config!");
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return FAIL;
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}
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file_len = update_msg.cfg_file->f_op->llseek(update_msg.cfg_file, 0, SEEK_END);
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ret = gup_get_ic_msg(client, GUP_REG_PID_VID, pid, 6);
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if(FAIL == ret){
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GTP_ERROR("[update_cfg]Read product id & version id fail.");
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return FAIL;
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}
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pid[5] = '\0';
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GTP_DEBUG("update cfg get pid:%s", &pid[GTP_ADDR_LENGTH]);
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chip_cfg_len = 186;
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if(!memcmp(&pid[GTP_ADDR_LENGTH], "968", 3)) {
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chip_cfg_len = 228;
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}
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GTP_DEBUG("[update_cfg]config file len:%d", file_len);
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GTP_DEBUG("[update_cfg]need config len:%d",chip_cfg_len);
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if((file_len+5) < chip_cfg_len*5) {
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GTP_ERROR("Config length error");
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return -1;
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}
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buf = (u8*)kzalloc(file_len, GFP_KERNEL);
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pre_buf = (u8*)kzalloc(file_len, GFP_KERNEL);
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file_config = (u8*)kzalloc(chip_cfg_len + GTP_ADDR_LENGTH, GFP_KERNEL);
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update_msg.cfg_file->f_op->llseek(update_msg.cfg_file, 0, SEEK_SET);
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GTP_DEBUG("[update_cfg]Read config from file.");
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ret = update_msg.cfg_file->f_op->read(update_msg.cfg_file, (char*)pre_buf, file_len, &update_msg.cfg_file->f_pos);
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if(ret<0){
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GTP_ERROR("[update_cfg]Read config file failed.");
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goto update_cfg_file_failed;
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}
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GTP_DEBUG("[update_cfg]Delete illgal charactor.");
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for(i=0,count=0; i<file_len; i++) {
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if (pre_buf[i] == ' ' || pre_buf[i] == '\r' || pre_buf[i] == '\n') {
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continue;
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}
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buf[count++] = pre_buf[i];
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}
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GTP_DEBUG("[update_cfg]Ascii to hex.");
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file_config[0] = GTP_REG_CONFIG_DATA >> 8;
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file_config[1] = GTP_REG_CONFIG_DATA & 0xff;
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for(i=0,file_cfg_len=GTP_ADDR_LENGTH; i<count; i+=5) {
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if((buf[i]=='0') && ((buf[i+1]=='x') || (buf[i+1]=='X'))) {
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u8 high,low;
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high = ascii2hex(buf[i+2]);
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low = ascii2hex(buf[i+3]);
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if((high == 0xFF) || (low == 0xFF)) {
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ret = 0;
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GTP_ERROR("[update_cfg]Illegal config file.");
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goto update_cfg_file_failed;
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}
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file_config[file_cfg_len++] = (high<<4) + low;
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}else {
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ret = 0;
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GTP_ERROR("[update_cfg]Illegal config file.");
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goto update_cfg_file_failed;
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}
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}
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GTP_DEBUG("config:");
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GTP_DEBUG_ARRAY(file_config, file_cfg_len);
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//cal checksum
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for(i=GTP_ADDR_LENGTH; i<chip_cfg_len; i++) {
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checksum += file_config[i];
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}
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file_config[chip_cfg_len] = (~checksum) + 1;
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i = 0;
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while(i++ < 5) {
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ret = gup_i2c_write(client, file_config, file_cfg_len);
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if(ret > 0) {
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GTP_INFO("[update_cfg]Send config SUCCESS.");
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break;
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}
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GTP_ERROR("[update_cfg]Send config i2c error.");
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}
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|
update_cfg_file_failed:
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kfree(pre_buf);
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kfree(buf);
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kfree(file_config);
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return ret;
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}
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#endif
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#if GTP_HEADER_FW_UPDATE
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static u8 gup_check_fs_mounted(char *path_name)
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{
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struct path root_path;
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struct path path;
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int err;
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err = kern_path("/", LOOKUP_FOLLOW, &root_path);
|
|
if (err) {
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GTP_DEBUG("\"/\" NOT Mounted: %d", err);
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return FAIL;
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}
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err = kern_path(path_name, LOOKUP_FOLLOW, &path);
|
|
if (err){
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GTP_DEBUG("/data/ NOT Mounted: %d", err);
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return FAIL;
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}
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|
return SUCCESS;
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|
}
|
#endif
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static u8 gup_check_update_file(struct i2c_client *client, st_fw_head* fw_head, u8* path)
|
{
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s32 ret = 0;
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s32 i = 0;
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s32 fw_checksum = 0;
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u8 buf[FW_HEAD_LENGTH];
|
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if (path) {
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update_msg.file = filp_open(path, O_RDONLY, 0644);
|
|
if (IS_ERR(update_msg.file)) {
|
GTP_ERROR("Open update file(%s) error!", path);
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return FAIL;
|
}
|
}else {
|
#if GTP_HEADER_FW_UPDATE
|
for (i = 0; i < (GUP_SEARCH_FILE_TIMES); i++) {
|
GTP_DEBUG("Waiting for /data/ mounted [%d]", i);
|
|
if (gup_check_fs_mounted("/data") == SUCCESS) {
|
GTP_DEBUG("/data/ Mounted!");
|
break;
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}
|
msleep(3000);
|
}
|
|
if (i >= (GUP_SEARCH_FILE_TIMES)) {
|
GTP_ERROR("Wait for /data/ mounting timeout!");
|
return FAIL;
|
}
|
update_msg.file = filp_open(UPDATE_FILE_PATH_2, O_CREAT | O_RDWR, 0666);
|
|
if ((IS_ERR(update_msg.file))) {
|
GTP_ERROR("Failed to Create fw file for fw_header!");
|
return FAIL;
|
}
|
update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET);
|
update_msg.file->f_op->write(update_msg.file, (char *)header_fw_array, sizeof(header_fw_array), &update_msg.file->f_pos);
|
filp_close(update_msg.file, NULL);
|
update_msg.file = filp_open(UPDATE_FILE_PATH_2, O_RDWR , 0444);
|
#else
|
u8 fp_len = max(sizeof(UPDATE_FILE_PATH_1), sizeof(UPDATE_FILE_PATH_2));
|
u8 cfp_len = max(sizeof(CONFIG_FILE_PATH_1), sizeof(CONFIG_FILE_PATH_2));
|
u8 *search_update_path = (u8*)kzalloc(fp_len, GFP_KERNEL);
|
u8 *search_cfg_path = (u8*)kzalloc(cfp_len, GFP_KERNEL);
|
//Begin to search update file,the config file & firmware file must be in the same path,single or double.
|
for (i = 0; i < GUP_SEARCH_FILE_TIMES; i++) {
|
if(i%2) {
|
memcpy(search_update_path, UPDATE_FILE_PATH_1, sizeof(UPDATE_FILE_PATH_1));
|
memcpy(search_cfg_path, CONFIG_FILE_PATH_1, sizeof(CONFIG_FILE_PATH_1));
|
}else {
|
memcpy(search_update_path, UPDATE_FILE_PATH_2, sizeof(UPDATE_FILE_PATH_2));
|
memcpy(search_cfg_path, CONFIG_FILE_PATH_2, sizeof(CONFIG_FILE_PATH_2));
|
}
|
|
if(!(got_file_flag&0x0F)) {
|
update_msg.file = filp_open(search_update_path, O_RDWR, 0444);
|
if(!IS_ERR(update_msg.file)) {
|
GTP_DEBUG("Find the bin file");
|
got_file_flag |= 0x0F;
|
}
|
}
|
if(!(got_file_flag&0xF0)) {
|
update_msg.cfg_file = filp_open(search_cfg_path, O_RDWR, 0444);
|
if(!IS_ERR(update_msg.cfg_file)) {
|
GTP_DEBUG("Find the cfg file");
|
got_file_flag |= 0xF0;
|
}
|
}
|
|
if(got_file_flag) {
|
if(got_file_flag == 0xFF) {
|
break;
|
}else {
|
i += 4;
|
}
|
}
|
GTP_DEBUG("%3d:Searching %s %s file...", i, (got_file_flag&0x0F)?"":"bin", (got_file_flag&0xF0)?"":"cfg");
|
msleep(3000);
|
}
|
kfree(search_update_path);
|
kfree(search_cfg_path);
|
|
if(!got_file_flag) {
|
GTP_ERROR("Can't find update file.");
|
goto load_failed;
|
}
|
|
if(got_file_flag&0xF0) {
|
GTP_DEBUG("Got the update config file.");
|
ret = gup_update_config(client);
|
if(ret <= 0) {
|
GTP_ERROR("Update config failed.");
|
}
|
filp_close(update_msg.cfg_file, NULL);
|
msleep(500); //waiting config to be stored in FLASH.
|
}
|
if(got_file_flag&0x0F) {
|
GTP_DEBUG("Got the update firmware file.");
|
}else {
|
GTP_ERROR("No need to upgrade firmware.");
|
goto load_failed;
|
}
|
#endif
|
}
|
|
update_msg.old_fs = get_fs();
|
set_fs(KERNEL_DS);
|
|
update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET);
|
//update_msg.file->f_pos = 0;
|
|
ret = update_msg.file->f_op->read(update_msg.file, (char*)buf, FW_HEAD_LENGTH, &update_msg.file->f_pos);
|
if (ret < 0){
|
GTP_ERROR("Read firmware head in update file error.");
|
goto load_failed;
|
}
|
memcpy(fw_head, buf, FW_HEAD_LENGTH);
|
|
//check firmware legality
|
fw_checksum = 0;
|
for(i=0; i<FW_SECTION_LENGTH*4+FW_DSP_ISP_LENGTH+FW_DSP_LENGTH+FW_BOOT_LENGTH; i+=2) {
|
u16 temp;
|
ret = update_msg.file->f_op->read(update_msg.file, (char*)buf, 2, &update_msg.file->f_pos);
|
if (ret < 0) {
|
GTP_ERROR("Read firmware file error.");
|
goto load_failed;
|
}
|
//GTP_DEBUG("BUF[0]:%x", buf[0]);
|
temp = (buf[0]<<8) + buf[1];
|
fw_checksum += temp;
|
}
|
|
GTP_DEBUG("firmware checksum:%x", fw_checksum&0xFFFF);
|
if(fw_checksum&0xFFFF) {
|
GTP_ERROR("Illegal firmware file.");
|
goto load_failed;
|
}
|
|
return SUCCESS;
|
|
load_failed:
|
set_fs(update_msg.old_fs);
|
return FAIL;
|
}
|
|
#if 0
|
static u8 gup_check_update_header(struct i2c_client *client, st_fw_head* fw_head)
|
{
|
const u8* pos;
|
int i = 0;
|
u8 mask_num = 0;
|
s32 ret = 0;
|
|
pos = HEADER_UPDATE_DATA;
|
|
memcpy(fw_head, pos, FW_HEAD_LENGTH);
|
pos += FW_HEAD_LENGTH;
|
|
ret = gup_enter_update_judge(fw_head);
|
if(SUCCESS == ret) {
|
return SUCCESS;
|
}
|
return FAIL;
|
}
|
#endif
|
|
static u8 gup_burn_proc(struct i2c_client *client, u8 *burn_buf, u16 start_addr, u16 total_length)
|
{
|
s32 ret = 0;
|
u16 burn_addr = start_addr;
|
u16 frame_length = 0;
|
u16 burn_length = 0;
|
u8 wr_buf[PACK_SIZE + GTP_ADDR_LENGTH];
|
u8 rd_buf[PACK_SIZE + GTP_ADDR_LENGTH];
|
u8 retry = 0;
|
|
GTP_DEBUG("Begin burn %dk data to addr 0x%x", (total_length/1024), start_addr);
|
while(burn_length < total_length) {
|
GTP_DEBUG("B/T:%04d/%04d", burn_length, total_length);
|
frame_length = ((total_length - burn_length) > PACK_SIZE) ? PACK_SIZE : (total_length - burn_length);
|
wr_buf[0] = (u8)(burn_addr>>8);
|
rd_buf[0] = wr_buf[0];
|
wr_buf[1] = (u8)burn_addr;
|
rd_buf[1] = wr_buf[1];
|
memcpy(&wr_buf[GTP_ADDR_LENGTH], &burn_buf[burn_length], frame_length);
|
|
for(retry = 0; retry < MAX_FRAME_CHECK_TIME; retry++) {
|
ret = gup_i2c_write(client, wr_buf, GTP_ADDR_LENGTH + frame_length);
|
if(ret <= 0) {
|
GTP_ERROR("Write frame data i2c error.");
|
continue;
|
}
|
ret = gup_i2c_read(client, rd_buf, GTP_ADDR_LENGTH + frame_length);
|
if(ret <= 0) {
|
GTP_ERROR("Read back frame data i2c error.");
|
continue;
|
}
|
|
if(memcmp(&wr_buf[GTP_ADDR_LENGTH], &rd_buf[GTP_ADDR_LENGTH], frame_length)) {
|
GTP_ERROR("Check frame data fail,not equal.");
|
GTP_DEBUG("write array:");
|
GTP_DEBUG_ARRAY(&wr_buf[GTP_ADDR_LENGTH], frame_length);
|
GTP_DEBUG("read array:");
|
GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH], frame_length);
|
continue;
|
}else {
|
//GTP_DEBUG("Check frame data success.");
|
break;
|
}
|
}
|
|
if(retry >= MAX_FRAME_CHECK_TIME) {
|
GTP_ERROR("Burn frame data time out,exit.");
|
return FAIL;
|
}
|
burn_length += frame_length;
|
burn_addr += frame_length;
|
}
|
|
return SUCCESS;
|
}
|
|
static u8 gup_load_section_file(u8* buf, u16 offset, u16 length)
|
{
|
s32 ret = 0;
|
|
if(update_msg.file == NULL) {
|
GTP_ERROR("cannot find update file,load section file fail.");
|
return FAIL;
|
}
|
update_msg.file->f_pos = FW_HEAD_LENGTH + offset;
|
|
ret = update_msg.file->f_op->read(update_msg.file, (char*)buf, length, &update_msg.file->f_pos);
|
if(ret < 0) {
|
GTP_ERROR("Read update file fail.");
|
return FAIL;
|
}
|
|
return SUCCESS;
|
}
|
|
static u8 gup_recall_check(struct i2c_client *client, u8* chk_src, u16 start_rd_addr, u16 chk_length)
|
{
|
u8 rd_buf[PACK_SIZE + GTP_ADDR_LENGTH];
|
s32 ret = 0;
|
u16 recall_addr = start_rd_addr;
|
u16 recall_length = 0;
|
u16 frame_length = 0;
|
|
while(recall_length < chk_length) {
|
frame_length = ((chk_length - recall_length) > PACK_SIZE) ? PACK_SIZE : (chk_length - recall_length);
|
ret = gup_get_ic_msg(client, recall_addr, rd_buf, frame_length);
|
if(ret <= 0) {
|
GTP_ERROR("recall i2c error,exit");
|
return FAIL;
|
}
|
|
if(memcmp(&rd_buf[GTP_ADDR_LENGTH], &chk_src[recall_length], frame_length)) {
|
GTP_ERROR("Recall frame data fail,not equal.");
|
GTP_DEBUG("chk_src array:");
|
GTP_DEBUG_ARRAY(&chk_src[recall_length], frame_length);
|
GTP_DEBUG("recall array:");
|
GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH], frame_length);
|
return FAIL;
|
}
|
|
recall_length += frame_length;
|
recall_addr += frame_length;
|
}
|
GTP_DEBUG("Recall check %dk firmware success.", (chk_length/1024));
|
|
return SUCCESS;
|
}
|
|
static u8 gup_burn_fw_section(struct i2c_client *client, u8 *fw_section, u16 start_addr, u8 bank_cmd )
|
{
|
s32 ret = 0;
|
u8 rd_buf[5];
|
|
//step1:hold ss51 & dsp
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_section]hold ss51 & dsp fail.");
|
return FAIL;
|
}
|
|
//step2:set scramble
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_section]set scramble fail.");
|
return FAIL;
|
}
|
|
//step3:select bank
|
ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, (bank_cmd >> 4)&0x0F);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_section]select bank %d fail.", (bank_cmd >> 4)&0x0F);
|
return FAIL;
|
}
|
|
//step4:enable accessing code
|
ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_section]enable accessing code fail.");
|
return FAIL;
|
}
|
|
//step5:burn 8k fw section
|
ret = gup_burn_proc(client, fw_section, start_addr, FW_SECTION_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_section]burn fw_section fail.");
|
return FAIL;
|
}
|
|
//step6:hold ss51 & release dsp
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_section]hold ss51 & release dsp fail.");
|
return FAIL;
|
}
|
//must delay
|
msleep(1);
|
|
//step7:send burn cmd to move data to flash from sram
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, bank_cmd&0x0f);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_section]send burn cmd fail.");
|
return FAIL;
|
}
|
GTP_DEBUG("[burn_fw_section]Wait for the burn is complete......");
|
do{
|
ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_section]Get burn state fail");
|
return FAIL;
|
}
|
msleep(10);
|
//GTP_DEBUG("[burn_fw_section]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]);
|
}while(rd_buf[GTP_ADDR_LENGTH]);
|
|
//step8:select bank
|
ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, (bank_cmd >> 4)&0x0F);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_section]select bank %d fail.", (bank_cmd >> 4)&0x0F);
|
return FAIL;
|
}
|
|
//step9:enable accessing code
|
ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_section]enable accessing code fail.");
|
return FAIL;
|
}
|
|
//step10:recall 8k fw section
|
ret = gup_recall_check(client, fw_section, start_addr, FW_SECTION_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_section]recall check 8k firmware fail.");
|
return FAIL;
|
}
|
|
//step11:disable accessing code
|
ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x00);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_section]disable accessing code fail.");
|
return FAIL;
|
}
|
|
return SUCCESS;
|
}
|
|
static u8 gup_burn_dsp_isp(struct i2c_client *client)
|
{
|
s32 ret = 0;
|
u8* fw_dsp_isp = NULL;
|
u8 retry = 0;
|
|
GTP_DEBUG("[burn_dsp_isp]Begin burn dsp isp---->>");
|
|
//step1:alloc memory
|
GTP_DEBUG("[burn_dsp_isp]step1:alloc memory");
|
while(retry++ < 5) {
|
fw_dsp_isp = (u8*)kzalloc(FW_DSP_ISP_LENGTH, GFP_KERNEL);
|
if(fw_dsp_isp == NULL) {
|
continue;
|
}else {
|
GTP_INFO("[burn_dsp_isp]Alloc %dk byte memory success.", (FW_DSP_ISP_LENGTH/1024));
|
break;
|
}
|
}
|
|
if(retry >= 5) {
|
GTP_ERROR("[burn_dsp_isp]Alloc memory fail,exit.");
|
return FAIL;
|
}
|
|
//step2:load dsp isp file data
|
GTP_DEBUG("[burn_dsp_isp]step2:load dsp isp file data");
|
ret = gup_load_section_file(fw_dsp_isp, (4*FW_SECTION_LENGTH+FW_DSP_LENGTH+FW_BOOT_LENGTH), FW_DSP_ISP_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_dsp_isp]load firmware dsp_isp fail.");
|
goto exit_burn_dsp_isp;
|
}
|
|
//step3:disable wdt,clear cache enable
|
GTP_DEBUG("[burn_dsp_isp]step3:disable wdt,clear cache enable");
|
ret = gup_set_ic_msg(client, _bRW_MISCTL__TMR0_EN, 0x00);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_dsp_isp]disable wdt fail.");
|
ret = FAIL;
|
goto exit_burn_dsp_isp;
|
}
|
|
ret = gup_set_ic_msg(client, _bRW_MISCTL__CACHE_EN, 0x00);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_dsp_isp]clear cache enable fail.");
|
ret = FAIL;
|
goto exit_burn_dsp_isp;
|
}
|
|
//step4:hold ss51 & dsp
|
GTP_DEBUG("[burn_dsp_isp]step4:hold ss51 & dsp");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_dsp_isp]hold ss51 & dsp fail.");
|
ret = FAIL;
|
goto exit_burn_dsp_isp;
|
}
|
|
//step5:set boot from sram
|
GTP_DEBUG("[burn_dsp_isp]step5:set boot from sram");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOTCTL_B0_, 0x02);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_dsp_isp]set boot from sram fail.");
|
ret = FAIL;
|
goto exit_burn_dsp_isp;
|
}
|
|
//step6:software reboot
|
GTP_DEBUG("[burn_dsp_isp]step6:software reboot");
|
ret = gup_set_ic_msg(client, _bWO_MISCTL__CPU_SWRST_PULSE, 0x01);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_dsp_isp]software reboot fail.");
|
ret = FAIL;
|
goto exit_burn_dsp_isp;
|
}
|
|
//step7:select bank2
|
GTP_DEBUG("[burn_dsp_isp]step7:select bank2");
|
ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x02);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_dsp_isp]select bank2 fail.");
|
ret = FAIL;
|
goto exit_burn_dsp_isp;
|
}
|
|
//step8:enable accessing code
|
GTP_DEBUG("[burn_dsp_isp]step8:enable accessing code");
|
ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_dsp_isp]enable accessing code fail.");
|
ret = FAIL;
|
goto exit_burn_dsp_isp;
|
}
|
|
//step9:burn 4k dsp_isp
|
GTP_DEBUG("[burn_dsp_isp]step9:burn 4k dsp_isp");
|
ret = gup_burn_proc(client, fw_dsp_isp, 0xC000, FW_DSP_ISP_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_dsp_isp]burn dsp_isp fail.");
|
goto exit_burn_dsp_isp;
|
}
|
|
//step10:set scramble
|
GTP_DEBUG("[burn_dsp_isp]step10:set scramble");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_dsp_isp]set scramble fail.");
|
ret = FAIL;
|
goto exit_burn_dsp_isp;
|
}
|
ret = SUCCESS;
|
|
exit_burn_dsp_isp:
|
kfree(fw_dsp_isp);
|
return ret;
|
}
|
|
static u8 gup_burn_fw_ss51(struct i2c_client *client)
|
{
|
u8* fw_ss51 = NULL;
|
u8 retry = 0;
|
s32 ret = 0;
|
|
GTP_DEBUG("[burn_fw_ss51]Begin burn ss51 firmware---->>");
|
|
//step1:alloc memory
|
GTP_DEBUG("[burn_fw_ss51]step1:alloc memory");
|
while(retry++ < 5) {
|
fw_ss51 = (u8*)kzalloc(FW_SECTION_LENGTH, GFP_KERNEL);
|
if(fw_ss51 == NULL) {
|
continue;
|
}else {
|
GTP_INFO("[burn_fw_ss51]Alloc %dk byte memory success.", (FW_SECTION_LENGTH/1024));
|
break;
|
}
|
}
|
|
if(retry >= 5) {
|
GTP_ERROR("[burn_fw_ss51]Alloc memory fail,exit.");
|
return FAIL;
|
}
|
|
//step2:load ss51 firmware section 1 file data
|
GTP_DEBUG("[burn_fw_ss51]step2:load ss51 firmware section 1 file data");
|
ret = gup_load_section_file(fw_ss51, 0, FW_SECTION_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 1 fail.");
|
goto exit_burn_fw_ss51;
|
}
|
|
//step3:clear control flag
|
GTP_DEBUG("[burn_fw_ss51]step3:clear control flag");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x00);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_ss51]clear control flag fail.");
|
ret = FAIL;
|
goto exit_burn_fw_ss51;
|
}
|
|
//step4:burn ss51 firmware section 1
|
GTP_DEBUG("[burn_fw_ss51]step4:burn ss51 firmware section 1");
|
ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x01);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 1 fail.");
|
goto exit_burn_fw_ss51;
|
}
|
|
//step5:load ss51 firmware section 2 file data
|
GTP_DEBUG("[burn_fw_ss51]step5:load ss51 firmware section 2 file data");
|
ret = gup_load_section_file(fw_ss51, FW_SECTION_LENGTH, FW_SECTION_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 2 fail.");
|
goto exit_burn_fw_ss51;
|
}
|
|
//step6:burn ss51 firmware section 2
|
GTP_DEBUG("[burn_fw_ss51]step6:burn ss51 firmware section 2");
|
ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x02);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 2 fail.");
|
goto exit_burn_fw_ss51;
|
}
|
|
//step7:load ss51 firmware section 3 file data
|
GTP_DEBUG("[burn_fw_ss51]step7:load ss51 firmware section 3 file data");
|
ret = gup_load_section_file(fw_ss51, 2*FW_SECTION_LENGTH, FW_SECTION_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 3 fail.");
|
goto exit_burn_fw_ss51;
|
}
|
|
//step8:burn ss51 firmware section 3
|
GTP_DEBUG("[burn_fw_ss51]step8:burn ss51 firmware section 3");
|
ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x13);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 3 fail.");
|
goto exit_burn_fw_ss51;
|
}
|
|
//step9:load ss51 firmware section 4 file data
|
GTP_DEBUG("[burn_fw_ss51]step9:load ss51 firmware section 4 file data");
|
ret = gup_load_section_file(fw_ss51, 3*FW_SECTION_LENGTH, FW_SECTION_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 4 fail.");
|
goto exit_burn_fw_ss51;
|
}
|
|
//step10:burn ss51 firmware section 4
|
GTP_DEBUG("[burn_fw_ss51]step10:burn ss51 firmware section 4");
|
ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x14);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 4 fail.");
|
goto exit_burn_fw_ss51;
|
}
|
|
ret = SUCCESS;
|
|
exit_burn_fw_ss51:
|
kfree(fw_ss51);
|
return ret;
|
}
|
|
static u8 gup_burn_fw_dsp(struct i2c_client *client)
|
{
|
s32 ret = 0;
|
u8* fw_dsp = NULL;
|
u8 retry = 0;
|
u8 rd_buf[5];
|
|
GTP_DEBUG("[burn_fw_dsp]Begin burn dsp firmware---->>");
|
//step1:alloc memory
|
GTP_DEBUG("[burn_fw_dsp]step1:alloc memory");
|
while(retry++ < 5) {
|
fw_dsp = (u8*)kzalloc(FW_DSP_LENGTH, GFP_KERNEL);
|
if(fw_dsp == NULL) {
|
continue;
|
}else {
|
GTP_INFO("[burn_fw_dsp]Alloc %dk byte memory success.", (FW_SECTION_LENGTH/1024));
|
break;
|
}
|
}
|
|
if(retry >= 5) {
|
GTP_ERROR("[burn_fw_dsp]Alloc memory fail,exit.");
|
return FAIL;
|
}
|
|
//step2:load firmware dsp
|
GTP_DEBUG("[burn_fw_dsp]step2:load firmware dsp");
|
ret = gup_load_section_file(fw_dsp, 4*FW_SECTION_LENGTH, FW_DSP_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_dsp]load firmware dsp fail.");
|
goto exit_burn_fw_dsp;
|
}
|
|
//step3:select bank3
|
GTP_DEBUG("[burn_fw_dsp]step3:select bank3");
|
ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_dsp]select bank3 fail.");
|
ret = FAIL;
|
goto exit_burn_fw_dsp;
|
}
|
|
//step4:hold ss51 & dsp
|
GTP_DEBUG("[burn_fw_dsp]step4:hold ss51 & dsp");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_dsp]hold ss51 & dsp fail.");
|
ret = FAIL;
|
goto exit_burn_fw_dsp;
|
}
|
|
//step5:set scramble
|
GTP_DEBUG("[burn_fw_dsp]step5:set scramble");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_dsp]set scramble fail.");
|
ret = FAIL;
|
goto exit_burn_fw_dsp;
|
}
|
|
//step6:release ss51 & dsp
|
GTP_DEBUG("[burn_fw_dsp]step6:release ss51 & dsp");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04); //20121211
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_dsp]release ss51 & dsp fail.");
|
ret = FAIL;
|
goto exit_burn_fw_dsp;
|
}
|
//must delay
|
msleep(1);
|
|
//step7:burn 4k dsp firmware
|
GTP_DEBUG("[burn_fw_dsp]step7:burn 4k dsp firmware");
|
ret = gup_burn_proc(client, fw_dsp, 0x9000, FW_DSP_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_dsp]burn fw_section fail.");
|
goto exit_burn_fw_dsp;
|
}
|
|
//step8:send burn cmd to move data to flash from sram
|
GTP_DEBUG("[burn_fw_dsp]step8:send burn cmd to move data to flash from sram");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x05);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_dsp]send burn cmd fail.");
|
goto exit_burn_fw_dsp;
|
}
|
GTP_DEBUG("[burn_fw_dsp]Wait for the burn is complete......");
|
do{
|
ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_dsp]Get burn state fail");
|
goto exit_burn_fw_dsp;
|
}
|
msleep(10);
|
//GTP_DEBUG("[burn_fw_dsp]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]);
|
}while(rd_buf[GTP_ADDR_LENGTH]);
|
|
//step9:recall check 4k dsp firmware
|
GTP_DEBUG("[burn_fw_dsp]step9:recall check 4k dsp firmware");
|
ret = gup_recall_check(client, fw_dsp, 0x9000, FW_DSP_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_dsp]recall check 4k dsp firmware fail.");
|
goto exit_burn_fw_dsp;
|
}
|
|
ret = SUCCESS;
|
|
exit_burn_fw_dsp:
|
kfree(fw_dsp);
|
return ret;
|
}
|
|
static u8 gup_burn_fw_boot(struct i2c_client *client)
|
{
|
s32 ret = 0;
|
u8* fw_boot = NULL;
|
u8 retry = 0;
|
u8 rd_buf[5];
|
|
GTP_DEBUG("[burn_fw_boot]Begin burn bootloader firmware---->>");
|
|
//step1:Alloc memory
|
GTP_DEBUG("[burn_fw_boot]step1:Alloc memory");
|
while(retry++ < 5) {
|
fw_boot = (u8*)kzalloc(FW_BOOT_LENGTH, GFP_KERNEL);
|
if(fw_boot == NULL) {
|
continue;
|
}else {
|
GTP_INFO("[burn_fw_boot]Alloc %dk byte memory success.", (FW_BOOT_LENGTH/1024));
|
break;
|
}
|
}
|
if(retry >= 5) {
|
GTP_ERROR("[burn_fw_boot]Alloc memory fail,exit.");
|
return FAIL;
|
}
|
|
//step2:load firmware bootloader
|
GTP_DEBUG("[burn_fw_boot]step2:load firmware bootloader");
|
ret = gup_load_section_file(fw_boot, (4*FW_SECTION_LENGTH+FW_DSP_LENGTH), FW_BOOT_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_boot]load firmware dsp fail.");
|
goto exit_burn_fw_boot;
|
}
|
|
//step3:hold ss51 & dsp
|
GTP_DEBUG("[burn_fw_boot]step3:hold ss51 & dsp");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_boot]hold ss51 & dsp fail.");
|
ret = FAIL;
|
goto exit_burn_fw_boot;
|
}
|
|
//step4:set scramble
|
GTP_DEBUG("[burn_fw_boot]step4:set scramble");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_boot]set scramble fail.");
|
ret = FAIL;
|
goto exit_burn_fw_boot;
|
}
|
|
//step5:release ss51 & dsp
|
GTP_DEBUG("[burn_fw_boot]step5:release ss51 & dsp");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04); //20121211
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_boot]release ss51 & dsp fail.");
|
ret = FAIL;
|
goto exit_burn_fw_boot;
|
}
|
//must delay
|
msleep(1);
|
|
//step6:select bank3
|
GTP_DEBUG("[burn_fw_boot]step6:select bank3");
|
ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_boot]select bank3 fail.");
|
ret = FAIL;
|
goto exit_burn_fw_boot;
|
}
|
|
//step7:burn 2k bootloader firmware
|
GTP_DEBUG("[burn_fw_boot]step7:burn 2k bootloader firmware");
|
ret = gup_burn_proc(client, fw_boot, 0x9000, FW_BOOT_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_boot]burn fw_section fail.");
|
goto exit_burn_fw_boot;
|
}
|
|
//step7:send burn cmd to move data to flash from sram
|
GTP_DEBUG("[burn_fw_boot]step7:send burn cmd to move data to flash from sram");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x06);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_boot]send burn cmd fail.");
|
goto exit_burn_fw_boot;
|
}
|
GTP_DEBUG("[burn_fw_boot]Wait for the burn is complete......");
|
do{
|
ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_boot]Get burn state fail");
|
goto exit_burn_fw_boot;
|
}
|
msleep(10);
|
//GTP_DEBUG("[burn_fw_boot]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]);
|
}while(rd_buf[GTP_ADDR_LENGTH]);
|
|
//step8:recall check 2k bootloader firmware
|
GTP_DEBUG("[burn_fw_boot]step8:recall check 2k bootloader firmware");
|
ret = gup_recall_check(client, fw_boot, 0x9000, FW_BOOT_LENGTH);
|
if(FAIL == ret) {
|
GTP_ERROR("[burn_fw_boot]recall check 4k dsp firmware fail.");
|
goto exit_burn_fw_boot;
|
}
|
|
//step9:enable download DSP code
|
GTP_DEBUG("[burn_fw_boot]step9:enable download DSP code ");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x99);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_boot]enable download DSP code fail.");
|
ret = FAIL;
|
goto exit_burn_fw_boot;
|
}
|
|
//step10:release ss51 & hold dsp
|
GTP_DEBUG("[burn_fw_boot]step10:release ss51 & hold dsp");
|
ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x08);
|
if(ret <= 0) {
|
GTP_ERROR("[burn_fw_boot]release ss51 & hold dsp fail.");
|
ret = FAIL;
|
goto exit_burn_fw_boot;
|
}
|
|
ret = SUCCESS;
|
|
exit_burn_fw_boot:
|
kfree(fw_boot);
|
return ret;
|
}
|
|
s32 gup_update_proc(void *dir)
|
{
|
s32 ret = 0;
|
u8 retry = 0;
|
st_fw_head fw_head;
|
struct goodix_ts_data *ts = NULL;
|
|
GTP_DEBUG("[update_proc]Begin update ......");
|
|
show_len = 1;
|
total_len = 100;
|
if(dir == NULL)
|
{
|
msleep(3000); //wait main thread to be completed
|
}
|
|
ts = i2c_get_clientdata(i2c_connect_client);
|
|
update_msg.file = NULL;
|
ret = gup_check_update_file(i2c_connect_client, &fw_head, (u8*)dir); //20121211
|
if(FAIL == ret) {
|
GTP_ERROR("[update_proc]check update file fail.");
|
goto update_fail;
|
}
|
|
ts->enter_update = 1; // Shield interrupt handler
|
gtp_irq_disable(ts);
|
gtp_io_init(20);
|
gtp_set_io_int();
|
ret = gup_get_ic_fw_msg(i2c_connect_client);
|
if(FAIL == ret) {
|
GTP_ERROR("[update_proc]get ic message fail.");
|
goto update_fail;
|
}
|
|
ret = gup_enter_update_judge(&fw_head);
|
if(FAIL == ret) {
|
GTP_ERROR("[update_proc]Check *.bin file fail.");
|
goto update_fail;
|
}
|
|
ret = gup_enter_update_mode(i2c_connect_client);
|
if(FAIL == ret) {
|
GTP_ERROR("[update_proc]enter update mode fail.");
|
goto update_fail;
|
}
|
|
while(retry++ < 5) {
|
show_len = 10;
|
total_len = 100;
|
ret = gup_burn_dsp_isp(i2c_connect_client);
|
if(FAIL == ret) {
|
GTP_ERROR("[update_proc]burn dsp isp fail.");
|
continue;
|
}
|
|
show_len += 10;
|
ret = gup_burn_fw_ss51(i2c_connect_client);
|
if(FAIL == ret) {
|
GTP_ERROR("[update_proc]burn ss51 firmware fail.");
|
continue;
|
}
|
|
show_len += 40;
|
ret = gup_burn_fw_dsp(i2c_connect_client);
|
if(FAIL == ret) {
|
GTP_ERROR("[update_proc]burn dsp firmware fail.");
|
continue;
|
}
|
|
show_len += 20;
|
ret = gup_burn_fw_boot(i2c_connect_client);
|
if(FAIL == ret) {
|
GTP_ERROR("[update_proc]burn bootloader firmware fail.");
|
continue;
|
}
|
show_len += 10;
|
GTP_INFO("[update_proc]UPDATE SUCCESS.");
|
break;
|
}
|
|
if(retry >= 5) {
|
GTP_ERROR("[update_proc]retry timeout,UPDATE FAIL.");
|
goto update_fail;
|
}
|
|
GTP_DEBUG("[update_proc]leave update mode.");
|
gup_leave_update_mode();
|
|
|
msleep(100);
|
GTP_DEBUG("[update_proc]send config.");
|
//ret = gtp_send_cfg(i2c_connect_client);
|
// if(ret < 0) {
|
// GTP_ERROR("[update_proc]send config fail.");
|
// }
|
show_len = 100;
|
total_len = 100;
|
ts->enter_update = 0;
|
gtp_irq_enable(ts);
|
filp_close(update_msg.file, NULL);
|
return SUCCESS;
|
|
update_fail:
|
ts->enter_update = 0;
|
gtp_irq_enable(ts);
|
if(update_msg.file && !IS_ERR(update_msg.file)) {
|
filp_close(update_msg.file, NULL);
|
}
|
show_len = 200;
|
total_len = 100;
|
return FAIL;
|
}
|
|
#if GTP_AUTO_UPDATE
|
u8 gup_init_update_proc(struct goodix_ts_data *ts)
|
{
|
struct task_struct *thread = NULL;
|
|
GTP_INFO("Ready to run update thread.");
|
thread = kthread_run(gup_update_proc, (void*)NULL, "guitar_update");
|
if (IS_ERR(thread)) {
|
GTP_ERROR("Failed to create update thread.\n");
|
return -1;
|
}
|
|
return 0;
|
}
|
#endif
|
