/*
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* Some macro and struct of SUNXI EMCE.
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*
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* Copyright (C) 2016 Allwinner.
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*
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* zhouhuacai <zhouhuacai@allwinnertech.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef _SUNXI_EMCE_H_
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#define _SUNXI_EMCE_H_
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/*for debug*/
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#define EMCE_DBG(fmt, arg...) pr_debug("%s()%d"fmt, __func__, __LINE__, ##arg)
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#define EMCE_ERR(fmt, arg...) pr_err("%s()%d"fmt, __func__, __LINE__, ##arg)
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#define EMCE_EXIT() EMCE_DBG("%s\n", "Exit")
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#define EMCE_ENTER() EMCE_DBG("%s\n", "Enter ...")
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#define emce_readl(emce, reg) \
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readl((emce)->base_addr + reg)
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#define emce_writel(emce, reg, value) \
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writel((value), (emce)->base_addr + reg)
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#define MAXNAME 16
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#define SUNXI_EMCE_DEV_NAME "emce"
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#define EMCE_MODE (0x0080)
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#define EMCE_VER (0x0090)
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#define EMCE_TASK_DES_ADD (0x0020)
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#define EMCE_TASK_LOAD (0x0028)
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#define EMCE_SECTOR_SIZE_BIT (16)
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#define EMCE_CUR_CTR_BIT (12)
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#define EMCE_IV_LEN_BIT (10)
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#define EMCE_KEY_LEN_BIT (4)
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#define EMCE_MODE_BIT (0)
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#define EMCE_SECTOR_SIZE_MASK (0xFFFF<<16)
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#define EMCE_CUR_CTR_MASK (0x1<<12)
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#define EMCE_IV_LEN_MASK (0x3<<10)
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#define EMCE_KEY_LEN_MASK (0x3<<4)
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#define EMCE_MODE_MASK (0x3<<0)
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#define EMCE_SALT_KEY_LEN (32)
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#define EMCE_KEY_128_BIT (0x0)
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#define EMCE_KEY_192_BIT (0x1)
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#define EMCE_KEY_256_BIT (0x2)
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#define EMCE_MASTER_KEY_OFFSET (0x0)
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#define EMCE_SALT_KEY_OFFSET (0x40)
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#define EMCE_VISION_1 (0x100100)
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enum cfg_cmd {
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EMCE_SET_SECTOR_SIZE, /* default:0x200 */
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EMCE_SET_CTR, /* 0:NDFC, 1:SMHC */
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EMCE_SET_IV_LEN, /* 0:128bit, 1:192bit,2:256bit */
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EMCE_SET_KEY_LEN, /* 0:128bit, 1:192bit,2:256bit */
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EMCE_SET_MODE, /* 0:ECB, 1:CBC */
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};
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struct task_des {
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u32 task_id;
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u32 com_ctrl;
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int data_len;
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u32 key1[8];
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u32 key2[8];
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u32 next_task;
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};
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struct sunxi_emce_regs {
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u32 emce_key[8];
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u32 emce_salt[8];
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u32 emce_mode;
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u32 key1_len;
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u32 key2_len;
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u32 crypto_mode;
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};
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struct sunxi_emce_t {
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struct platform_device *pdev;
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void __iomem *base_addr; /* for register */
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struct sunxi_emce_regs regs;
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struct clk *mclk; /* module clock */
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u32 gen_clkrate;
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u32 emce_vision;
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s8 dev_name[8];
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} sunxi_emce_t;
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#endif /* _SUNXI_EMCE_ */
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