/*
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* Copyright 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifdef DRV_ROCKCHIP
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#include <errno.h>
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#include <rockchip_drm.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <xf86drm.h>
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#include "drv_priv.h"
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#include "helpers.h"
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#include "util.h"
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struct rockchip_private_map_data {
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void *cached_addr;
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void *gem_addr;
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};
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static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
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DRM_FORMAT_BGR888, DRM_FORMAT_RGB565,
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DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB8888 };
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static const uint32_t texture_source_formats[] = { DRM_FORMAT_R8, DRM_FORMAT_NV12,
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DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID };
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static int afbc_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, uint32_t format)
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{
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/* We've restricted ourselves to four bytes per pixel. */
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const uint32_t pixel_size = 4;
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const uint32_t clump_width = 4;
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const uint32_t clump_height = 4;
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#define AFBC_NARROW 1
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#if AFBC_NARROW == 1
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const uint32_t block_width = 4 * clump_width;
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const uint32_t block_height = 4 * clump_height;
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#else
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const uint32_t block_width = 8 * clump_width;
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const uint32_t block_height = 2 * clump_height;
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#endif
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const uint32_t header_block_size = 16;
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const uint32_t body_block_size = block_width * block_height * pixel_size;
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const uint32_t width_in_blocks = DIV_ROUND_UP(width, block_width);
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const uint32_t height_in_blocks = DIV_ROUND_UP(height, block_height);
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const uint32_t total_blocks = width_in_blocks * height_in_blocks;
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const uint32_t header_plane_size = total_blocks * header_block_size;
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const uint32_t body_plane_size = total_blocks * body_block_size;
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/* GPU requires 64 bytes, but EGL import code expects 1024 byte
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* alignement for the body plane. */
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const uint32_t body_plane_alignment = 1024;
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const uint32_t body_plane_offset = ALIGN(header_plane_size, body_plane_alignment);
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const uint32_t total_size = body_plane_offset + body_plane_size;
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bo->strides[0] = width_in_blocks * block_width * pixel_size;
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bo->sizes[0] = total_size;
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bo->offsets[0] = 0;
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bo->total_size = total_size;
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bo->format_modifiers[0] = DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC;
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return 0;
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}
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static int rockchip_add_kms_item(struct driver *drv, const struct kms_item *item)
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{
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uint32_t i, j;
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uint64_t use_flags;
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struct combination *combo;
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struct format_metadata metadata;
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for (i = 0; i < drv_array_size(drv->combos); i++) {
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combo = (struct combination *)drv_array_at_idx(drv->combos, i);
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if (combo->format == item->format) {
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if (item->modifier == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC) {
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use_flags = BO_USE_RENDERING | BO_USE_SCANOUT | BO_USE_TEXTURE;
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metadata.modifier = item->modifier;
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metadata.tiling = 0;
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metadata.priority = 2;
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for (j = 0; j < ARRAY_SIZE(texture_source_formats); j++) {
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if (item->format == texture_source_formats[j])
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use_flags &= ~BO_USE_RENDERING;
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}
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drv_add_combinations(drv, &item->format, 1, &metadata, use_flags);
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} else {
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combo->use_flags |= item->use_flags;
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}
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}
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}
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return 0;
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}
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static int rockchip_init(struct driver *drv)
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{
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int ret;
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uint32_t i;
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struct drv_array *kms_items;
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struct format_metadata metadata;
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metadata.tiling = 0;
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metadata.priority = 1;
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metadata.modifier = DRM_FORMAT_MOD_LINEAR;
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drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
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&metadata, BO_USE_RENDER_MASK);
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drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
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&metadata, BO_USE_TEXTURE_MASK);
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drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
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drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
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/* Camera ISP supports only NV12 output. */
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drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
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BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
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/*
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* R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
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* from camera.
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*/
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drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
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BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
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kms_items = drv_query_kms(drv);
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if (!kms_items)
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return 0;
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for (i = 0; i < drv_array_size(kms_items); i++) {
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ret = rockchip_add_kms_item(drv, (struct kms_item *)drv_array_at_idx(kms_items, i));
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if (ret) {
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drv_array_destroy(kms_items);
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return ret;
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}
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}
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drv_array_destroy(kms_items);
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return 0;
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}
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static bool has_modifier(const uint64_t *list, uint32_t count, uint64_t modifier)
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{
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uint32_t i;
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for (i = 0; i < count; i++)
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if (list[i] == modifier)
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return true;
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return false;
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}
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static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
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uint32_t format, const uint64_t *modifiers,
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uint32_t count)
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{
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int ret;
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size_t plane;
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struct drm_rockchip_gem_create gem_create;
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if (format == DRM_FORMAT_NV12) {
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uint32_t w_mbs = DIV_ROUND_UP(ALIGN(width, 16), 16);
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uint32_t h_mbs = DIV_ROUND_UP(ALIGN(height, 16), 16);
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uint32_t aligned_width = w_mbs * 16;
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uint32_t aligned_height = DIV_ROUND_UP(h_mbs * 16 * 3, 2);
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drv_bo_from_format(bo, aligned_width, height, format);
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bo->total_size = bo->strides[0] * aligned_height + w_mbs * h_mbs * 128;
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} else if (width <= 2560 &&
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has_modifier(modifiers, count, DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)) {
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/* If the caller has decided they can use AFBC, always
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* pick that */
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afbc_bo_from_format(bo, width, height, format);
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} else {
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if (!has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) {
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errno = EINVAL;
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drv_log("no usable modifier found\n");
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return -1;
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}
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uint32_t stride;
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/*
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* Since the ARM L1 cache line size is 64 bytes, align to that
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* as a performance optimization. For YV12, the Mali cmem allocator
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* requires that chroma planes are aligned to 64-bytes, so align the
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* luma plane to 128 bytes.
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*/
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stride = drv_stride_from_format(format, width, 0);
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if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID)
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stride = ALIGN(stride, 128);
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else
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stride = ALIGN(stride, 64);
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drv_bo_from_format(bo, stride, height, format);
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}
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memset(&gem_create, 0, sizeof(gem_create));
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gem_create.size = bo->total_size;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE, &gem_create);
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if (ret) {
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drv_log("DRM_IOCTL_ROCKCHIP_GEM_CREATE failed (size=%llu)\n",
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(unsigned long long)gem_create.size);
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return ret;
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}
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for (plane = 0; plane < bo->num_planes; plane++)
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bo->handles[plane].u32 = gem_create.handle;
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return 0;
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}
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static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
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uint64_t use_flags)
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{
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uint64_t modifiers[] = { DRM_FORMAT_MOD_LINEAR };
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return rockchip_bo_create_with_modifiers(bo, width, height, format, modifiers,
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ARRAY_SIZE(modifiers));
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}
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static void *rockchip_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
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{
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int ret;
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struct drm_rockchip_gem_map_off gem_map;
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struct rockchip_private_map_data *priv;
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/* We can only map buffers created with SW access flags, which should
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* have no modifiers (ie, not AFBC). */
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if (bo->format_modifiers[0] == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)
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return MAP_FAILED;
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memset(&gem_map, 0, sizeof(gem_map));
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gem_map.handle = bo->handles[0].u32;
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ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET, &gem_map);
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if (ret) {
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drv_log("DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n");
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return MAP_FAILED;
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}
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void *addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
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gem_map.offset);
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vma->length = bo->total_size;
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if (bo->use_flags & BO_USE_RENDERSCRIPT) {
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priv = calloc(1, sizeof(*priv));
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priv->cached_addr = calloc(1, bo->total_size);
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priv->gem_addr = addr;
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vma->priv = priv;
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addr = priv->cached_addr;
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}
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return addr;
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}
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static int rockchip_bo_unmap(struct bo *bo, struct vma *vma)
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{
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if (vma->priv) {
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struct rockchip_private_map_data *priv = vma->priv;
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vma->addr = priv->gem_addr;
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free(priv->cached_addr);
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free(priv);
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vma->priv = NULL;
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}
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return munmap(vma->addr, vma->length);
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}
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static int rockchip_bo_invalidate(struct bo *bo, struct mapping *mapping)
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{
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if (mapping->vma->priv) {
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struct rockchip_private_map_data *priv = mapping->vma->priv;
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memcpy(priv->cached_addr, priv->gem_addr, bo->total_size);
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}
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return 0;
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}
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static int rockchip_bo_flush(struct bo *bo, struct mapping *mapping)
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{
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struct rockchip_private_map_data *priv = mapping->vma->priv;
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if (priv && (mapping->vma->map_flags & BO_MAP_WRITE))
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memcpy(priv->gem_addr, priv->cached_addr, bo->total_size);
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return 0;
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}
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static uint32_t rockchip_resolve_format(uint32_t format, uint64_t use_flags)
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{
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switch (format) {
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case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
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/* Camera subsystem requires NV12. */
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if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
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return DRM_FORMAT_NV12;
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/*HACK: See b/28671744 */
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return DRM_FORMAT_XBGR8888;
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case DRM_FORMAT_FLEX_YCbCr_420_888:
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return DRM_FORMAT_NV12;
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default:
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return format;
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}
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}
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const struct backend backend_rockchip = {
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.name = "rockchip",
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.init = rockchip_init,
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.bo_create = rockchip_bo_create,
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.bo_create_with_modifiers = rockchip_bo_create_with_modifiers,
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.bo_destroy = drv_gem_bo_destroy,
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.bo_import = drv_prime_bo_import,
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.bo_map = rockchip_bo_map,
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.bo_unmap = rockchip_bo_unmap,
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.bo_invalidate = rockchip_bo_invalidate,
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.bo_flush = rockchip_bo_flush,
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.resolve_format = rockchip_resolve_format,
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};
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#endif
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