lin
2025-07-31 065ea569db06206874bbfa18eb25ff6121aec09b
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
/*
 *  Setup code for AT91SAM9
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */
 
#include <linux/of.h>
#include <linux/of_platform.h>
 
#include <asm/mach/arch.h>
#include <asm/system_misc.h>
 
#include "generic.h"
#include "soc.h"
 
static const struct at91_soc at91sam9_socs[] = {
   AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
   AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
   AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
   AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
   AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
   AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
        "at91sam9m11", "at91sam9g45"),
   AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
        "at91sam9m10", "at91sam9g45"),
   AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
        "at91sam9g46", "at91sam9g45"),
   AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
        "at91sam9g45", "at91sam9g45"),
   AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
        "at91sam9g15", "at91sam9x5"),
   AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
        "at91sam9g35", "at91sam9x5"),
   AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
        "at91sam9x35", "at91sam9x5"),
   AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
        "at91sam9g25", "at91sam9x5"),
   AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
        "at91sam9x25", "at91sam9x5"),
   AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
        "at91sam9cn12", "at91sam9n12"),
   AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
        "at91sam9n12", "at91sam9n12"),
   AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
        "at91sam9cn11", "at91sam9n12"),
   AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
   AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
   AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
   { /* sentinel */ },
};
 
static void __init at91sam9_common_init(void)
{
   struct soc_device *soc;
   struct device *soc_dev = NULL;
 
   soc = at91_soc_init(at91sam9_socs);
   if (soc != NULL)
       soc_dev = soc_device_to_device(soc);
 
   of_platform_default_populate(NULL, NULL, soc_dev);
}
 
static void __init at91sam9_dt_device_init(void)
{
   at91sam9_common_init();
   at91sam9260_pm_init();
}
 
static const char *const at91_dt_board_compat[] __initconst = {
   "atmel,at91sam9",
   NULL
};
 
DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9")
   /* Maintainer: Atmel */
   .init_machine    = at91sam9_dt_device_init,
   .dt_compat    = at91_dt_board_compat,
MACHINE_END
 
static void __init at91sam9g45_dt_device_init(void)
{
   at91sam9_common_init();
   at91sam9g45_pm_init();
}
 
static const char *const at91sam9g45_board_compat[] __initconst = {
   "atmel,at91sam9g45",
   NULL
};
 
DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45")
   /* Maintainer: Atmel */
   .init_machine    = at91sam9g45_dt_device_init,
   .dt_compat    = at91sam9g45_board_compat,
MACHINE_END
 
static void __init at91sam9x5_dt_device_init(void)
{
   at91sam9_common_init();
   at91sam9x5_pm_init();
}
 
static const char *const at91sam9x5_board_compat[] __initconst = {
   "atmel,at91sam9x5",
   "atmel,at91sam9n12",
   NULL
};
 
DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9")
   /* Maintainer: Atmel */
   .init_machine    = at91sam9x5_dt_device_init,
   .dt_compat    = at91sam9x5_board_compat,
MACHINE_END