/*
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* Copyright (C) 2014 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <private/bionic_asm.h>
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// DWARF constants.
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#define DW_CFA_def_cfa_expression 0x0f
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#define DW_CFA_expression 0x10
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#define DW_EH_PE_pcrel 0x10
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#define DW_EH_PE_sdata4 0x0b
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#define DW_OP_breg4 0x74
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#define DW_OP_deref 0x06
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// Offsets into struct sigcontext.
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#define OFFSET_EDI 16
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#define OFFSET_ESI 20
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#define OFFSET_EBP 24
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#define OFFSET_ESP 28
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#define OFFSET_EBX 32
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#define OFFSET_EDX 36
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#define OFFSET_ECX 40
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#define OFFSET_EAX 44
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#define OFFSET_EIP 56
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// Non-standard DWARF constants for the x86 registers.
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#define DW_x86_REG_EAX 0
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#define DW_x86_REG_ECX 1
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#define DW_x86_REG_EDX 2
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#define DW_x86_REG_EBX 3
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#define DW_x86_REG_EBP 5
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#define DW_x86_REG_ESI 6
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#define DW_x86_REG_EDI 7
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#define DW_x86_REG_EIP 8
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#define cfi_signal_frame_start(f) \
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.section .eh_frame,"a",@progbits; \
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.L ## f ## _START_EH_FRAME: \
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.long 2f - 1f; /* CIE length. */ \
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1:.long 0; /* CIE ID. */ \
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.byte 1; /* Version. */ \
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.string "zRS"; /* Augmentation string. */ \
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.uleb128 1; /* Code alignment factor. */ \
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.sleb128 -4; /* Data alignment factor. */ \
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.uleb128 DW_x86_REG_EIP; /* Return address register. */ \
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.uleb128 1; /* 1 byte of augmentation data. */ \
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.byte (DW_EH_PE_pcrel|DW_EH_PE_sdata4); /* FDE encoding. */ \
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.align 8; \
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2: \
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.long .L ## f ## _END_FDE - .L ## f ## _START_FDE; /* FDE length. */ \
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.L ## f ## _START_FDE: \
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.long .L ## f ## _START_FDE - .L ## f ## _START_EH_FRAME; /* CIE location. */ \
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.long (.L ## f ## _START - 1) - .; /* pcrel start address (see FDE encoding above). */ \
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.long .L ## f ## _END - (.L ## f ## _START - 1); /* Function this FDE applies to. */ \
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.uleb128 0; /* FDE augmentation length. */ \
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#define cfi_signal_frame_end(f) \
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.L ## f ## _END_FDE: \
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#define cfi_def_cfa(offset) \
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.byte DW_CFA_def_cfa_expression; \
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.uleb128 2f-1f; \
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1:.byte DW_OP_breg4; \
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.sleb128 offset; \
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.byte DW_OP_deref; \
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2: \
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#define cfi_offset(reg_number,offset) \
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.byte DW_CFA_expression; \
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.uleb128 reg_number; \
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.uleb128 2f-1f; \
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1:.byte DW_OP_breg4; \
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.sleb128 offset; \
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2: \
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ENTRY_PRIVATE(__restore)
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.L__restore_START:
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popl %eax
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movl $__NR_sigreturn, %eax
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int $0x80
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.L__restore_END:
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END(__restore)
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cfi_signal_frame_start(__restore)
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cfi_def_cfa(OFFSET_ESP + 4)
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cfi_offset(DW_x86_REG_EDI, OFFSET_EDI + 4)
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cfi_offset(DW_x86_REG_ESI, OFFSET_ESI + 4)
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cfi_offset(DW_x86_REG_EBP, OFFSET_EBP + 4)
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cfi_offset(DW_x86_REG_EBX, OFFSET_EBX + 4)
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cfi_offset(DW_x86_REG_EDX, OFFSET_EDX + 4)
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cfi_offset(DW_x86_REG_ECX, OFFSET_ECX + 4)
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cfi_offset(DW_x86_REG_EAX, OFFSET_EAX + 4)
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cfi_offset(DW_x86_REG_EIP, OFFSET_EIP + 4)
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cfi_signal_frame_end(__restore)
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ENTRY_PRIVATE(__restore_rt)
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.L__restore_rt_START:
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movl $__NR_rt_sigreturn, %eax
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int $0x80
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.L__restore_rt_END:
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END(__restore_rt)
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cfi_signal_frame_start(__restore_rt)
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cfi_def_cfa(OFFSET_ESP + 160)
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cfi_offset(DW_x86_REG_EDI, OFFSET_EDI + 160)
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cfi_offset(DW_x86_REG_ESI, OFFSET_ESI + 160)
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cfi_offset(DW_x86_REG_EBP, OFFSET_EBP + 160)
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cfi_offset(DW_x86_REG_EBX, OFFSET_EBX + 160)
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cfi_offset(DW_x86_REG_EDX, OFFSET_EDX + 160)
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cfi_offset(DW_x86_REG_ECX, OFFSET_ECX + 160)
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cfi_offset(DW_x86_REG_EAX, OFFSET_EAX + 160)
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cfi_offset(DW_x86_REG_EIP, OFFSET_EIP + 160)
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cfi_signal_frame_end(__restore_rt)
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