/*
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* Copyright (C) 2012 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "disassembler_arm.h"
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#include <memory>
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#include <string>
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#include "android-base/logging.h"
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#include "arch/arm/registers_arm.h"
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#include "base/bit_utils.h"
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wshadow"
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#include "aarch32/disasm-aarch32.h"
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#include "aarch32/instructions-aarch32.h"
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#pragma GCC diagnostic pop
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namespace art {
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namespace arm {
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using vixl::aarch32::MemOperand;
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using vixl::aarch32::PrintDisassembler;
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using vixl::aarch32::pc;
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static const vixl::aarch32::Register tr(TR);
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class DisassemblerArm::CustomDisassembler final : public PrintDisassembler {
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class CustomDisassemblerStream final : public DisassemblerStream {
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public:
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CustomDisassemblerStream(std::ostream& os,
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const CustomDisassembler* disasm,
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const DisassemblerOptions* options)
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: DisassemblerStream(os), disasm_(disasm), options_(options) {}
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DisassemblerStream& operator<<(const PrintLabel& label) override {
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const LocationType type = label.GetLocationType();
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switch (type) {
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case kLoadByteLocation:
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case kLoadHalfWordLocation:
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case kLoadWordLocation:
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case kLoadDoubleWordLocation:
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case kLoadSignedByteLocation:
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case kLoadSignedHalfWordLocation:
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case kLoadSinglePrecisionLocation:
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case kLoadDoublePrecisionLocation:
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case kVld1Location:
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case kVld2Location:
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case kVld3Location:
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case kVld4Location: {
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const int32_t offset = label.GetImmediate();
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os() << "[pc, #" << offset << "]";
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PrintLiteral(type, offset);
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return *this;
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}
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default:
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return DisassemblerStream::operator<<(label);
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}
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}
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DisassemblerStream& operator<<(vixl::aarch32::Register reg) override {
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if (reg.Is(tr)) {
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os() << "tr";
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return *this;
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} else {
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return DisassemblerStream::operator<<(reg);
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}
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}
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DisassemblerStream& operator<<(const MemOperand& operand) override {
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// VIXL must use a PrintLabel object whenever the base register is PC;
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// the following check verifies this invariant, and guards against bugs.
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DCHECK(!operand.GetBaseRegister().Is(pc));
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DisassemblerStream::operator<<(operand);
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if (operand.GetBaseRegister().Is(tr) && operand.IsImmediate()) {
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os() << " ; ";
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options_->thread_offset_name_function_(os(), operand.GetOffsetImmediate());
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}
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return *this;
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}
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DisassemblerStream& operator<<(const vixl::aarch32::AlignedMemOperand& operand) override {
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// VIXL must use a PrintLabel object whenever the base register is PC;
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// the following check verifies this invariant, and guards against bugs.
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DCHECK(!operand.GetBaseRegister().Is(pc));
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return DisassemblerStream::operator<<(operand);
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}
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private:
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void PrintLiteral(LocationType type, int32_t offset);
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const CustomDisassembler* disasm_;
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const DisassemblerOptions* options_;
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};
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public:
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CustomDisassembler(std::ostream& os, const DisassemblerOptions* options)
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: PrintDisassembler(&disassembler_stream_),
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disassembler_stream_(os, this, options),
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is_t32_(true) {}
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void PrintCodeAddress(uint32_t prog_ctr) override {
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os() << "0x" << std::hex << std::setw(8) << std::setfill('0') << prog_ctr << ": ";
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}
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void SetIsT32(bool is_t32) {
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is_t32_ = is_t32;
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}
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bool GetIsT32() const {
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return is_t32_;
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}
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private:
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CustomDisassemblerStream disassembler_stream_;
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// Whether T32 stream is decoded.
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bool is_t32_;
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};
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void DisassemblerArm::CustomDisassembler::CustomDisassemblerStream::PrintLiteral(LocationType type,
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int32_t offset) {
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// Literal offsets are not required to be aligned, so we may need unaligned access.
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using unaligned_int16_t __attribute__((__aligned__(1))) = const int16_t;
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using unaligned_uint16_t __attribute__((__aligned__(1))) = const uint16_t;
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using unaligned_int32_t __attribute__((__aligned__(1))) = const int32_t;
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using unaligned_int64_t __attribute__((__aligned__(1))) = const int64_t;
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using unaligned_float __attribute__((__aligned__(1))) = const float;
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using unaligned_double __attribute__((__aligned__(1))) = const double;
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// Zeros are used for the LocationType values this function does not care about.
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const size_t literal_size[kVst4Location + 1] = {
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0, 0, 0, 0, sizeof(uint8_t), sizeof(unaligned_uint16_t), sizeof(unaligned_int32_t),
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sizeof(unaligned_int64_t), sizeof(int8_t), sizeof(unaligned_int16_t),
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sizeof(unaligned_float), sizeof(unaligned_double)};
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const uintptr_t begin = reinterpret_cast<uintptr_t>(options_->base_address_);
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const uintptr_t end = reinterpret_cast<uintptr_t>(options_->end_address_);
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uintptr_t literal_addr =
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RoundDown(disasm_->GetCodeAddress(), vixl::aarch32::kRegSizeInBytes) + offset;
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literal_addr += disasm_->GetIsT32() ? vixl::aarch32::kT32PcDelta : vixl::aarch32::kA32PcDelta;
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if (!options_->absolute_addresses_) {
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literal_addr += begin;
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}
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os() << " ; ";
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// Bail out if not within expected buffer range to avoid trying to fetch invalid literals
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// (we can encounter them when interpreting raw data as instructions).
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if (literal_addr < begin || literal_addr > end - literal_size[type]) {
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os() << "(?)";
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} else {
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switch (type) {
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case kLoadByteLocation:
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os() << *reinterpret_cast<const uint8_t*>(literal_addr);
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break;
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case kLoadHalfWordLocation:
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os() << *reinterpret_cast<unaligned_uint16_t*>(literal_addr);
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break;
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case kLoadWordLocation: {
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const int32_t value = *reinterpret_cast<unaligned_int32_t*>(literal_addr);
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os() << "0x" << std::hex << std::setw(8) << std::setfill('0') << value;
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break;
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}
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case kLoadDoubleWordLocation: {
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const int64_t value = *reinterpret_cast<unaligned_int64_t*>(literal_addr);
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os() << "0x" << std::hex << std::setw(16) << std::setfill('0') << value;
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break;
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}
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case kLoadSignedByteLocation:
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os() << *reinterpret_cast<const int8_t*>(literal_addr);
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break;
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case kLoadSignedHalfWordLocation:
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os() << *reinterpret_cast<unaligned_int16_t*>(literal_addr);
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break;
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case kLoadSinglePrecisionLocation:
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os() << *reinterpret_cast<unaligned_float*>(literal_addr);
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break;
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case kLoadDoublePrecisionLocation:
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os() << *reinterpret_cast<unaligned_double*>(literal_addr);
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break;
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default:
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UNIMPLEMENTED(FATAL) << "Unexpected literal type: " << type;
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}
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}
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}
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DisassemblerArm::DisassemblerArm(DisassemblerOptions* options)
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: Disassembler(options), disasm_(std::make_unique<CustomDisassembler>(output_, options)) {}
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size_t DisassemblerArm::Dump(std::ostream& os, const uint8_t* begin) {
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uintptr_t next;
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// Remove the Thumb specifier bit; no effect if begin does not point to T32 code.
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const uintptr_t instr_ptr = reinterpret_cast<uintptr_t>(begin) & ~1;
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const bool is_t32 = (reinterpret_cast<uintptr_t>(begin) & 1) != 0;
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disasm_->SetCodeAddress(GetPc(instr_ptr));
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disasm_->SetIsT32(is_t32);
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if (is_t32) {
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const uint16_t* const ip = reinterpret_cast<const uint16_t*>(instr_ptr);
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const uint16_t* const end_address = reinterpret_cast<const uint16_t*>(
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GetDisassemblerOptions()->end_address_);
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next = reinterpret_cast<uintptr_t>(disasm_->DecodeT32At(ip, end_address));
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} else {
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const uint32_t* const ip = reinterpret_cast<const uint32_t*>(instr_ptr);
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next = reinterpret_cast<uintptr_t>(disasm_->DecodeA32At(ip));
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}
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os << output_.str();
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output_.str(std::string());
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return next - instr_ptr;
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}
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void DisassemblerArm::Dump(std::ostream& os, const uint8_t* begin, const uint8_t* end) {
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DCHECK_LE(begin, end);
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// Remove the Thumb specifier bit; no effect if begin does not point to T32 code.
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const uintptr_t base = reinterpret_cast<uintptr_t>(begin) & ~1;
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const bool is_t32 = (reinterpret_cast<uintptr_t>(begin) & 1) != 0;
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disasm_->SetCodeAddress(GetPc(base));
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disasm_->SetIsT32(is_t32);
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if (is_t32) {
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// The Thumb specifier bits cancel each other.
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disasm_->DisassembleT32Buffer(reinterpret_cast<const uint16_t*>(base), end - begin);
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} else {
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disasm_->DisassembleA32Buffer(reinterpret_cast<const uint32_t*>(base), end - begin);
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}
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os << output_.str();
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output_.str(std::string());
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}
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} // namespace arm
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} // namespace art
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