/** @file
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Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _CACHE_LIB_H_
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#define _CACHE_LIB_H_
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//
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// EFI_MEMORY_CACHE_TYPE
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//
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typedef INT32 EFI_MEMORY_CACHE_TYPE;
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#define EFI_CACHE_UNCACHEABLE 0
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#define EFI_CACHE_WRITECOMBINING 1
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#define EFI_CACHE_WRITETHROUGH 4
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#define EFI_CACHE_WRITEPROTECTED 5
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#define EFI_CACHE_WRITEBACK 6
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/**
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Reset all the MTRRs to a known state.
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@retval EFI_SUCCESS All MTRRs have been reset successfully.
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**/
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EFI_STATUS
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EFIAPI
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ResetCacheAttributes (
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VOID
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);
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/**
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Given the memory range and cache type, programs the MTRRs.
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@param[in] MemoryAddress Base Address of Memory to program MTRR.
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@param[in] MemoryLength Length of Memory to program MTRR.
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@param[in] MemoryCacheType Cache Type.
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@retval EFI_SUCCESS Mtrr are set successfully.
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@retval EFI_LOAD_ERROR No empty MTRRs to use.
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@retval EFI_INVALID_PARAMETER The input parameter is not valid.
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@retval others An error occurs when setting MTTR.
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**/
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EFI_STATUS
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EFIAPI
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SetCacheAttributes (
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IN EFI_PHYSICAL_ADDRESS MemoryAddress,
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IN UINT64 MemoryLength,
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IN EFI_MEMORY_CACHE_TYPE MemoryCacheType
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);
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#endif
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