/** @file
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*
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* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
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* Copyright (c) 2017, Linaro, Ltd. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <PiPei.h>
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#include <Library/ArmLib.h>
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#include <Library/ArmMmuLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/HobLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PeiServicesLib.h>
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#include <Library/PeiServicesTablePointerLib.h>
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#include <Platform/MemoryMap.h>
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#include <Platform/Pcie.h>
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#include <Ppi/Capsule.h>
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#include <Ppi/DramInfo.h>
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#define ARM_MEMORY_REGION(Base, Size) \
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{ (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK }
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#define ARM_UNCACHED_REGION(Base, Size) \
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{ (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED }
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#define ARM_DEVICE_REGION(Base, Size) \
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{ (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_DEVICE }
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#define ARM_CACHED_DEVICE_REGION(Base, Size) \
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{ (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE }
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VOID
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BuildMemoryTypeInformationHob (
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VOID
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);
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STATIC CONST EFI_RESOURCE_ATTRIBUTE_TYPE mDramResourceAttributes =
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EFI_RESOURCE_ATTRIBUTE_PRESENT |
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EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
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EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_TESTED;
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STATIC CONST ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] = {
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// Memory mapped SPI NOR flash
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ARM_CACHED_DEVICE_REGION (FixedPcdGet64 (PcdFdBaseAddress),
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FixedPcdGet32 (PcdFdSize)),
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// SynQuacer OnChip peripherals
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ARM_DEVICE_REGION (SYNQUACER_PERIPHERALS_BASE,
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SYNQUACER_PERIPHERALS_SZ),
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// SynQuacer OnChip non-secure SRAM
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ARM_CACHED_DEVICE_REGION (SYNQUACER_NON_SECURE_SRAM_BASE,
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SYNQUACER_NON_SECURE_SRAM_SZ),
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// SynQuacer GIC-500
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ARM_DEVICE_REGION (SYNQUACER_GIC500_DIST_BASE, SYNQUACER_GIC500_DIST_SIZE),
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ARM_DEVICE_REGION (SYNQUACER_GIC500_RDIST_BASE, SYNQUACER_GIC500_RDIST_SIZE),
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// SynQuacer eMMC(SDH30)
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ARM_DEVICE_REGION (SYNQUACER_EMMC_BASE, SYNQUACER_EMMC_BASE_SZ),
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// SynQuacer GPIO block
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ARM_DEVICE_REGION (SYNQUACER_GPIO_BASE, SYNQUACER_GPIO_SIZE),
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// SynQuacer EEPROM - could point to NOR flash as well
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ARM_CACHED_DEVICE_REGION (FixedPcdGet32 (PcdNetsecEepromBase),
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SYNQUACER_EEPROM_BASE_SZ),
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// SynQuacer I2C
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ARM_DEVICE_REGION (SYNQUACER_I2C0_BASE, SYNQUACER_I2C0_SIZE),
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ARM_DEVICE_REGION (SYNQUACER_I2C1_BASE, SYNQUACER_I2C1_SIZE),
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// SynQuacer NETSEC
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ARM_DEVICE_REGION (SYNQUACER_NETSEC1_BASE, SYNQUACER_NETSEC1_BASE_SZ),
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// PCIe control registers
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ARM_DEVICE_REGION (SYNQUACER_PCIE_BASE, SYNQUACER_PCIE_SIZE),
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// PCIe config space
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ARM_DEVICE_REGION (SYNQUACER_PCI_SEG0_CONFIG_BASE,
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SYNQUACER_PCI_SEG0_CONFIG_SIZE),
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ARM_DEVICE_REGION (SYNQUACER_PCI_SEG1_CONFIG_BASE,
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SYNQUACER_PCI_SEG1_CONFIG_SIZE),
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// PCIe I/O space
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ARM_DEVICE_REGION (SYNQUACER_PCI_SEG0_PORTIO_MEMBASE,
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SYNQUACER_PCI_SEG0_PORTIO_MEMSIZE),
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ARM_DEVICE_REGION (SYNQUACER_PCI_SEG1_PORTIO_MEMBASE,
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SYNQUACER_PCI_SEG1_PORTIO_MEMSIZE),
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// variable store
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ARM_DEVICE_REGION (FixedPcdGet32 (PcdFip006DxeRegBaseAddress),
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EFI_PAGE_SIZE),
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ARM_DEVICE_REGION (FixedPcdGet32 (PcdFip006DxeMemBaseAddress),
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EFI_PAGE_SIZE),
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ARM_DEVICE_REGION (FixedPcdGet32 (PcdFlashNvStorageVariableBase),
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FixedPcdGet32 (PcdFlashNvStorageVariableSize)),
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ARM_DEVICE_REGION (FixedPcdGet32 (PcdFlashNvStorageFtwWorkingBase),
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FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize)),
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ARM_DEVICE_REGION (FixedPcdGet32 (PcdFlashNvStorageFtwSpareBase),
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FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize)),
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// NETSEC/eMMC SMMU
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ARM_DEVICE_REGION (SYNQUACER_SCB_SMMU_BASE, SYNQUACER_SCB_SMMU_SIZE),
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// DesignWare FUART
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ARM_DEVICE_REGION (SYNQUACER_UART1_BASE, SYNQUACER_UART1_SIZE),
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// SPI#1 MMIO
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ARM_DEVICE_REGION (SYNQUACER_SPI1_MMIO_BASE, SYNQUACER_SPI1_MMIO_SIZE),
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};
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STATIC
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EFI_STATUS
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DeclareDram (
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OUT ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryTable
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)
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{
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SYNQUACER_DRAM_INFO_PPI *DramInfo;
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EFI_STATUS Status;
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UINTN Idx;
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UINTN RegionCount;
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UINT64 Base;
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UINT64 Size;
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ARM_MEMORY_REGION_DESCRIPTOR *DramDescriptor;
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Status = PeiServicesLocatePpi (&gSynQuacerDramInfoPpiGuid, 0, NULL,
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(VOID **)&DramInfo);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Status = DramInfo->GetRegionCount (&RegionCount);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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*VirtualMemoryTable = AllocatePool (sizeof (mVirtualMemoryTable) +
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(RegionCount + 1) *
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sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
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if (*VirtualMemoryTable == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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CopyMem (*VirtualMemoryTable, mVirtualMemoryTable,
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sizeof (mVirtualMemoryTable));
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DramDescriptor = *VirtualMemoryTable + ARRAY_SIZE (mVirtualMemoryTable);
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for (Idx = 0; Idx < RegionCount; Idx++) {
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Status = DramInfo->GetRegion (Idx, &Base, &Size);
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ASSERT_EFI_ERROR (Status);
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BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
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mDramResourceAttributes, Base, Size);
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if (Base > MAX_ALLOC_ADDRESS - Size + 1) {
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continue;
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}
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DramDescriptor->PhysicalBase = Base;
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DramDescriptor->VirtualBase = Base;
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DramDescriptor->Length = MIN (Size, MAX_ALLOC_ADDRESS - Base + 1);
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DramDescriptor->Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
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DramDescriptor++;
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}
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DramDescriptor->PhysicalBase = 0;
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DramDescriptor->VirtualBase = 0;
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DramDescriptor->Length = 0;
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DramDescriptor->Attributes = 0;
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return EFI_SUCCESS;
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}
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STATIC
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BOOLEAN
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CheckCapsule (
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IN EFI_PEI_SERVICES **PeiServices,
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IN PEI_CAPSULE_PPI *Capsule,
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IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,
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OUT VOID **CapsuleBuffer,
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OUT UINTN *CapsuleBufferLength
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)
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{
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EFI_STATUS Status;
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Status = Capsule->CheckCapsuleUpdate (PeiServices);
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if (!EFI_ERROR (Status)) {
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//
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// Coalesce the capsule into unused memory. CreateState() below will copy
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// it to a properly allocated buffer.
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//
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*CapsuleBuffer = (VOID *)(UINTN)PcdGet64 (PcdSystemMemoryBase);
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*CapsuleBufferLength = UefiMemoryBase - PcdGet64 (PcdSystemMemoryBase);
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PeiServicesSetBootMode (BOOT_ON_FLASH_UPDATE);
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Status = Capsule->Coalesce (PeiServices, CapsuleBuffer,
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CapsuleBufferLength);
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if (!EFI_ERROR (Status)) {
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DEBUG ((DEBUG_INFO, "%a: Coalesced capsule @ %p (0x%lx)\n",
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__FUNCTION__, *CapsuleBuffer, *CapsuleBufferLength));
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return TRUE;
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} else {
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DEBUG ((DEBUG_WARN, "%a: failed to coalesce() capsule (Status == %r)\n",
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__FUNCTION__, Status));
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}
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}
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return FALSE;
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}
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EFI_STATUS
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EFIAPI
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MemoryPeim (
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IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,
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IN UINT64 UefiMemorySize
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)
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{
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EFI_STATUS Status;
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ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
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EFI_PEI_SERVICES **PeiServices;
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PEI_CAPSULE_PPI *Capsule;
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VOID *CapsuleBuffer;
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UINTN CapsuleBufferLength;
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BOOLEAN HaveCapsule;
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EFI_BOOT_MODE BootMode;
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Status = DeclareDram (&VirtualMemoryTable);
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ASSERT_EFI_ERROR (Status);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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PeiServices = (EFI_PEI_SERVICES **) GetPeiServicesTablePointer ();
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ASSERT (PeiServices != NULL);
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Status = PeiServicesLocatePpi (&gPeiCapsulePpiGuid, 0, NULL,
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(VOID **)&Capsule);
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ASSERT_EFI_ERROR (Status);
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//
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// Check for persistent capsules, unless we are booting with default
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// settings.
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//
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Status = PeiServicesGetBootMode (&BootMode);
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if (!EFI_ERROR (Status) && BootMode != BOOT_WITH_DEFAULT_SETTINGS) {
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HaveCapsule = CheckCapsule (PeiServices, Capsule, UefiMemoryBase,
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&CapsuleBuffer, &CapsuleBufferLength);
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} else {
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HaveCapsule = FALSE;
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}
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Status = ArmConfigureMmu (VirtualMemoryTable, NULL, NULL);
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ASSERT_EFI_ERROR (Status);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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if (HaveCapsule) {
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Status = Capsule->CreateState (PeiServices, CapsuleBuffer,
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CapsuleBufferLength);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_WARN, "%a: Capsule->CreateState failed (Status == %r)\n",
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__FUNCTION__, Status));
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}
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}
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if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) {
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// Optional feature that helps prevent EFI memory map fragmentation.
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BuildMemoryTypeInformationHob ();
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}
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return EFI_SUCCESS;
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}
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