/** @file
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Industry Standard Definitions of RISC-V Processor Specific data defined in
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below link for complaiant with SMBIOS Table Specification v3.3.0.
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https://github.com/riscv/riscv-smbios
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Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef SMBIOS_RISC_V_PROCESSOR_SPECIFIC_DATA_H_
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#define SMBIOS_RISC_V_PROCESSOR_SPECIFIC_DATA_H_
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#include <IndustryStandard/SmBios.h>
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#include <RiscVImpl.h>
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#pragma pack(1)
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typedef enum{
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RegisterUnsupported = 0x00,
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RegisterLen32 = 0x01,
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RegisterLen64 = 0x02,
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RegisterLen128 = 0x03
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} RISC_V_REGISTER_LENGTH;
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#define SMBIOS_RISC_V_PROCESSOR_SPECIFIC_DATA_REVISION 0x100
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#define SMBIOS_RISC_V_PSD_MACHINE_MODE_SUPPORTED (0x01 << 0)
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#define SMBIOS_RISC_V_PSD_SUPERVISOR_MODE_SUPPORTED (0x01 << 2)
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#define SMBIOS_RISC_V_PSD_USER_MODE_SUPPORTED (0x01 << 3)
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#define SMBIOS_RISC_V_PSD_DEBUG_MODE_SUPPORTED (0x01 << 7)
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///
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/// RISC-V processor specific data for SMBIOS type 44
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///
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typedef struct {
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UINT16 Revision;
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UINT8 Length;
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RISCV_UINT128 HartId;
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UINT8 BootHartId;
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RISCV_UINT128 MachineVendorId;
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RISCV_UINT128 MachineArchId;
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RISCV_UINT128 MachineImplId;
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UINT32 InstSetSupported;
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UINT8 PrivilegeModeSupported;
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RISCV_UINT128 MModeExcepDelegation;
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RISCV_UINT128 MModeInterruptDelegation;
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UINT8 HartXlen;
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UINT8 MachineModeXlen;
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UINT8 Reserved;
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UINT8 SupervisorModeXlen;
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UINT8 UserModeXlen;
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} SMBIOS_RISC_V_PROCESSOR_SPECIFIC_DATA;
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#pragma pack()
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#endif
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