/** @file
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PCI Host Bridge Library instance for pci-ecam-generic DT nodes
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Copyright (c) 2019, Linaro Ltd. All rights reserved
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Library/DebugLib.h>
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#include <Library/DevicePathLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PciHostBridgeLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <PiDxe.h>
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#include <Protocol/PciRootBridgeIo.h>
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#include <Protocol/PciHostBridgeResourceAllocation.h>
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#pragma pack(1)
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typedef struct {
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ACPI_HID_DEVICE_PATH AcpiDevicePath;
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EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
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} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
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#pragma pack ()
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STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath = {
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{
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{
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ACPI_DEVICE_PATH,
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ACPI_DP,
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{
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(UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
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(UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
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}
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},
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EISA_PNP_ID(0x0A03),
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0
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},
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{
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END_DEVICE_PATH_TYPE,
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END_ENTIRE_DEVICE_PATH_SUBTYPE,
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{
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END_DEVICE_PATH_LENGTH,
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0
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}
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}
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};
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GLOBAL_REMOVE_IF_UNREFERENCED
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CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
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L"Mem", L"I/O", L"Bus"
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};
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STATIC PCI_ROOT_BRIDGE mRootBridge = {
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/* UINT32 Segment; Segment number */
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0,
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/* UINT64 Supports; Supported attributes */
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EFI_PCI_ATTRIBUTE_ISA_IO_16 | EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
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EFI_PCI_ATTRIBUTE_VGA_IO_16 | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16,
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/* UINT64 Attributes; Initial attributes */
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EFI_PCI_ATTRIBUTE_ISA_IO_16 | EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
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EFI_PCI_ATTRIBUTE_VGA_IO_16 | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16,
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/* BOOLEAN DmaAbove4G; DMA above 4GB memory */
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TRUE,
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/* BOOLEAN NoExtendedConfigSpace; When FALSE, the root bridge supports
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Extended (4096-byte) Configuration Space. When TRUE, the root bridge
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supports 256-byte Configuration Space only. */
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FALSE,
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/* BOOLEAN ResourceAssigned; Resource assignment status of the root bridge.
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Set to TRUE if Bus/IO/MMIO resources for root bridge have been assigned */
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FALSE,
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/* UINT64 AllocationAttributes; Allocation attributes. */
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EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM |
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EFI_PCI_HOST_BRIDGE_MEM64_DECODE, /* as Mmio64Size > 0 */
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{
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/* PCI_ROOT_BRIDGE_APERTURE Bus; Bus aperture which can be used by the
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* root bridge. */
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FixedPcdGet32 (PcdPciBusMin),
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FixedPcdGet32 (PcdPciBusMax)
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},
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/* PCI_ROOT_BRIDGE_APERTURE Io; IO aperture which can be used by the root
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bridge */
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{
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FixedPcdGet64 (PcdPciIoBase),
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FixedPcdGet64 (PcdPciIoBase) + FixedPcdGet64 (PcdPciIoSize) - 1
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},
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/* PCI_ROOT_BRIDGE_APERTURE Mem; MMIO aperture below 4GB which can be used by
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the root bridge
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(gArmTokenSpaceGuid.PcdPciMmio32Translation as 0x0) */
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{
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FixedPcdGet32 (PcdPciMmio32Base),
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FixedPcdGet32 (PcdPciMmio32Base) + FixedPcdGet32 (PcdPciMmio32Size) - 1,
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},
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/* PCI_ROOT_BRIDGE_APERTURE MemAbove4G; MMIO aperture above 4GB which can be
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used by the root bridge.
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(gArmTokenSpaceGuid.PcdPciMmio64Translation as 0x0) */
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{
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FixedPcdGet64 (PcdPciMmio64Base),
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FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size) - 1
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},
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/* PCI_ROOT_BRIDGE_APERTURE PMem; Prefetchable MMIO aperture below 4GB which
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can be used by the root bridge.
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In our case, there are no separate ranges for prefetchable and
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non-prefetchable BARs */
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{ MAX_UINT64, 0 },
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/* PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; Prefetchable MMIO aperture above 4GB
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which can be used by the root bridge. */
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{ MAX_UINT64, 0 },
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/* EFI_DEVICE_PATH_PROTOCOL *DevicePath; Device path. */
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(EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath,
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};
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/**
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Return all the root bridge instances in an array.
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@param Count Return the count of root bridge instances.
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@return All the root bridge instances in an array.
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The array should be passed into PciHostBridgeFreeRootBridges()
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when it's not used.
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**/
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PCI_ROOT_BRIDGE *
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EFIAPI
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PciHostBridgeGetRootBridges (
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UINTN *Count
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)
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{
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*Count = 1;
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return &mRootBridge;
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}
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/**
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Free the root bridge instances array returned from
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PciHostBridgeGetRootBridges().
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@param Bridges The root bridge instances array.
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@param Count The count of the array.
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**/
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VOID
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EFIAPI
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PciHostBridgeFreeRootBridges (
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PCI_ROOT_BRIDGE *Bridges,
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UINTN Count
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)
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{
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ASSERT (Count == 1);
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}
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/**
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Inform the platform that the resource conflict happens.
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@param HostBridgeHandle Handle of the Host Bridge.
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@param Configuration Pointer to PCI I/O and PCI memory resource
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descriptors. The Configuration contains the resources
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for all the root bridges. The resource for each root
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bridge is terminated with END descriptor and an
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additional END is appended indicating the end of the
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entire resources. The resource descriptor field
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values follow the description in
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EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
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.SubmitResources().
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**/
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VOID
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EFIAPI
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PciHostBridgeResourceConflict (
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EFI_HANDLE HostBridgeHandle,
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VOID *Configuration
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)
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{
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
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UINTN RootBridgeIndex;
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DEBUG ((DEBUG_ERROR, "PciHostBridge: Resource conflict happens!\n"));
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RootBridgeIndex = 0;
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Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
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while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
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DEBUG ((DEBUG_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
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for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
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ASSERT (Descriptor->ResType <
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ARRAY_SIZE(mPciHostBridgeLibAcpiAddressSpaceTypeStr));
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DEBUG ((DEBUG_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
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mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
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Descriptor->AddrLen, Descriptor->AddrRangeMax
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));
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if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
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DEBUG ((DEBUG_ERROR, " Granularity/SpecificFlag = %ld / %02x%s\n",
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Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
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((Descriptor->SpecificFlag &
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EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
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) != 0) ? L" (Prefetchable)" : L""
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));
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}
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}
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//
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// Skip the END descriptor for root bridge
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//
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ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
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Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
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(EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
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);
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}
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}
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