/** @file
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Register names for PCH private chipset register
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Conventions:
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Prefixes:
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Definitions beginning with "R_" are registers
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Definitions beginning with "B_" are bits within registers
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Definitions beginning with "V_" are meaningful values within the bits
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Definitions beginning with "S_" are register sizes
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Definitions beginning with "N_" are the bit position
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In general, PCH registers are denoted by "_PCH_" in register names
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Registers / bits that are different between PCH generations are denoted by
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_PCH_[generation_name]_" in register/bit names.
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Registers / bits that are specific to PCH-H denoted by "_H_" in register/bit names.
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Registers / bits that are specific to PCH-LP denoted by "_LP_" in register/bit names.
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e.g., "_PCH_H_", "_PCH_LP_"
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Registers / bits names without _H_ or _LP_ apply for both H and LP.
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Registers / bits that are different between SKUs are denoted by "_[SKU_name]"
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at the end of the register/bit names
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Registers / bits of new devices introduced in a PCH generation will be just named
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as "_PCH_" without [generation_name] inserted.
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@copyright
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Copyright 2013 - 2021 Intel Corporation. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _PCH_REGS_PCR_H_
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#define _PCH_REGS_PCR_H_
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///
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/// Definition for PCR base address (defined in PchReservedResources.h)
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///
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//#define PCH_PCR_BASE_ADDRESS 0xFD000000
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//#define PCH_PCR_MMIO_SIZE 0x01000000
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/**
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Definition for PCR address
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The PCR address is used to the PCR MMIO programming
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**/
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#define PCH_PCR_ADDRESS(Pid, Offset) (PCH_PCR_BASE_ADDRESS | ((UINT8) (Pid) << 16) | (UINT16) (Offset))
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#define PCH_PCR_ADDRESS_BASE(PcrBaseAddress, Pid, Offset) ((UINTN) (PcrBaseAddress) | ((UINT8) (Pid) << 16) | (UINT16) (Offset))
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/**
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Definition for SBI PID
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The PCH_SBI_PID defines the PID for PCR MMIO programming and PCH SBI programming as well.
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**/
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#define PID_BROADCAST1 0xFF
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#define PID_BROADCAST2 0xFE
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//Rsv = 0xFD-0xF0,
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#define PID_DMI 0xEF
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#define PID_ESPISPI 0xEE
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#define PID_ICLK 0xED
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#define PID_MODPHY4 0xEB
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#define PID_MODPHY5 0x10
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#define PID_MODPHY1 0xE9
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#define PID_PMC 0xE8
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//Rsv = 0xE7,
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#define PID_XHCI 0xE6
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#define PID_OTG 0xE5
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#define PID_SPE 0xE4 // Reserved in SKL PCH LP
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#define PID_SPD 0xE3 // Reserved in SKL PCH LP
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#define PID_SPC 0xE2
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#define PID_SPB 0xE1
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#define PID_SPA 0xE0
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#define PID_UPSX8 0x06
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#define PID_UPSX16 0x07
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#define PID_TAP2IOSFSB1 0xDF
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#define PID_TRSB 0xDD
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#define PID_ICC 0xDC
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#define PID_GBE 0xDB
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//Rsv = 0xDA,
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#define PID_SATA 0xD9
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#define PID_SSATA 0x0F
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#define PID_LDO 0x14
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//Rsv = 0xD8,
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#define PID_DSP 0xD7
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//Rsv = 0xD6,
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#define PID_FUSE 0xD5
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#define PID_FSPROX0 0xD4
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#define PID_DRNG 0xD2
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//Rsv = 0xD1,
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#define PID_FIA 0xCF
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#define PID_FIAWM26 0x13
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//Rsv = 0xCE-0xCC,
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#define PID_USB2 0xCA
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//Rsv = 0xC8
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#define PID_LPC 0xC7
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#define PID_SMB 0xC6
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#define PID_P2S 0xC5
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#define PID_ITSS 0xC4
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#define PID_RTC_HOST 0xC3
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//Rsv = 0xC2-0xC1,
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#define PID_PSF5 0x8F
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#define PID_PSF6 0x70
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#define PID_PSF7 0x01
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#define PID_PSF8 0x29
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#define PID_PSF9 0x21
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#define PID_PSF10 0x36
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#define PID_PSF4 0xBD
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#define PID_PSF3 0xBC
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#define PID_PSF2 0xBB
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#define PID_PSF1 0xBA
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#define PID_HOTHARM 0xB9
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#define PID_DCI 0xB8
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#define PID_DFXAGG 0xB7
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#define PID_NPK 0xB6
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//Rsv = 0xB5-0xB1,
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#define PID_MMP0 0xB0
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#define PID_GPIOCOM0 0xAF
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#define PID_GPIOCOM1 0xAE
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#define PID_GPIOCOM2 0xAD
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#define PID_GPIOCOM3 0xAC
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#define PID_GPIOCOM4 0xAB
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#define PID_GPIOCOM5 0x11
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#define PID_MODPHY2 0xA9
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#define PID_MODPHY3 0xA8
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//Rsv = 0xA7-0xA6,
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#define PID_PNCRC 0xA5
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#define PID_PNCRB 0xA4
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#define PID_PNCRA 0xA3
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#define PID_PNCR0 0xA2
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#define PID_CSME15 0x9F // SMS2
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#define PID_CSME14 0x9E // SMS1
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#define PID_CSME13 0x9D // PMT
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#define PID_CSME12 0x9C // PTIO
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#define PID_CSME11 0x9B // PECI
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#define PID_CSME9 0x99 // SMT6
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#define PID_CSME8 0x98 // SMT5
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#define PID_CSME7 0x97 // SMT4
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#define PID_CSME6 0x96 // SMT3
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#define PID_CSME5 0x95 // SMT2
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#define PID_CSME4 0x94 // SMT1 (SMBus Message Transport 1)
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#define PID_CSME3 0x93 // FSC
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#define PID_CSME2 0x92 // USB-R SAI
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#define PID_CSME0 0x90 // CSE
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#define PID_CSME_PSF 0x8F // ME PSF
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//Rsv = 0x88-0x30,
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//#define PID_EVA 0x2F-0x00
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#define PID_CSMERTC 0x8E
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#define PID_IEUART 0x80
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#define PID_IEHOTHAM 0x7F
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#define PID_IEPMT 0x7E
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#define PID_IESSTPECI 0x7D
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#define PID_IEFSC 0x7C
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#define PID_IESMT5 0x7B
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#define PID_IESMT4 0x7A
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#define PID_IESMT3 0x79
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#define PID_IESMT2 0x78
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#define PID_IESMT1 0x77
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#define PID_IESMT0 0x76
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#define PID_IEUSBR 0x74
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#define PID_IEPTIO 0x73
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#define PID_IEIOSFGASKET 0x72
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#define PID_IEPSF 0x70
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#define PID_FPK 0x0A
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#define PID_MP0KR 0x3C
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#define PID_MP1KR 0x3E
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#define PID_RUAUX 0x0B
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#define PID_RUMAIN 0x3B
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#define PID_EC 0x20
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#define PID_CPM2 0x38
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#define PID_CPM1 0x37
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#define PID_CPM0 0x0C
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#define PID_VSPTHERM 0x25
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#define PID_VSPP2SB 0x24
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#define PID_VSPFPK 0x22
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#define PID_VSPCPM2 0x35
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#define PID_VSPCPM1 0x34
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#define PID_VSPCPM0 0x33
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#define PID_MSMROM 0x08
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#define PID_PSTH 0x89
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typedef UINT8 PCH_SBI_PID;
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#endif
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