## @file
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# Memory Reference Code configuration file.
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#
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# @copyright
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# Copyright 2018 - 2021 Intel Corporation. <BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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##
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#
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# This file is for common defintions for all MRC build targets.
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# This is not for platform specific defintions
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#
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[PcdsFixedAtBuild]
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#
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# MRC Debug configuration options
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#
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcDebugTurnarounds|FALSE
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcDebugPerformanceStats|TRUE
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcDebugSenseAmp|FALSE
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcDisplayPerformanceValues|FALSE
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcDebugLateCmdClk|FALSE
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcDebugPowerTraining|FALSE
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcDebugLrdimmExtraMessages|FALSE
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcBeginEndDebugHooks|TRUE
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcDebugSwizzleInspection|FALSE
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#
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# Dimm support
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#
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcQrDimmSupport|TRUE
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcSoDimmSupport|TRUE
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#
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# Miscellaneous MRC options
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#
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcPurleyBiosHeaderOverride|TRUE
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gEfiCpRcPkgTokenSpaceGuid.PcdMrcXmpSupport|TRUE
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[PcdsFixedAtBuild.IA32]
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gEfiCpRcPkgTokenSpaceGuid.PcdReserved7|TRUE
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[BuildOptions]
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#
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# Size of NvramData structure, per socket
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#
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DEFINE NUMBER_OF_SUB_CHANNELS = -D SUB_CH=1
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DEFINE NUMBER_OF_MAX_RANK_DIMM = -D MAX_RANK_DIMM=4
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DEFINE NUMBER_OF_MAX_RANK_CH = -D MAX_RANK_CH=8
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*_*_*_CC_FLAGS = $(NUMBER_OF_SUB_CHANNELS) $(NUMBER_OF_MAX_RANK_DIMM) $(NUMBER_OF_MAX_RANK_CH)
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#
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# Always define IA32 for PEI, undefine for DXE and SMM
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#
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*_*_IA32_CC_FLAGS = -D IA32
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*_*_X64_CC_FLAGS = -U IA32
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