/** @file
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Data format for Universal Data Structure
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@copyright
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Copyright 1999 - 2021 Intel Corporation. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __SOCKET_MP_LINK_CONFIG_DATA_H__
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#define __SOCKET_MP_LINK_CONFIG_DATA_H__
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#include <UncoreCommonIncludes.h>
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extern EFI_GUID gEfiSocketMpLinkVariableGuid;
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#define SOCKET_MP_LINK_CONFIGURATION_NAME L"SocketMpLinkConfig"
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#pragma pack(1)
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typedef struct {
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// SKXTODO: rename to Kti when removing HSX code
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UINT8 QpiSetupNvVariableStartTag; // This must be the very first one of the whole KTI Setup NV variable!
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//
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// Used by the PciHostBridge DXE driver, these variables don't need to be exposed through setup options
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// The variables are used as a communication vehicle from the PciHostBridge DXE driver to an OEM hook
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// which updates the KTI resource map
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//
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//
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// KTI Host structure inputs
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//
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UINT8 BusRatio[MAX_SOCKET];
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UINT8 D2KCreditConfig; // 1 - Min, 2 - Med (Default), 3- Max
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UINT8 SnoopThrottleConfig; // 0 - Disabled, 1 - Min, 2 - Med (Default), 3- Max
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UINT8 SnoopAllCores; // 0 - Disabled, 1 - Enabled, 2 - Auto
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UINT8 LegacyVgaSoc; // Socket that claims the legacy VGA range; valid values are 0-3; 0 is default.
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UINT8 LegacyVgaStack; // Stack that claims the legacy VGA range; valid values are 0-3; 0 is default.
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UINT8 P2pRelaxedOrdering; // 1 - Enable; 0 - Disable
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UINT8 DebugPrintLevel; // Bit 0 - Fatal, Bit1 - Warning, Bit2 - Info Summary; Bit 3 - Info detailed. 1 - Enable; 0 - Disable
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UINT8 DegradePrecedence; // Use DEGRADE_PRECEDENCE definition; TOPOLOGY_PRECEDENCE is default
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UINT8 Degrade4SPreference; // 4S1LFullConnect topology is default; another option is 4S2LRing topology.
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//
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// Phy/Link Layer Options
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//
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UINT8 QpiLinkSpeedMode; // Link speed mode selection; 0 - Slow Speed; 1- Full Speed
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UINT8 QpiLinkSpeed; // One of SPEED_REC_96GT, SPEED_REC_104GT, MAX_KTI_LINK_SPEED (default), FREQ_PER_LINK
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UINT8 KtiLinkL0pEn; // 0 - Disable, 1 - Enable, 2- Auto (default)
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UINT8 KtiLinkL1En; // 0 - Disable, 1 - Enable, 2- Auto (default)
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UINT8 KtiFailoverEn; // 0 - Disable, 1 - Enable, 2- Auto (default)
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UINT8 KtiLbEn; // 0 - Disable(default), 1 - Enable
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UINT8 KtiCrcMode; // 0 - 8 bit CRC 1 - 16 bit CRC Mode
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UINT8 QpiCpuSktHotPlugEn; // 0 - Disable (default), 1 - Enable
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UINT8 KtiCpuSktHotPlugTopology; // 0 - 4S Topology (default), 1 - 8S Topology
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UINT8 KtiSkuMismatchCheck; // 0 - No, 1 - Yes (default)
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UINT8 KtiLinkVnaOverride; // 0x100 - per link, 0xff - max (default), 0x00 - min
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UINT8 SncEn; // 0 - Disable (default), 1 - Enable
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UINT8 IoDcMode; // 0 - Disable IODC, 1 - AUTO (default), 2 - IODC_EN_REM_INVITOM_PUSH, 3 - IODC_EN_REM_INVITOM_ALLOCFLOW
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// 4 - IODC_EN_REM_INVITOM_ALLOC_NONALLOC, 5 - IODC_EN_REM_INVITOM_AND_WCILF
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UINT8 DirectoryModeEn; // 0 - Disable; 1 - Enable (default)
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UINT8 XptPrefetchEn; // XPT Prefetch : 1 - Enable (Default); 0 - Disable
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UINT8 KtiPrefetchEn; // KTI Prefetch : 1 - Enable (Default); 0 - Disable
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UINT8 XptRemotePrefetchEn; // XPT Remote Prefetch : 1 - Enable (Default); 0 - Disable
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UINT8 RdCurForXptPrefetchEn; // RdCur for XPT Prefetch : 0 - Disable, 1 - Enable, 2- Auto (default)
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UINT8 IrqThreshold; // KTI IRQ Threshold setting
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UINT8 TorThresLoctoremNorm; // TOR threshold - Loctorem threshold normal
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UINT8 TorThresLoctoremEmpty; // TOR threshold - Loctorem threshold empty
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UINT8 MbeBwCal; // 0 - Linear, 1 - Biased, 2 - Legacy, 3 - AUTO (default = Linear)
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UINT8 TscSyncEn; // TSC Sync Enable: 0 - Disable; 1 - Enable; 2 - AUTO (default)
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UINT8 StaleAtoSOptEn; // HA A to S directory optimization
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UINT8 LLCDeadLineAlloc; // Never fill dead lines in LLC: 1 - Enable, 0 - Disable
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UINT8 SplitLock; // Setting this bit removes the Ubox PCU handshake during stopreq and startreq only
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// for splitlocks: - Enable, 0 - Disable
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UINT8 KtiAdaptationEn; // 0 - Disable, 1 - Enable
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UINT8 KtiAdaptationSpeed; // Use KTI_LINK_SPEED definition; MAX_KTI_LINK_SPEED - Auto (i.e BIOS choosen speed)
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UINT8 ReservedS150;
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UINT8 ReservedS151;
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UINT8 ReservedS152;
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UINT8 ReservedS153;
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UINT8 ReservedS154;
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UINT8 ReservedS155;
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UINT8 ReservedS156;
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UINT8 ReservedS157;
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UINT8 ReservedS158;
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UINT8 ReservedS159;
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UINT8 ReservedS160;
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UINT8 ReservedS161;
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UINT8 ReservedS162;
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UINT8 ReservedS163;
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UINT8 ReservedS164;
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UINT8 ReservedS165;
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UINT8 ReservedS166;
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UINT8 ReservedS167;
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UINT8 ReservedS168;
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UINT8 ReservedS169;
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UINT8 ReservedS170;
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UINT8 ReservedS171;
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UINT8 ReservedS172;
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UINT8 ReservedS173;
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UINT8 ReservedS174;
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UINT8 ReservedS175;
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UINT8 ReservedS176;
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UINT8 ReservedS177;
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UINT8 ReservedS178;
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UINT8 ReservedS179;
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UINT8 ReservedS180;
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UINT8 ReservedS181;
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UINT8 ReservedS182;
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UINT8 ReservedS183;
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UINT8 ReservedS184;
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UINT8 ReservedS185;
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UINT32 ReservedS186;
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UINT8 ReservedS187;
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UINT8 ReservedS188;
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#define UPICPUPRTVARIABLE(x) x##KtiPortDisable;x##KtiLinkSpeed;x##KtiLinkVnaOverride;
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UINT8 KtiCpuPerPortStartTag;
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UPICPUPRTVARIABLE (UINT8 Cpu0P0)
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UPICPUPRTVARIABLE (UINT8 Cpu0P1)
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UPICPUPRTVARIABLE (UINT8 Cpu0P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTVARIABLE (UINT8 Cpu0P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTVARIABLE (UINT8 Cpu0P4)
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UPICPUPRTVARIABLE (UINT8 Cpu0P5)
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#endif
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#if MAX_SOCKET > 1
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UPICPUPRTVARIABLE (UINT8 Cpu1P0)
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UPICPUPRTVARIABLE (UINT8 Cpu1P1)
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UPICPUPRTVARIABLE (UINT8 Cpu1P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTVARIABLE (UINT8 Cpu1P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTVARIABLE (UINT8 Cpu1P4)
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UPICPUPRTVARIABLE (UINT8 Cpu1P5)
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#endif
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#endif
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#if MAX_SOCKET > 2
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UPICPUPRTVARIABLE (UINT8 Cpu2P0)
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UPICPUPRTVARIABLE (UINT8 Cpu2P1)
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UPICPUPRTVARIABLE (UINT8 Cpu2P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTVARIABLE (UINT8 Cpu2P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTVARIABLE (UINT8 Cpu2P4)
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UPICPUPRTVARIABLE (UINT8 Cpu2P5)
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#endif
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#endif
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#if MAX_SOCKET > 3
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UPICPUPRTVARIABLE (UINT8 Cpu3P0)
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UPICPUPRTVARIABLE (UINT8 Cpu3P1)
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UPICPUPRTVARIABLE (UINT8 Cpu3P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTVARIABLE (UINT8 Cpu3P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTVARIABLE (UINT8 Cpu3P4)
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UPICPUPRTVARIABLE (UINT8 Cpu3P5)
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#endif
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#endif
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#if (MAX_SOCKET > 4)
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UPICPUPRTVARIABLE (UINT8 Cpu4P0)
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UPICPUPRTVARIABLE (UINT8 Cpu4P1)
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UPICPUPRTVARIABLE (UINT8 Cpu4P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTVARIABLE (UINT8 Cpu4P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTVARIABLE (UINT8 Cpu4P4)
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UPICPUPRTVARIABLE (UINT8 Cpu4P5)
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#endif
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#endif
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#if (MAX_SOCKET > 5)
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UPICPUPRTVARIABLE (UINT8 Cpu5P0)
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UPICPUPRTVARIABLE (UINT8 Cpu5P1)
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UPICPUPRTVARIABLE (UINT8 Cpu5P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTVARIABLE (UINT8 Cpu5P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTVARIABLE (UINT8 Cpu5P4)
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UPICPUPRTVARIABLE (UINT8 Cpu5P5)
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#endif
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#endif
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#if (MAX_SOCKET > 6)
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UPICPUPRTVARIABLE (UINT8 Cpu6P0)
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UPICPUPRTVARIABLE (UINT8 Cpu6P1)
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UPICPUPRTVARIABLE (UINT8 Cpu6P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTVARIABLE (UINT8 Cpu6P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTVARIABLE (UINT8 Cpu6P4)
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UPICPUPRTVARIABLE (UINT8 Cpu6P5)
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#endif
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#endif
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#if (MAX_SOCKET > 7)
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UPICPUPRTVARIABLE (UINT8 Cpu7P0)
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UPICPUPRTVARIABLE (UINT8 Cpu7P1)
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UPICPUPRTVARIABLE (UINT8 Cpu7P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTVARIABLE (UINT8 Cpu7P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTVARIABLE (UINT8 Cpu7P4)
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UPICPUPRTVARIABLE (UINT8 Cpu7P5)
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#endif
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#endif
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#define UPICPUPRTDFXVARIABLE(x) x##ReservedS189;x##ReservedS190;x##ReservedS191;x##ReservedS246;
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UINT8 DfxKtiCpuPerPortStartTag;
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UPICPUPRTDFXVARIABLE (UINT8 Cpu0P0)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu0P1)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu0P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTDFXVARIABLE (UINT8 Cpu0P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTDFXVARIABLE (UINT8 Cpu0P4)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu0P5)
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#endif
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#if MAX_SOCKET > 1
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UPICPUPRTDFXVARIABLE (UINT8 Cpu1P0)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu1P1)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu1P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTDFXVARIABLE (UINT8 Cpu1P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTDFXVARIABLE (UINT8 Cpu1P4)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu1P5)
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#endif
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#endif
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#if MAX_SOCKET > 2
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UPICPUPRTDFXVARIABLE (UINT8 Cpu2P0)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu2P1)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu2P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTDFXVARIABLE (UINT8 Cpu2P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTDFXVARIABLE (UINT8 Cpu2P4)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu2P5)
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#endif
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#endif
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#if MAX_SOCKET > 3
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UPICPUPRTDFXVARIABLE (UINT8 Cpu3P0)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu3P1)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu3P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTDFXVARIABLE (UINT8 Cpu3P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTDFXVARIABLE (UINT8 Cpu3P4)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu3P5)
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#endif
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#endif
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#if MAX_SOCKET > 4
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UPICPUPRTDFXVARIABLE (UINT8 Cpu4P0)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu4P1)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu4P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTDFXVARIABLE (UINT8 Cpu4P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTDFXVARIABLE (UINT8 Cpu4P4)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu4P5)
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#endif
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#endif
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#if MAX_SOCKET > 5
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UPICPUPRTDFXVARIABLE (UINT8 Cpu5P0)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu5P1)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu5P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTDFXVARIABLE (UINT8 Cpu5P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTDFXVARIABLE (UINT8 Cpu5P4)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu5P5)
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#endif
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#endif
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#if MAX_SOCKET > 6
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UPICPUPRTDFXVARIABLE (UINT8 Cpu6P0)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu6P1)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu6P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTDFXVARIABLE (UINT8 Cpu6P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTDFXVARIABLE (UINT8 Cpu6P4)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu6P5)
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#endif
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#endif
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#if MAX_SOCKET > 7
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UPICPUPRTDFXVARIABLE (UINT8 Cpu7P0)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu7P1)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu7P2)
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#if MAX_KTI_PORTS > 3
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UPICPUPRTDFXVARIABLE (UINT8 Cpu7P3)
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#endif
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#if MAX_KTI_PORTS > 5
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UPICPUPRTDFXVARIABLE (UINT8 Cpu7P4)
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UPICPUPRTDFXVARIABLE (UINT8 Cpu7P5)
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#endif
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#endif
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UINT8 QpiSetupNvVariableEndTag; // This must be the last one of the whole KTI Setup NV variable
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} SOCKET_MP_LINK_CONFIGURATION;
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#pragma pack()
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#endif // __SOCKET_MP_LINK_CONFIG_DATA_H__
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