/** @file
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SPI library for abstraction of SPI HW registers accesses
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Base.h>
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#include <Uefi/UefiBaseType.h>
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#include <IndustryStandard/Pci22.h>
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#include <Library/BaseLib.h>
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#include <Library/IoLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/SpiAccessLib.h>
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#include <Library/PchPciBdfLib.h>
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#include <Library/PchPcrLib.h>
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#include <Register/SpiRegs.h>
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#include <Register/FlashRegs.h>
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#include <Register/PchRegs.h>
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#include <Register/PchPcrRegs.h>
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#include <Register/PchDmiRegs.h>
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/**
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Checks if PCH SPI Controler is present and available
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@retval TRUE PCH SPI controller is avaialable
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@retval FALSE PCH SPI controller is not available
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**/
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BOOLEAN
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SpiIsControllerAvailable (
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VOID
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)
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{
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//
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// Checks for SPI controller
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//
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return (PciSegmentRead16 (SpiPciCfgBase () + PCI_VENDOR_ID_OFFSET) != 0xFFFF);
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}
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/**
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Returns PCH SPI BAR0 value
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@retval UINT32 PCH SPI BAR0 value
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**/
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UINT32
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SpiGetBar0 (
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VOID
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)
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{
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UINT32 SpiBar0;
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ASSERT (SpiIsControllerAvailable ());
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SpiBar0 = PciSegmentRead32 (SpiPciCfgBase () + R_SPI_CFG_BAR0) & ~B_SPI_CFG_BAR0_MASK;
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ASSERT (SpiBar0 != 0);
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return SpiBar0;
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}
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/**
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Reads given descriptor section and returns value
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@param[in] UINT16 Descriptor section
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@param[in] UINT16 Offset
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@retval UINT32 Read value from a section under given offset
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**/
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STATIC
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UINT32
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SpiReadDescriptor (
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IN UINT16 DescriptorSection,
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IN UINT16 Offset
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)
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{
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UINT32 SpiBar0;
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SpiBar0 = SpiGetBar0 ();
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MmioWrite32 (SpiBar0 + R_SPI_MEM_FDOC, (DescriptorSection | Offset));
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return MmioRead32 (SpiBar0 + R_SPI_MEM_FDOD);
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}
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/**
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Returns descriptor signature
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@retval UINT32 Descriptor signature
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**/
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UINT32
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SpiGetDescriptorSignature (
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VOID
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)
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{
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//
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// Read Descriptor offset 0x10 - To get Descriptor Signature
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// Signature section 0x0000 + offset 0x0 which points to Descriptor offset 0x10
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//
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return SpiReadDescriptor (V_SPI_MEM_FDOC_FDSS_FSDM, 0x0);
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}
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/**
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Returns supported features and R/W frequencies of Flash Component
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@retval UINT32 Flash Component features descriptor
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**/
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UINT32
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SpiGetFlashComponentDescription (
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VOID
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)
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{
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//
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// Read Descriptor offset 0x30 - To get supported features and R/W frequencies
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// Component section 0x1000 + offset 0x0 which points to Descriptor offset 0x30
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//
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return SpiReadDescriptor (V_SPI_MEM_FDOC_FDSS_COMP, 0x0);
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}
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/**
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Returns number of Flash Components
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@retval UINT32 Flash components number
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**/
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UINT32
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SpiGetFlashComponentsNumber (
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VOID
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)
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{
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//
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// Read Descriptor offset 0x14 - To get number of components
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// Signature section 0x0000 + offset 0x4 which points to Descriptor offset 0x14
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//
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return ((SpiReadDescriptor (V_SPI_MEM_FDOC_FDSS_FSDM, R_FLASH_FDBAR_FLASH_MAP0) & B_FLASH_FDBAR_NC) >> N_FLASH_FDBAR_NC);
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}
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/**
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Returns total Flash size with regards to number of flash components
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@retval UINT32 Total Flash Memory size
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**/
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UINT32
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SpiGetTotalFlashSize (
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VOID
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)
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{
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UINT32 Data32;
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UINT32 ComponentsNumber;
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UINT32 TotalFlashSize;
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Data32 = SpiGetFlashComponentDescription ();
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ComponentsNumber = SpiGetFlashComponentsNumber ();
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TotalFlashSize = (V_FLASH_FLCOMP_COMP_512KB << ((UINT8) (Data32 & B_FLASH_FLCOMP_COMP0_MASK)));
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if (ComponentsNumber == 1) {
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TotalFlashSize += (V_FLASH_FLCOMP_COMP_512KB << ((UINT8) ((Data32 & B_FLASH_FLCOMP_COMP1_MASK) >> 4)));
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}
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return TotalFlashSize;
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}
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/**
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Checks BIOS lock bits for proper value and checks if write protection is enabled
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Expected vales are: LE bit set, EISS bit set and WPD bit cleared
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@retval TRUE All protection bits are set correctly
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@retval FALSE Not all protection bits had exepcted values
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**/
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BOOLEAN
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SpiIsWriteProtectionEnabled (
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VOID
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)
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{
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UINT32 BiosControl;
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BiosControl = PciSegmentRead32 (SpiPciCfgBase () + R_SPI_CFG_BC);
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DEBUG ((DEBUG_INFO, "SPI BIOS CONTROL LE: %x\n", (BiosControl & B_SPI_CFG_BC_LE) != 0 ));
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DEBUG ((DEBUG_INFO, "SPI BIOS CONTROL WPD: %x\n", (BiosControl & B_SPI_CFG_BC_WPD) != 0 ));
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DEBUG ((DEBUG_INFO, "SPI BIOS CONTROL EISS: %x\n", (BiosControl & B_SPI_CFG_BC_EISS) != 0 ));
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return (((BiosControl & B_SPI_CFG_BC_LE) != 0) &&
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((BiosControl & B_SPI_CFG_BC_WPD) == 0) &&
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((BiosControl & B_SPI_CFG_BC_EISS) != 0));
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}
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/**
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Returns status of BIOS Interface Lockdown
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@retval TRUE BIOS Interface Lockdown is enabled
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@retval FALSE BIOS Interface Lockdown is disabled
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**/
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BOOLEAN
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SpiIsBiosInterfaceLockdownEnabled (
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VOID
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)
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{
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return !!(PciSegmentRead32 (SpiPciCfgBase () + R_SPI_CFG_BC) & B_SPI_CFG_BC_BILD);
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}
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/**
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Returns Flash Descriptor Override Pin Strap status
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@retval TRUE Flash Descriptor override is enabled
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@retval FALSE Flash Descriptor override is disabled
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**/
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BOOLEAN
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SpiIsFlashDescriptorOverrideEnabled (
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VOID
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)
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{
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UINT32 SpiBar0;
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SpiBar0 = SpiGetBar0 ();
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return !!(MmioRead16 (SpiBar0 + R_SPI_MEM_HSFSC) & B_SPI_MEM_HSFSC_FDOPSS);
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}
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/**
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Returns Flash Configuration Lock Down bit status
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@retval TRUE Flash Configuration Lock Down bit is set
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@retval FALSE Flash Configuration Lock Down bit is not set
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**/
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BOOLEAN
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SpiIsFlashConfigurationLockDownEnabled (
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VOID
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)
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{
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UINT32 SpiBar0;
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SpiBar0 = SpiGetBar0 ();
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return !!(MmioRead16 (SpiBar0 + R_SPI_MEM_HSFSC) & B_SPI_MEM_HSFSC_FLOCKDN);
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}
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/**
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Returns Top Swap functionality enable state
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@retval TRUE Top Swap is enabled
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@retval FALSE Top Swap is disabled
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**/
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BOOLEAN
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SpiIsTopSwapEnabled (
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VOID
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)
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{
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return !!(PciSegmentRead32 (SpiPciCfgBase () + R_SPI_CFG_BC) & B_SPI_CFG_BC_TSS);
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}
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/**
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Return Component Property Parameter Table for a given component number
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@param[in] ComponentNumber SPI Component number
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@param[out] CppTable Component Poperty Parameter Table value
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@retval TRUE Vendor Specific Component Capabilities Register value was read
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@reval FALSE Vendor Specific Component Capabilities Register value was not present
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**/
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BOOLEAN
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SpiGetComponentPropertyParameterTable (
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IN UINT8 ComponentNumber,
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OUT UINT32 *CppTable
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)
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{
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UINT32 SpiBar0;
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UINT32 Data32;
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SpiBar0 = SpiGetBar0 ();
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//
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// More than 2 components not supported
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//
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switch (ComponentNumber) {
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case 0:
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*CppTable = MmioRead32 (SpiBar0 + R_SPI_MEM_SFDP0_VSCC0);
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return TRUE;
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case 1:
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Data32 = SpiReadDescriptor (V_SPI_MEM_FDOC_FDSS_FSDM, R_FLASH_FDBAR_FLASH_MAP0);
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*CppTable = MmioRead32 (SpiBar0 + R_SPI_MEM_SFDP1_VSCC1);
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return !!(Data32 & BIT8);
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default:
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return FALSE;
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}
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}
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/**
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Returns valid bit status in given Component Property Parameter Table
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@param[in] CppTable Component Poperty Parameter Table value
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@retval TRUE Valid bit is set
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@reval FALSE Valid bit is not set
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**/
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BOOLEAN
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SpiIsCppValidBitSet (
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IN UINT32 CppTable
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)
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{
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return !!(CppTable & B_SPI_MEM_SFDPX_VSCCX_CPPTV);
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}
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/**
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Checks if Flash Descriptor is valid
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@retval TRUE Flash Descriptor is valid
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@retval FALSE Flash Descriptor is invalid
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**/
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BOOLEAN
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SpiIsFlashDescriptorValid (
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VOID
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)
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{
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UINT32 SpiBar0;
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SpiBar0 = SpiGetBar0 ();
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return !!(MmioRead32 (SpiBar0 + R_SPI_MEM_HSFSC) & B_SPI_MEM_HSFSC_FDV);
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}
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/**
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Reads and returns value from Flash Region Access Permissions Register (FRAP)
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@retval UINT32 Flash Region Access Permissions Register value
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**/
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STATIC
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UINT32
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SpiGetFlashRegionAccessPermissions (
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VOID
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)
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{
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return MmioRead32 (SpiGetBar0 () + R_SPI_MEM_FRAP);
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}
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/**
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Returns masked BIOS Master Read Access
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@retval UINT32 Already masked BIOS Master Read Access
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**/
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UINT32
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SpiGetMasterReadAccess (
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VOID
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)
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{
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UINT32 Data32;
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Data32 = SpiGetFlashRegionAccessPermissions () & B_SPI_MEM_FRAP_BMRAG_MASK;
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DEBUG ((DEBUG_INFO, "BMRAG 0x%x\n", Data32));
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return Data32;
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}
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/**
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Returns masked BIOS Master Write Access
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@retval UINT32 Already masked BIOS Master Write Access
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**/
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UINT32
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SpiGetMasterWriteAccess (
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VOID
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)
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{
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UINT32 Data32;
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Data32 = SpiGetFlashRegionAccessPermissions () & B_SPI_MEM_FRAP_BMWAG_MASK;
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DEBUG ((DEBUG_INFO, "BMWAG 0x%x\n", Data32));
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return Data32;
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}
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/**
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Returns GbE Region Access rights
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@retval UINT32 GbE Region access rights
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**/
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UINT32
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SpiGetGbeRegionAccess (
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VOID
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)
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{
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UINT32 Data32;
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Data32 = SpiReadDescriptor (V_SPI_MEM_FDOC_FDSS_MSTR, 0x8);
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DEBUG ((DEBUG_INFO, "GbE Region Access 0x%x\n", Data32));
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return Data32;
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}
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/**
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Returns CSME region access rights
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@retval UINT32 CSME Region Access rights
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**/
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UINT32
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SpiGetCsmeRegionAccess (
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VOID
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)
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{
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UINT32 Data32;
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Data32 = SpiReadDescriptor (V_SPI_MEM_FDOC_FDSS_MSTR, 0x4);
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DEBUG ((DEBUG_INFO, "CSME Region Access 0x%x\n", Data32));
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return Data32;
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}
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/**
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Returns EC region access right
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@retval UINT32 EC Region access rights
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**/
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UINT32
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SpiGetEcRegionAccess (
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VOID
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)
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{
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UINT32 Data32;
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Data32 = SpiReadDescriptor (V_SPI_MEM_FDOC_FDSS_MSTR, 0x10);
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DEBUG ((DEBUG_INFO, "EC Region Access 0x%x\n", Data32));
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return Data32;
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}
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/**
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Checks if Slave Attached Flash (SAF) mode is active
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@retval TRUE SAF mode is active
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@retval FALSE SAF mode is not active
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**/
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BOOLEAN
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SpiIsSafModeActive (
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VOID
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)
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{
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UINT32 SpiBar0;
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SpiBar0 = SpiGetBar0 ();
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return !!(MmioRead32 (SpiBar0 + R_SPI_MEM_HSFSC) & B_SPI_MEM_HSFSC_SAF_MODE_ACTIVE);
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}
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/**
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Checks validity of GbE region
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@retval TRUE GbE region is valid
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@retval FALSE GbE regios in invalid
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**/
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BOOLEAN
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SpiIsGbeRegionValid (
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VOID
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)
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{
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UINT32 SpiBar0;
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SpiBar0 = SpiGetBar0 ();
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if (MmioRead32 (SpiBar0 + R_SPI_MEM_FREG3_GBE) != B_SPI_MEM_FREGX_BASE_MASK) {
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return TRUE;
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}
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return FALSE;
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}
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/**
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Returns TRUE if BIOS Boot Strap is set to SPI
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@retval TRUE BIOS Boot strap is set to SPI
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@retval FALSE BIOS Boot strap is set to LPC/eSPI
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**/
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BOOLEAN
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SpiIsBiosBootFromSpi (
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VOID
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)
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{
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return !!(((PciSegmentRead8 (SpiPciCfgBase () + R_SPI_CFG_BC) & B_SPI_CFG_BC_BBS) >> N_SPI_CFG_BC_BBS) == V_SPI_CFG_BC_BBS_SPI);
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}
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/**
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Check SPI write status disable is set
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@retval TRUE Write status disable is set
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@retval FALSE Write status disable is not set
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**/
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BOOLEAN
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SpiIsWriteStatusDisable (
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VOID
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)
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{
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return !!(MmioRead32 (SpiGetBar0 () + R_SPI_MEM_HSFSC) & B_SPI_MEM_HSFSC_WRSDIS);
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}
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