/** @file
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Serial Io Common Lib implementation.
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All function in this library is available for PEI, DXE, and SMM,
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But do not support UEFI RUNTIME environment call.
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Base.h>
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#include <Uefi/UefiBaseType.h>
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#include <Include/PcieRegs.h>
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#include <IndustryStandard/Pci30.h>
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#include <Register/PchRegs.h>
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#include <Library/IoLib.h>
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#include <Library/BaseLib.h>
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#include <Library/SerialIoAccessLib.h>
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#include <Library/SerialIoPrivateLib.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/PchInfoLib.h>
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#include <Library/S3BootScriptLib.h>
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#include <Library/DebugLib.h>
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#include <PchLimits.h>
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#include <PchReservedResources.h>
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#include <Library/PchPciBdfLib.h>
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/**
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Returns BAR0
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@param[in] PciCfgBase Pci Config Base
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@retval 64bit MMIO BAR Address
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**/
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UINT64
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GetSerialIoBar (
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IN UINT64 PciCfgBase
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)
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{
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if (PciCfgBase < PCH_SERIAL_IO_BASE_ADDRESS) {
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return (UINT64) ((PciSegmentRead32 ((UINTN) (PciCfgBase + PCI_BASE_ADDRESSREG_OFFSET)) & 0xFFFFF000) + LShiftU64 (PciSegmentRead32 ((UINTN) (PciCfgBase + PCI_BASE_ADDRESSREG_OFFSET + 4)), 32));
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}
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return (UINT64) ((MmioRead32 ((UINTN) (PciCfgBase + PCI_BASE_ADDRESSREG_OFFSET)) & 0xFFFFF000) + LShiftU64 (MmioRead32 ((UINTN) (PciCfgBase + PCI_BASE_ADDRESSREG_OFFSET + 4)), 32));
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}
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/**
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Returns I2C Pci Config Space
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@param[in] I2cNumber I2C Number
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@retval I2C Pci Config Space Address
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**/
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UINT64
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GetSerialIoI2cPciCfg (
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IN UINT8 I2cNumber
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)
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{
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if (IsSerialIoI2cHidden (I2cNumber)) {
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return (UINTN) GetSerialIoI2cFixedPciCfgAddress (I2cNumber);
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}
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return SerialIoI2cPciCfgBase (I2cNumber);
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}
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/**
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Returns SPI Pci Config Space
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@param[in] SpiNumber SPI Number
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@retval SPI Pci Config Space Address
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**/
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UINT64
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GetSerialIoSpiPciCfg (
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IN UINT8 SpiNumber
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)
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{
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if (IsSerialIoSpiHidden (SpiNumber)) {
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return (UINTN) GetSerialIoSpiFixedPciCfgAddress (SpiNumber);
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}
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return SerialIoSpiPciCfgBase (SpiNumber);
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}
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/**
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Returns UART Pci Config Space
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@param[in] UartNumber UART Number
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@retval UART Pci Config Space Address
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**/
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UINT64
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GetSerialIoUartPciCfg (
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IN UINT8 UartNumber
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)
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{
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if (IsSerialIoUartHidden (UartNumber)) {
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return GetSerialIoUartFixedPciCfgAddress (UartNumber);
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}
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return SerialIoUartPciCfgBase (UartNumber);
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}
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/**
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Returns SPI S3 boot script PCI address
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@param[in] UartNumber UART Number
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@retval SPI S3 boot script PCI address
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**/
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UINT64
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GetSerialIoSpiS3PciBase (
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IN UINT8 SpiNumber
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)
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{
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if (IsSerialIoSpiHidden (SpiNumber)) {
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//
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// It's not expected to return Spi S3 Boot Script PCI address for non PCI mode.
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//
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ASSERT (TRUE);
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}
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return S3_BOOT_SCRIPT_LIB_PCI_ADDRESS (
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DEFAULT_PCI_BUS_NUMBER_PCH,
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SerialIoSpiDevNumber (SpiNumber),
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SerialIoSpiFuncNumber (SpiNumber),
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0
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);
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}
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/**
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Returns UART S3 boot script PCI address
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@param[in] UartNumber UART Number
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@retval UART S3 boot script PCI address
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**/
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UINT64
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GetSerialIoUartS3PciBase (
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IN UINT8 UartNumber
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)
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{
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if (IsSerialIoUartHidden (UartNumber)) {
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//
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// It's not expected to return Uart S3 Boot Script PCI address for non PCI mode.
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//
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ASSERT (TRUE);
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}
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return S3_BOOT_SCRIPT_LIB_PCI_ADDRESS (
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DEFAULT_PCI_BUS_NUMBER_PCH,
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SerialIoUartDevNumber (UartNumber),
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SerialIoUartFuncNumber (UartNumber),
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0
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);
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}
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/**
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Returns I2C S3 boot script PCI address
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@param[in] I2cNumber I2C Number
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@retval I2C S3 boot script PCI address
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**/
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UINT64
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GetSerialIoI2cS3PciBase (
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IN UINT8 I2cNumber
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)
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{
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if (IsSerialIoI2cHidden (I2cNumber)) {
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//
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// It's not expected to return I2c S3 Boot Script PCI address for non PCI mode.
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//
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ASSERT (TRUE);
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}
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return S3_BOOT_SCRIPT_LIB_PCI_ADDRESS (
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DEFAULT_PCI_BUS_NUMBER_PCH,
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SerialIoI2cDevNumber (I2cNumber),
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SerialIoI2cFuncNumber (I2cNumber),
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0
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);
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}
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/**
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Checks if Device with given PciDeviceId is one of SerialIo I2C controllers
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If yes, its number is returned through I2cIndex parameter, otherwise I2cIndex is not updated
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@param[in] PciDevId Device ID
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@param[out] I2cNumber Number of SerialIo I2C controller
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@retval TRUE yes it is a SerialIo I2C controller
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@retval FALSE no it isn't a SerialIo I2C controller
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**/
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BOOLEAN
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IsSerialIoI2cDeviceId (
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IN UINT16 PciDevId,
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OUT UINT8 *I2cNumber
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)
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{
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UINT8 Index;
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for (Index = 0; Index < GetPchMaxSerialIoI2cControllersNum (); Index++) {
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if (PciDevId == GetSerialIoI2cDeviceId (Index)) {
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*I2cNumber = Index;
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return TRUE;
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}
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}
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return FALSE;
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}
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/**
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Checks if I2c is Function 0 Enabled
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@param[in] I2cIndex Number of the SerialIo I2C controller
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@retval TRUE Enabled
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@retval FALSE Disabled
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**/
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BOOLEAN
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IsSerialIoI2cFunction0Enabled (
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IN UINT8 I2cIndex
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)
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{
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if (SerialIoI2cFuncNumber (I2cIndex) == 0) {
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if (SerialIoHigherFunctionsEnabled (SerialIoI2cDevNumber (I2cIndex))) {
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return TRUE;
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}
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}
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return FALSE;
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}
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/**
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Checks if Uart is Function 0 Enabled
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@param[in] UartIndex Number of the SerialIo Uart controller
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@retval TRUE Enabled
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@retval FALSE Disabled
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**/
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BOOLEAN
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IsSerialIoUartFunction0Enabled (
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IN UINT8 UartIndex
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)
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{
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if (SerialIoUartFuncNumber (UartIndex) == 0) {
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if (SerialIoHigherFunctionsEnabled (SerialIoUartDevNumber (UartIndex))) {
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return TRUE;
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}
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}
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return FALSE;
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}
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/**
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Checks if Spi is Function 0 Enabled
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@param[in] SpiIndex Number of the SerialIo Spi controller
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@retval TRUE Enabled
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@retval FALSE Disabled
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**/
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BOOLEAN
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IsSerialIoSpiFunction0Enabled (
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IN UINT8 SpiIndex
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)
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{
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if (SerialIoSpiFuncNumber (SpiIndex) == 0) {
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if (SerialIoHigherFunctionsEnabled (SerialIoSpiDevNumber (SpiIndex))) {
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return TRUE;
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}
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}
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return FALSE;
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}
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