/** @file
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GPIO pins for TGL-PCH-LP,
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _GPIO_PINS_VER2_LP_H_
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#define _GPIO_PINS_VER2_LP_H_
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///
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/// This header file should be used together with
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/// PCH GPIO lib in C and ASL. All defines used
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/// must match both ASL/C syntax
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///
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///
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/// Unique ID used in GpioPad defines
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///
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#define GPIO_VER2_LP_CHIPSET_ID 0x9
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///
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/// TGL LP GPIO Groups
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/// Use below for functions from PCH GPIO Lib which
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/// require GpioGroup as argument
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///
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#define GPIO_VER2_LP_GROUP_GPP_B 0x0900
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#define GPIO_VER2_LP_GROUP_GPP_A 0x0902
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#define GPIO_VER2_LP_GROUP_GPP_R 0x0903
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#define GPIO_VER2_LP_GROUP_GPD 0x0905
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#define GPIO_VER2_LP_GROUP_GPP_S 0x0906
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#define GPIO_VER2_LP_GROUP_GPP_H 0x0907
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#define GPIO_VER2_LP_GROUP_GPP_D 0x0908
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#define GPIO_VER2_LP_GROUP_GPP_C 0x090B
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#define GPIO_VER2_LP_GROUP_GPP_F 0x090C
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#define GPIO_VER2_LP_GROUP_GPP_E 0x090E
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///
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/// TGL LP GPIO pins
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/// Use below for functions from PCH GPIO Lib which
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/// require GpioPad as argument. Encoding used here
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/// has all information required by library functions
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///
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#define GPIO_VER2_LP_GPP_B2 0x09000002
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#define GPIO_VER2_LP_GPP_B4 0x09000004
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#define GPIO_VER2_LP_GPP_B14 0x0900000E
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#define GPIO_VER2_LP_GPP_B15 0x0900000F
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#define GPIO_VER2_LP_GPP_B16 0x09000010
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#define GPIO_VER2_LP_GPP_B18 0x09000012
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#define GPIO_VER2_LP_GPP_B23 0x09000017
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#define GPIO_VER2_LP_GSPI0_CLK_LOOPBK 0x09000018
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#define GPIO_VER2_LP_GPP_A10 0x0902000A
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#define GPIO_VER2_LP_GPP_A11 0x0902000B
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#define GPIO_VER2_LP_GPP_A13 0x0902000D
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#define GPIO_VER2_LP_GPP_A14 0x0902000E
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#define GPIO_VER2_LP_GPP_A23 0x09020017
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#define GPIO_VER2_LP_ESPI_CLK_LOOPBK 0x09020018
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#define GPIO_VER2_LP_GPP_R5 0x09030005
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#define GPIO_VER2_LP_GPP_R6 0x09030006
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#define GPIO_VER2_LP_GPD7 0x09050007
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#define GPIO_VER2_LP_INPUT3VSEL 0x0905000C
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#define GPIO_VER2_LP_GPP_H0 0x09070000
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#define GPIO_VER2_LP_GPP_H1 0x09070001
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#define GPIO_VER2_LP_GPP_H12 0x0907000C
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#define GPIO_VER2_LP_GPP_H13 0x0907000D
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#define GPIO_VER2_LP_GPP_H15 0x0907000F
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#define GPIO_VER2_LP_GPP_H19 0x09070013
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#define GPIO_VER2_LP_GPP_D16 0x09080010
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#define GPIO_VER2_LP_GSPI2_CLK_LOOPBK 0x09080014
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#define GPIO_VER2_LP_GPP_C2 0x090B0002
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#define GPIO_VER2_LP_GPP_C5 0x090B0005
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#define GPIO_VER2_LP_GPP_C8 0x090B0008
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#define GPIO_VER2_LP_GPP_C12 0x090B000C
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#define GPIO_VER2_LP_GPP_C13 0x090B000D
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#define GPIO_VER2_LP_GPP_C14 0x090B000E
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#define GPIO_VER2_LP_GPP_C15 0x090B000F
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#define GPIO_VER2_LP_GPP_C22 0x090B0016
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#define GPIO_VER2_LP_GPP_C23 0x090B0017
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#define GPIO_VER2_LP_GPP_F4 0x090C0004
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#define GPIO_VER2_LP_GPP_F5 0x090C0005
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#define GPIO_VER2_LP_GPP_F9 0x090C0009
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#define GPIO_VER2_LP_GPP_F10 0x090C000A
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#define GPIO_VER2_LP_GPP_F20 0x090C0014
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#define GPIO_VER2_LP_GPP_F21 0x090C0015
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#define GPIO_VER2_LP_GPPF_CLK_LOOPBK 0x090C0018
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#define GPIO_VER2_LP_GPP_E3 0x090E0003
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#define GPIO_VER2_LP_GPP_E7 0x090E0007
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#define GPIO_VER2_LP_GPP_E8 0x090E0008
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#define GPIO_VER2_LP_GPP_E22 0x090E0016
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#define GPIO_VER2_LP_GPP_E23 0x090E0017
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#define GPIO_VER2_LP_GPPE_CLK_LOOPBK 0x090E0018
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//
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// GPIO Pin Muxing
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// Determines a selection of physical pad for a given signal.
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// Please refer to GPIO_NATIVE_PAD type.
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// If certain signal is not listed below it means that it can be enabled
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// only on a single pad and muxing setting is not needed.
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//
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#define GPIO_VER2_LP_MUXING_SERIALIO_I2C4_SDA_GPP_H8 0x1947CC08
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#define GPIO_VER2_LP_MUXING_SERIALIO_I2C4_SCL_GPP_H9 0x1947AC09
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#endif // _GPIO_PINS_VER2_LP_H_
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