/** @file
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Si Config Block
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _SI_CONFIG_H_
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#define _SI_CONFIG_H_
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#define SI_CONFIG_REVISION 2
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extern EFI_GUID gSiConfigGuid;
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#pragma pack (push,1)
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/**
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The Silicon Policy allows the platform code to publish a set of configuration
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information that the RC drivers will use to configure the silicon hardware.
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<b>Revision 1</b>:
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- Initial version.
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<b>Revision 2</b>:
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- Added TraceHubMemBase
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**/
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typedef struct {
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CONFIG_BLOCK_HEADER Header; ///< Offset 0 - 27 Config Block Header
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//
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// Platform specific common policies that used by several silicon components.
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//
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UINT8 CsmFlag; ///< CSM status flag.
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/**
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This is used to skip the SSID programming in silicon code.
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When set to TRUE, silicon code will not do any SSID programming and platform code
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needs to handle that by itself properly.
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<b>0: FALSE</b>, 1: TRUE
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**/
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UINT8 SkipSsidProgramming;
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UINT8 RsvdBytes0[2];
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/**
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When SkipSsidProgramming is FALSE, silicon code will use this as default value
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to program the SVID for all internal devices.
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<b>0: use silicon default SVID 0x8086 </b>, Non-zero: use customized SVID.
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**/
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UINT16 CustomizedSvid;
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/**
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When SkipSsidProgramming is FALSE, silicon code will use this as default value
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to program the Sid for all internal devices.
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<b>0: use silicon default SSID 0x7270 </b>, Non-zero: use customized SSID.
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**/
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UINT16 CustomizedSsid;
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/**
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SsidTablePtr contains the SVID_SID_INIT_ENTRY table.
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This is valid when SkipSsidProgramming is FALSE;
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It doesn't need to contain entries for all Intel internal devices.
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It can only contains the SVID_SID_INIT_ENTRY entries for those Dev# Func# which needs
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to be overridden.
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In the enties, only Dev, Function, SubSystemVendorId, and SubSystemId are required.
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<b>Default is NULL.</b>
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E.g. Platform only needs to override BDF 0:31:5 to AAAA:BBBB and BDF 0:31:3 to CCCC:DDDD,
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it can be done in platform like this:
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STATIC SVID_SID_INIT_ENTRY mSsidTablePtr[SI_MAX_DEVICE_COUNT] = {0};
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VOID SiPolicyUpdate () {
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UINT32 EntryCount = 0;
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SiPolicy->SkipSsidProgramming = FALSE;
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SiPolicy->SsidTablePtr = mSsidTablePtr;
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mSsidTablePtr[EntryCount].Address.Bits.Device = SpiDeviceNumber ();
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mSsidTablePtr[EntryCount].Address.Bits.Function = SpiFunctionNumber ();
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mSsidTablePtr[EntryCount].SvidSidValue.SubSystemVendorId = 0xAAAA;
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mSsidTablePtr[EntryCount].SvidSidValue.SubSystemId = 0xBBBB;
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EntryCount ++;
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mSsidTablePtr[EntryCount].Address.Bits.Device = HdaDevNumber ();
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mSsidTablePtr[EntryCount].Address.Bits.Function = HdaFuncNumber ();
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mSsidTablePtr[EntryCount].SvidSidValue.SubSystemVendorId = 0xCCCC;
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mSsidTablePtr[EntryCount].SvidSidValue.SubSystemId = 0xDDDD;
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EntryCount ++;
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ASSERT (EntryCount < SI_MAX_DEVICE_COUNT);
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SiPolicy->NumberOfSsidTableEntry = EntryCount;
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}
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**/
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UINT32 *SsidTablePtr;
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/**
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Number of valid enties in SsidTablePtr.
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This is valid when SkipSsidProgramming is FALSE;
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<b>Default is 0.</b>
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**/
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UINT16 NumberOfSsidTableEntry;
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UINT8 RsvdBytes1[2];
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/**
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If Trace Hub is enabled and trace to memory is desired, Platform code or BootLoader needs to allocate trace hub memory
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as reserved, and save allocated memory base to TraceHubMemBase to ensure Trace Hub memory is configured properly.
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To get total trace hub memory size please refer to TraceHubCalculateTotalBufferSize ()
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Noted: If EDKII memory service is used to allocate memory, it will require double memory size to support size-aligned memory allocation,
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so Platform code or FSP Wrapper code should ensure enough memory available for size-aligned TraceHub memory allocation.
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**/
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UINT32 TraceHubMemBase; // Offset 58
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/**
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This is used to skip setting BIOS_DONE MSR during firmware update boot mode.
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When set to TRUE and boot mode is BOOT_ON_FLASH_UPDATE,
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skip setting BIOS_DONE MSR at EndofPei.
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<b>0: FALSE</b>, 1: TRUE
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**/
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UINT8 SkipBiosDoneWhenFwUpdate;
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UINT8 RsvdBytes2[3];
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} SI_CONFIG;
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#pragma pack (pop)
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#define DEFAULT_SSVID 0x8086
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#define DEFAULT_SSDID 0x7270
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#define SI_MAX_DEVICE_COUNT 70
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///
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/// Subsystem Vendor ID / Subsystem ID
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///
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typedef struct {
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UINT16 SubSystemVendorId;
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UINT16 SubSystemId;
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} SVID_SID_VALUE;
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//
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// Below is to match PCI_SEGMENT_LIB_ADDRESS () which can directly send to PciSegmentRead/Write functions.
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//
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typedef struct {
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union {
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struct {
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UINT32 Register:12;
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UINT32 Function:3;
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UINT32 Device:5;
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UINT32 Bus:8;
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UINT32 Reserved1:4;
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UINT32 Segment:16;
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UINT32 Reserved2:16;
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} Bits;
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UINT64 SegBusDevFuncRegister;
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} Address;
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SVID_SID_VALUE SvidSidValue;
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UINT32 Reserved;
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} SVID_SID_INIT_ENTRY;
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typedef struct {
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UINT32 SkipBus;
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UINT32 SkipDevice;
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UINT32 SkipFunction;
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} SVID_SID_SKIP_TABLE;
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#endif // _SI_CONFIG_H_
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